uboot/include/configs/imx31_litekit.h
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   1/*
   2 * (C) Copyright 2004
   3 * Texas Instruments.
   4 * Richard Woodruff <r-woodruff2@ti.com>
   5 * Kshitij Gupta <kshitij@ti.com>
   6 *
   7 * Configuration settings for the LogicPD i.MX31 Litekit board.
   8 *
   9 * See file CREDITS for list of people who contributed to this
  10 * project.
  11 *
  12 * This program is free software; you can redistribute it and/or
  13 * modify it under the terms of the GNU General Public License as
  14 * published by the Free Software Foundation; either version 2 of
  15 * the License, or (at your option) any later version.
  16 *
  17 * This program is distributed in the hope that it will be useful,
  18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
  19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  20 * GNU General Public License for more details.
  21 *
  22 * You should have received a copy of the GNU General Public License
  23 * along with this program; if not, write to the Free Software
  24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  25 * MA 02111-1307 USA
  26 */
  27
  28#ifndef __CONFIG_H
  29#define __CONFIG_H
  30
  31#include <asm/arch/imx-regs.h>
  32
  33 /* High Level Configuration Options */
  34#define CONFIG_ARM1136          1    /* This is an arm1136 CPU core */
  35#define CONFIG_MX31             1    /* in a mx31 */
  36#define CONFIG_MX31_HCLK_FREQ   26000000
  37#define CONFIG_MX31_CLK32       32000
  38
  39#define CONFIG_DISPLAY_CPUINFO
  40#define CONFIG_DISPLAY_BOARDINFO
  41
  42#define CONFIG_SYS_TEXT_BASE    0xa0000000
  43
  44/* Temporarily disabled */
  45#if 0
  46#define CONFIG_OF_LIBFDT                1
  47#define CONFIG_FIT                      1
  48#define CONFIG_FIT_VERBOSE              1
  49#endif
  50
  51#define CONFIG_CMDLINE_TAG              1    /* enable passing of ATAGs */
  52#define CONFIG_SETUP_MEMORY_TAGS        1
  53#define CONFIG_INITRD_TAG               1
  54
  55/*
  56 * Size of malloc() pool
  57 */
  58#define CONFIG_SYS_MALLOC_LEN           (CONFIG_ENV_SIZE + 128 * 1024)
  59
  60/*
  61 * Hardware drivers
  62 */
  63
  64#define CONFIG_MXC_UART 1
  65#define CONFIG_SYS_MX31_UART1           1
  66#define CONFIG_MXC_GPIO
  67
  68#define CONFIG_HARD_SPI         1
  69#define CONFIG_MXC_SPI          1
  70#define CONFIG_DEFAULT_SPI_BUS  1
  71#define CONFIG_DEFAULT_SPI_MODE (SPI_MODE_0 | SPI_CS_HIGH)
  72
  73#define CONFIG_FSL_PMIC
  74#define CONFIG_FSL_PMIC_BUS     1
  75#define CONFIG_FSL_PMIC_CS      0
  76#define CONFIG_FSL_PMIC_CLK     1000000
  77#define CONFIG_FSL_PMIC_MODE    (SPI_MODE_0 | SPI_CS_HIGH)
  78
  79#define CONFIG_RTC_MC13783      1
  80
  81/* allow to overwrite serial and ethaddr */
  82#define CONFIG_ENV_OVERWRITE
  83#define CONFIG_CONS_INDEX       1
  84#define CONFIG_BAUDRATE         115200
  85#define CONFIG_SYS_BAUDRATE_TABLE       {9600, 19200, 38400, 57600, 115200}
  86
  87/***********************************************************
  88 * Command definition
  89 ***********************************************************/
  90
  91#include <config_cmd_default.h>
  92
  93#define CONFIG_CMD_MII
  94#define CONFIG_CMD_PING
  95#define CONFIG_CMD_SPI
  96#define CONFIG_CMD_DATE
  97#define CONFIG_CMD_NAND
  98
  99#define CONFIG_BOOTDELAY        3
 100
 101#define CONFIG_NETMASK          255.255.255.0
 102#define CONFIG_IPADDR           192.168.23.168
 103#define CONFIG_SERVERIP         192.168.23.2
 104
 105#define CONFIG_EXTRA_ENV_SETTINGS                                                                                       \
 106        "bootargs_base=setenv bootargs console=ttySMX0,115200\0"                                                        \
 107        "bootargs_nfs=setenv bootargs $(bootargs) root=/dev/nfs ip=dhcp nfsroot=$(serverip):$(nfsrootfs),v3,tcp\0"      \
 108        "bootcmd=run bootcmd_net\0"                                                                                     \
 109        "bootcmd_net=run bootargs_base bootargs_mtd bootargs_nfs; tftpboot 0x80000000 uImage-mx31; bootm\0"             \
 110        "prg_uboot=tftpboot 0x80000000 u-boot-imx31_litekit.bin; protect off all; erase 0xa00d0000 0xa01effff; cp.b 0x80000000 0xa00d0000 $(filesize)\0"
 111
 112
 113#define CONFIG_NET_MULTI
 114#define CONFIG_SMC911X          1
 115#define CONFIG_SMC911X_BASE     (CS4_BASE + 0x00020000)
 116#define CONFIG_SMC911X_32_BIT   1
 117
 118/*
 119 * Miscellaneous configurable options
 120 */
 121#define CONFIG_SYS_LONGHELP             /* undef to save memory */
 122#define CONFIG_SYS_PROMPT               "uboot> "
 123#define CONFIG_SYS_CBSIZE               256  /* Console I/O Buffer Size */
 124/* Print Buffer Size */
 125#define CONFIG_SYS_PBSIZE               (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
 126#define CONFIG_SYS_MAXARGS              16          /* max number of command args */
 127#define CONFIG_SYS_BARGSIZE             CONFIG_SYS_CBSIZE  /* Boot Argument Buffer Size */
 128
 129#define CONFIG_SYS_MEMTEST_START        0  /* memtest works on */
 130#define CONFIG_SYS_MEMTEST_END          0x10000
 131
 132#define CONFIG_SYS_LOAD_ADDR            0 /* default load address */
 133
 134#define CONFIG_SYS_HZ                   1000
 135
 136#define CONFIG_CMDLINE_EDITING  1
 137
 138/*-----------------------------------------------------------------------
 139 * Stack sizes
 140 *
 141 * The stack sizes are set up in start.S using the settings below
 142 */
 143#define CONFIG_STACKSIZE        (128 * 1024) /* regular stack */
 144
 145/*-----------------------------------------------------------------------
 146 * Physical Memory Map
 147 */
 148#define CONFIG_NR_DRAM_BANKS    1
 149#define PHYS_SDRAM_1            CSD0_BASE
 150#define PHYS_SDRAM_1_SIZE       (128 * 1024 * 1024)
 151#define CONFIG_BOARD_EARLY_INIT_F
 152
 153#define CONFIG_SYS_SDRAM_BASE           CSD0_BASE
 154#define CONFIG_SYS_INIT_RAM_ADDR        IRAM_BASE_ADDR
 155#define CONFIG_SYS_INIT_RAM_SIZE                IRAM_SIZE
 156#define CONFIG_SYS_GBL_DATA_OFFSET      (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
 157#define CONFIG_SYS_INIT_SP_ADDR         (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_GBL_DATA_OFFSET)
 158
 159/*-----------------------------------------------------------------------
 160 * FLASH and environment organization
 161 */
 162#define CONFIG_SYS_FLASH_BASE           CS0_BASE
 163#define CONFIG_SYS_MAX_FLASH_BANKS      1           /* max number of memory banks */
 164#define CONFIG_SYS_MAX_FLASH_SECT       128          /* max number of sectors on one chip */
 165#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE /* Monitor at beginning of flash */
 166
 167#define CONFIG_ENV_ADDR         (CONFIG_SYS_FLASH_BASE + 0x001f0000)
 168#define CONFIG_ENV_IS_IN_FLASH  1
 169#define CONFIG_ENV_SECT_SIZE    (64 * 1024)
 170#define CONFIG_ENV_SIZE         (64 * 1024)
 171
 172/*-----------------------------------------------------------------------
 173 * CFI FLASH driver setup
 174 */
 175#define CONFIG_SYS_FLASH_CFI            1       /* Flash memory is CFI compliant */
 176#define CONFIG_FLASH_CFI_DRIVER 1       /* Use drivers/cfi_flash.c */
 177#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1     /* Use buffered writes (~10x faster) */
 178#define CONFIG_SYS_FLASH_PROTECTION     1       /* Use hardware sector protection */
 179
 180/* timeout values are in ticks */
 181#define CONFIG_SYS_FLASH_ERASE_TOUT     (100*CONFIG_SYS_HZ) /* Timeout for Flash Erase */
 182#define CONFIG_SYS_FLASH_WRITE_TOUT     (100*CONFIG_SYS_HZ) /* Timeout for Flash Write */
 183
 184/*
 185 * JFFS2 partitions
 186 */
 187#undef CONFIG_CMD_MTDPARTS
 188#define CONFIG_JFFS2_DEV        "nor0"
 189
 190/*
 191 * NAND flash
 192 */
 193#define CONFIG_NAND_MXC
 194#define CONFIG_MXC_NAND_REGS_BASE       NFC_BASE_ADDR
 195#define CONFIG_SYS_MAX_NAND_DEVICE      1
 196#define CONFIG_SYS_NAND_BASE            NFC_BASE_ADDR
 197#define CONFIG_MXC_NAND_HWECC
 198
 199#endif /* __CONFIG_H */
 200