uboot/include/post.h
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   1/*
   2 * (C) Copyright 2002
   3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
   4 *
   5 * (C) Copyright 2010
   6 * Michael Zaidman, Kodak, michael.zaidman@kodak.com
   7 * post_word_{load|store} cleanup.
   8 *
   9 * See file CREDITS for list of people who contributed to this
  10 * project.
  11 *
  12 * This program is free software; you can redistribute it and/or
  13 * modify it under the terms of the GNU General Public License as
  14 * published by the Free Software Foundation; either version 2 of
  15 * the License, or (at your option) any later version.
  16 *
  17 * This program is distributed in the hope that it will be useful,
  18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
  19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  20 * GNU General Public License for more details.
  21 *
  22 * You should have received a copy of the GNU General Public License
  23 * along with this program; if not, write to the Free Software
  24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  25 * MA 02111-1307 USA
  26 */
  27#ifndef _POST_H
  28#define _POST_H
  29
  30#ifndef __ASSEMBLY__
  31#include <common.h>
  32#include <asm/io.h>
  33
  34#if defined(CONFIG_POST) || defined(CONFIG_LOGBUFFER)
  35
  36#ifdef CONFIG_SYS_POST_WORD_ADDR
  37#define _POST_WORD_ADDR CONFIG_SYS_POST_WORD_ADDR
  38#else
  39
  40#ifdef CONFIG_MPC5xxx
  41#define _POST_WORD_ADDR (MPC5XXX_SRAM + MPC5XXX_SRAM_POST_SIZE)
  42
  43#elif defined(CONFIG_MPC512X)
  44#define _POST_WORD_ADDR \
  45        (CONFIG_SYS_SRAM_BASE + CONFIG_SYS_GBL_DATA_OFFSET - 0x4)
  46
  47#elif defined(CONFIG_8xx)
  48#define _POST_WORD_ADDR \
  49        (((immap_t *)CONFIG_SYS_IMMR)->im_cpm.cp_dpmem + CPM_POST_WORD_ADDR)
  50
  51#elif defined(CONFIG_MPC8260)
  52#include <asm/cpm_8260.h>
  53#define _POST_WORD_ADDR (CONFIG_SYS_IMMR + CPM_POST_WORD_ADDR)
  54
  55#elif defined(CONFIG_MPC8360)
  56#include <asm/immap_qe.h>
  57#define _POST_WORD_ADDR (CONFIG_SYS_IMMR + CPM_POST_WORD_ADDR)
  58
  59#elif defined (CONFIG_MPC85xx)
  60#include <asm/immap_85xx.h>
  61#define _POST_WORD_ADDR (CONFIG_SYS_IMMR + CONFIG_SYS_MPC85xx_PIC_OFFSET + \
  62                                offsetof(ccsr_pic_t, tfrr))
  63
  64#elif defined (CONFIG_MPC86xx)
  65#include <asm/immap_86xx.h>
  66#define _POST_WORD_ADDR (CONFIG_SYS_IMMR + CONFIG_SYS_MPC86xx_PIC_OFFSET + \
  67                                offsetof(ccsr_pic_t, tfrr))
  68
  69#elif defined (CONFIG_4xx)
  70#define _POST_WORD_ADDR \
  71        (CONFIG_SYS_OCM_DATA_ADDR + CONFIG_SYS_GBL_DATA_OFFSET - 0x4)
  72#endif
  73
  74#ifndef _POST_WORD_ADDR
  75#error "_POST_WORD_ADDR currently not implemented for this platform!"
  76#endif
  77#endif /* CONFIG_SYS_POST_WORD_ADDR */
  78
  79static inline ulong post_word_load (void)
  80{
  81        return in_le32((volatile void *)(_POST_WORD_ADDR));
  82}
  83
  84static inline void post_word_store (ulong value)
  85{
  86        out_le32((volatile void *)(_POST_WORD_ADDR), value);
  87}
  88#endif /* defined (CONFIG_POST) || defined(CONFIG_LOGBUFFER) */
  89#endif /* __ASSEMBLY__ */
  90
  91#ifdef CONFIG_POST
  92
  93#define POST_POWERON            0x01    /* test runs on power-on booting */
  94#define POST_NORMAL             0x02    /* test runs on normal booting */
  95#define POST_SLOWTEST           0x04    /* test is slow, enabled by key press */
  96#define POST_POWERTEST          0x08    /* test runs after watchdog reset */
  97
  98#define POST_COLDBOOT           0x80    /* first boot after power-on */
  99
 100#define POST_ROM                0x0100  /* test runs in ROM */
 101#define POST_RAM                0x0200  /* test runs in RAM */
 102#define POST_MANUAL             0x0400  /* test runs on diag command */
 103#define POST_REBOOT             0x0800  /* test may cause rebooting */
 104#define POST_PREREL             0x1000  /* test runs before relocation */
 105
 106#define POST_CRITICAL           0x2000  /* Use failbootcmd if test failed */
 107#define POST_STOP               0x4000  /* Interrupt POST sequence on fail */
 108
 109#define POST_MEM                (POST_RAM | POST_ROM)
 110#define POST_ALWAYS             (POST_NORMAL    | \
 111                                 POST_SLOWTEST  | \
 112                                 POST_MANUAL    | \
 113                                 POST_POWERON   )
 114
 115#define POST_FAIL_SAVE          0x80
 116
 117#define POST_BEFORE             1
 118#define POST_AFTER              0
 119#define POST_PASSED             1
 120#define POST_FAILED             0
 121
 122#ifndef __ASSEMBLY__
 123
 124struct post_test {
 125        char *name;
 126        char *cmd;
 127        char *desc;
 128        int flags;
 129        int (*test) (int flags);
 130        int (*init_f) (void);
 131        void (*reloc) (void);
 132        unsigned long testid;
 133};
 134int post_init_f (void);
 135void post_bootmode_init (void);
 136int post_bootmode_get (unsigned int * last_test);
 137void post_bootmode_clear (void);
 138void post_output_backlog ( void );
 139int post_run (char *name, int flags);
 140int post_info (char *name);
 141int post_log (char *format, ...);
 142#ifdef CONFIG_NEEDS_MANUAL_RELOC
 143void post_reloc (void);
 144#endif
 145unsigned long post_time_ms (unsigned long base);
 146
 147extern struct post_test post_list[];
 148extern unsigned int post_list_size;
 149extern int post_hotkeys_pressed(void);
 150extern int memory_post_test(int flags);
 151
 152/*
 153 *  If GCC is configured to use a version of GAS that supports
 154 * the .gnu_attribute directive, it will use that directive to
 155 * record certain properties of the output code.
 156 *  This feature is new to GCC 4.3.0.
 157 *  .gnu_attribute is new to GAS 2.18.
 158 */
 159#if (__GNUC__ >= 4 && __GNUC_MINOR__ >= 3)
 160/* Tag_GNU_Power_ABI_FP/soft-float */
 161#define GNU_FPOST_ATTR  asm(".gnu_attribute     4, 2");
 162#else
 163#define GNU_FPOST_ATTR
 164#endif /* __GNUC__ */
 165#endif /* __ASSEMBLY__ */
 166
 167#define CONFIG_SYS_POST_RTC             0x00000001
 168#define CONFIG_SYS_POST_WATCHDOG        0x00000002
 169#define CONFIG_SYS_POST_MEMORY          0x00000004
 170#define CONFIG_SYS_POST_CPU             0x00000008
 171#define CONFIG_SYS_POST_I2C             0x00000010
 172#define CONFIG_SYS_POST_CACHE           0x00000020
 173#define CONFIG_SYS_POST_UART            0x00000040
 174#define CONFIG_SYS_POST_ETHER           0x00000080
 175#define CONFIG_SYS_POST_SPI             0x00000100
 176#define CONFIG_SYS_POST_USB             0x00000200
 177#define CONFIG_SYS_POST_SPR             0x00000400
 178#define CONFIG_SYS_POST_SYSMON          0x00000800
 179#define CONFIG_SYS_POST_DSP             0x00001000
 180#define CONFIG_SYS_POST_OCM             0x00002000
 181#define CONFIG_SYS_POST_FPU             0x00004000
 182#define CONFIG_SYS_POST_ECC             0x00008000
 183#define CONFIG_SYS_POST_BSPEC1          0x00010000
 184#define CONFIG_SYS_POST_BSPEC2          0x00020000
 185#define CONFIG_SYS_POST_BSPEC3          0x00040000
 186#define CONFIG_SYS_POST_BSPEC4          0x00080000
 187#define CONFIG_SYS_POST_BSPEC5          0x00100000
 188#define CONFIG_SYS_POST_CODEC           0x00200000
 189#define CONFIG_SYS_POST_COPROC          0x00400000
 190#define CONFIG_SYS_POST_FLASH           0x00800000
 191
 192#endif /* CONFIG_POST */
 193
 194#endif /* _POST_H */
 195