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24#include <common.h>
25
26#include <asm/io.h>
27#include <asm/string.h>
28
29#include "onenand_ipl.h"
30
31#define onenand_block_address(block) (block)
32#define onenand_sector_address(page) (page << 2)
33#define onenand_buffer_address() ((1 << 3) << 8)
34#define onenand_bufferram_address(block) (0)
35
36#ifdef __HAVE_ARCH_MEMCPY32
37extern void *memcpy32(void *dest, void *src, int size);
38#endif
39
40int (*onenand_read_page)(ulong block, ulong page, u_char *buf, int pagesize);
41
42
43static int generic_onenand_read_page(ulong block, ulong page,
44 u_char * buf, int pagesize)
45{
46 unsigned long *base;
47
48#ifndef __HAVE_ARCH_MEMCPY32
49 unsigned int offset, value;
50 unsigned long *p;
51#endif
52
53 onenand_writew(onenand_block_address(block),
54 ONENAND_REG_START_ADDRESS1);
55
56 onenand_writew(onenand_bufferram_address(block),
57 ONENAND_REG_START_ADDRESS2);
58
59 onenand_writew(onenand_sector_address(page),
60 ONENAND_REG_START_ADDRESS8);
61
62 onenand_writew(onenand_buffer_address(),
63 ONENAND_REG_START_BUFFER);
64
65 onenand_writew(ONENAND_INT_CLEAR, ONENAND_REG_INTERRUPT);
66
67 onenand_writew(ONENAND_CMD_READ, ONENAND_REG_COMMAND);
68
69#ifndef __HAVE_ARCH_MEMCPY32
70 p = (unsigned long *) buf;
71#endif
72 base = (unsigned long *) (CONFIG_SYS_ONENAND_BASE + ONENAND_DATARAM);
73
74 while (!(READ_INTERRUPT() & ONENAND_INT_READ))
75 continue;
76
77
78 if (page < 2 && (onenand_readw(ONENAND_SPARERAM) != 0xffff))
79 return 1;
80
81#ifdef __HAVE_ARCH_MEMCPY32
82
83 memcpy32(buf, base, pagesize);
84#else
85 for (offset = 0; offset < (pagesize >> 2); offset++) {
86 value = *(base + offset);
87 *p++ = value;
88 }
89#endif
90
91 return 0;
92}
93
94#ifndef CONFIG_ONENAND_START_PAGE
95#define CONFIG_ONENAND_START_PAGE 1
96#endif
97#define ONENAND_PAGES_PER_BLOCK 64
98
99static void onenand_generic_init(int *page_is_4KiB, int *page)
100{
101 int dev_id, density;
102
103 if (onenand_readw(ONENAND_REG_TECHNOLOGY))
104 *page_is_4KiB = 1;
105 dev_id = onenand_readw(ONENAND_REG_DEVICE_ID);
106 density = dev_id >> ONENAND_DEVICE_DENSITY_SHIFT;
107 density &= ONENAND_DEVICE_DENSITY_MASK;
108 if (density >= ONENAND_DEVICE_DENSITY_4Gb &&
109 !(dev_id & ONENAND_DEVICE_IS_DDP))
110 *page_is_4KiB = 1;
111}
112
113
114
115
116
117
118int onenand_read_block(unsigned char *buf)
119{
120 int block, nblocks;
121 int page = CONFIG_ONENAND_START_PAGE, offset = 0;
122 int pagesize, erasesize, erase_shift;
123 int page_is_4KiB = 0;
124
125 onenand_read_page = generic_onenand_read_page;
126
127 onenand_generic_init(&page_is_4KiB, &page);
128
129 if (page_is_4KiB) {
130 pagesize = 4096;
131 erase_shift = 18;
132 } else {
133 pagesize = 2048;
134 erase_shift = 17;
135 }
136
137 erasesize = (1 << erase_shift);
138 nblocks = (CONFIG_SYS_MONITOR_LEN + erasesize - 1) >> erase_shift;
139
140
141
142 for (block = 0; block < nblocks; block++) {
143 for (; page < ONENAND_PAGES_PER_BLOCK; page++) {
144 if (onenand_read_page(block, page, buf + offset,
145 pagesize)) {
146
147
148 offset -= page * pagesize;
149 nblocks++;
150 break;
151 }
152 offset += pagesize;
153 }
154 page = 0;
155 }
156
157 return 0;
158}
159