uboot/arch/arm/cpu/arm926ejs/at91/at91sam9263_devices.c
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   1/*
   2 * (C) Copyright 2007-2008
   3 * Stelian Pop <stelian@popies.net>
   4 * Lead Tech Design <www.leadtechdesign.com>
   5 *
   6 * (C) Copyright 2009-2011
   7 * Daniel Gorsulowski <daniel.gorsulowski@esd.eu>
   8 * esd electronic system design gmbh <www.esd.eu>
   9 *
  10 * See file CREDITS for list of people who contributed to this
  11 * project.
  12 *
  13 * This program is free software; you can redistribute it and/or
  14 * modify it under the terms of the GNU General Public License as
  15 * published by the Free Software Foundation; either version 2 of
  16 * the License, or (at your option) any later version.
  17 *
  18 * This program is distributed in the hope that it will be useful,
  19 * but WITHOUT ANY WARRANTY; without even the implied warranty of
  20 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  21 * GNU General Public License for more details.
  22 *
  23 * You should have received a copy of the GNU General Public License
  24 * along with this program; if not, write to the Free Software
  25 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  26 * MA 02111-1307 USA
  27 */
  28
  29#include <common.h>
  30#include <asm/io.h>
  31#include <asm/arch/at91_common.h>
  32#include <asm/arch/at91_pmc.h>
  33#include <asm/arch/gpio.h>
  34
  35/*
  36 * if CONFIG_AT91_GPIO_PULLUP ist set, keep pullups on on all
  37 * peripheral pins. Good to have if hardware is soldered optionally
  38 * or in case of SPI no slave is selected. Avoid lines to float
  39 * needlessly. Use a short local PUP define.
  40 *
  41 * Due to errata "TXD floats when CTS is inactive" pullups are always
  42 * on for TXD pins.
  43 */
  44#ifdef CONFIG_AT91_GPIO_PULLUP
  45# define PUP CONFIG_AT91_GPIO_PULLUP
  46#else
  47# define PUP 0
  48#endif
  49
  50void at91_serial0_hw_init(void)
  51{
  52        at91_pmc_t      *pmc    = (at91_pmc_t *) ATMEL_BASE_PMC;
  53
  54        at91_set_a_periph(AT91_PIO_PORTA, 26, 1);               /* TXD0 */
  55        at91_set_a_periph(AT91_PIO_PORTA, 27, PUP);             /* RXD0 */
  56        writel(1 << ATMEL_ID_USART0, &pmc->pcer);
  57}
  58
  59void at91_serial1_hw_init(void)
  60{
  61        at91_pmc_t      *pmc    = (at91_pmc_t *) ATMEL_BASE_PMC;
  62
  63        at91_set_a_periph(AT91_PIO_PORTD, 0, 1);                /* TXD1 */
  64        at91_set_a_periph(AT91_PIO_PORTD, 1, PUP);              /* RXD1 */
  65        writel(1 << ATMEL_ID_USART1, &pmc->pcer);
  66}
  67
  68void at91_serial2_hw_init(void)
  69{
  70        at91_pmc_t      *pmc    = (at91_pmc_t *) ATMEL_BASE_PMC;
  71
  72        at91_set_a_periph(AT91_PIO_PORTD, 2, 1);                /* TXD2 */
  73        at91_set_a_periph(AT91_PIO_PORTD, 3, PUP);              /* RXD2 */
  74        writel(1 << ATMEL_ID_USART2, &pmc->pcer);
  75}
  76
  77void at91_seriald_hw_init(void)
  78{
  79        at91_pmc_t      *pmc    = (at91_pmc_t *) ATMEL_BASE_PMC;
  80
  81        at91_set_a_periph(AT91_PIO_PORTC, 30, PUP);             /* DRXD */
  82        at91_set_a_periph(AT91_PIO_PORTC, 31, 1);               /* DTXD */
  83        writel(1 << ATMEL_ID_SYS, &pmc->pcer);
  84}
  85
  86#if defined(CONFIG_HAS_DATAFLASH) || defined(CONFIG_ATMEL_SPI)
  87void at91_spi0_hw_init(unsigned long cs_mask)
  88{
  89        at91_pmc_t      *pmc    = (at91_pmc_t *) ATMEL_BASE_PMC;
  90
  91        at91_set_b_periph(AT91_PIO_PORTA, 0, PUP);      /* SPI0_MISO */
  92        at91_set_b_periph(AT91_PIO_PORTA, 1, PUP);      /* SPI0_MOSI */
  93        at91_set_b_periph(AT91_PIO_PORTA, 2, PUP);      /* SPI0_SPCK */
  94
  95        /* Enable clock */
  96        writel(1 << ATMEL_ID_SPI0, &pmc->pcer);
  97
  98        if (cs_mask & (1 << 0)) {
  99                at91_set_b_periph(AT91_PIO_PORTA, 5, 1);
 100        }
 101        if (cs_mask & (1 << 1)) {
 102                at91_set_b_periph(AT91_PIO_PORTA, 3, 1);
 103        }
 104        if (cs_mask & (1 << 2)) {
 105                at91_set_b_periph(AT91_PIO_PORTA, 4, 1);
 106        }
 107        if (cs_mask & (1 << 3)) {
 108                at91_set_b_periph(AT91_PIO_PORTB, 11, 1);
 109        }
 110        if (cs_mask & (1 << 4)) {
 111                at91_set_pio_output(AT91_PIO_PORTA, 5, 1);
 112        }
 113        if (cs_mask & (1 << 5)) {
 114                at91_set_pio_output(AT91_PIO_PORTA, 3, 1);
 115        }
 116        if (cs_mask & (1 << 6)) {
 117                at91_set_pio_output(AT91_PIO_PORTA, 4, 1);
 118        }
 119        if (cs_mask & (1 << 7)) {
 120                at91_set_pio_output(AT91_PIO_PORTB, 11, 1);
 121        }
 122}
 123
 124void at91_spi1_hw_init(unsigned long cs_mask)
 125{
 126        at91_pmc_t      *pmc    = (at91_pmc_t *) ATMEL_BASE_PMC;
 127
 128        at91_set_a_periph(AT91_PIO_PORTB, 12, PUP);     /* SPI1_MISO */
 129        at91_set_a_periph(AT91_PIO_PORTB, 13, PUP);     /* SPI1_MOSI */
 130        at91_set_a_periph(AT91_PIO_PORTB, 14, PUP);     /* SPI1_SPCK */
 131
 132        /* Enable clock */
 133        writel(1 << ATMEL_ID_SPI1, &pmc->pcer);
 134
 135        if (cs_mask & (1 << 0)) {
 136                at91_set_a_periph(AT91_PIO_PORTB, 15, 1);
 137        }
 138        if (cs_mask & (1 << 1)) {
 139                at91_set_a_periph(AT91_PIO_PORTB, 16, 1);
 140        }
 141        if (cs_mask & (1 << 2)) {
 142                at91_set_a_periph(AT91_PIO_PORTB, 17, 1);
 143        }
 144        if (cs_mask & (1 << 3)) {
 145                at91_set_a_periph(AT91_PIO_PORTB, 18, 1);
 146        }
 147        if (cs_mask & (1 << 4)) {
 148                at91_set_pio_output(AT91_PIO_PORTB, 15, 1);
 149        }
 150        if (cs_mask & (1 << 5)) {
 151                at91_set_pio_output(AT91_PIO_PORTB, 16, 1);
 152        }
 153        if (cs_mask & (1 << 6)) {
 154                at91_set_pio_output(AT91_PIO_PORTB, 17, 1);
 155        }
 156        if (cs_mask & (1 << 7)) {
 157                at91_set_pio_output(AT91_PIO_PORTB, 18, 1);
 158        }
 159}
 160#endif
 161
 162#ifdef CONFIG_MACB
 163void at91_macb_hw_init(void)
 164{
 165        at91_set_a_periph(AT91_PIO_PORTE, 21, 0);       /* ETXCK_EREFCK */
 166        at91_set_b_periph(AT91_PIO_PORTC, 25, 0);       /* ERXDV */
 167        at91_set_a_periph(AT91_PIO_PORTE, 25, 0);       /* ERX0 */
 168        at91_set_a_periph(AT91_PIO_PORTE, 26, 0);       /* ERX1 */
 169        at91_set_a_periph(AT91_PIO_PORTE, 27, 0);       /* ERXER */
 170        at91_set_a_periph(AT91_PIO_PORTE, 28, 0);       /* ETXEN */
 171        at91_set_a_periph(AT91_PIO_PORTE, 23, 0);       /* ETX0 */
 172        at91_set_a_periph(AT91_PIO_PORTE, 24, 0);       /* ETX1 */
 173        at91_set_a_periph(AT91_PIO_PORTE, 30, 0);       /* EMDIO */
 174        at91_set_a_periph(AT91_PIO_PORTE, 29, 0);       /* EMDC */
 175
 176#ifndef CONFIG_RMII
 177        at91_set_a_periph(AT91_PIO_PORTE, 22, 0);       /* ECRS */
 178        at91_set_b_periph(AT91_PIO_PORTC, 26, 0);       /* ECOL */
 179        at91_set_b_periph(AT91_PIO_PORTC, 22, 0);       /* ERX2 */
 180        at91_set_b_periph(AT91_PIO_PORTC, 23, 0);       /* ERX3 */
 181        at91_set_b_periph(AT91_PIO_PORTC, 27, 0);       /* ERXCK */
 182        at91_set_b_periph(AT91_PIO_PORTC, 20, 0);       /* ETX2 */
 183        at91_set_b_periph(AT91_PIO_PORTC, 21, 0);       /* ETX3 */
 184        at91_set_b_periph(AT91_PIO_PORTC, 24, 0);       /* ETXER */
 185#endif
 186}
 187#endif
 188
 189#ifdef CONFIG_USB_OHCI_NEW
 190void at91_uhp_hw_init(void)
 191{
 192        /* Enable VBus on UHP ports */
 193        at91_set_pio_output(AT91_PIO_PORTA, 21, 0);
 194        at91_set_pio_output(AT91_PIO_PORTA, 24, 0);
 195}
 196#endif
 197
 198#ifdef CONFIG_AT91_CAN
 199void at91_can_hw_init(void)
 200{
 201        at91_pmc_t      *pmc    = (at91_pmc_t *) ATMEL_BASE_PMC;
 202
 203        at91_set_a_periph(AT91_PIO_PORTA, 13, 0);       /* CAN_TX */
 204        at91_set_a_periph(AT91_PIO_PORTA, 14, 1);       /* CAN_RX */
 205
 206        /* Enable clock */
 207        writel(1 << ATMEL_ID_CAN, &pmc->pcer);
 208}
 209#endif
 210