LXR uboot/arch/powerpc/cpu/mpc85xx/mpc8569

   1/*
   2 * Copyright 2010 Freescale Semiconductor, Inc.
   3 *
   4 * See file CREDITS for list of people who contributed to this
   5 * project.
   6 *
   7 * This program is free software; you can redistribute it and/or
   8 * modify it under the terms of the GNU General Public License as
   9 * published by the Free Software Foundation; either version 2 of
  10 * the License, or (at your option) any later version.
  11 *
  12 * This program is distributed in the hope that it will be useful,
  13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15 * GNU General Public License for more details.
  16 *
  17 * You should have received a copy of the GNU General Public License
  18 * along with this program; if not, write to the Free Software
  19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  20 * MA 02111-1307 USA
  21 */
  22
  23#include <config.h>
  24#include <common.h>
  25#include <asm/io.h>
  26#include <asm/immap_85xx.h>
  27#include <asm/fsl_serdes.h>
  28
  29#define SRDS1_MAX_LANES         4
  30
  31static u32 serdes1_prtcl_map;
  32
  33static u8 serdes1_cfg_tbl[][SRDS1_MAX_LANES] = {
  34        [0x0] = {PCIE1, NONE, NONE, NONE},
  35        [0x1] = {SRIO1, SRIO2, SGMII_TSEC1, SGMII_TSEC2},
  36        [0x2] = {SRIO1, SRIO2, SGMII_TSEC1, SGMII_TSEC2},
  37        [0x3] = {SRIO1, SRIO2, NONE, NONE},
  38        [0x4] = {PCIE1, NONE, SGMII_TSEC1, SGMII_TSEC2},
  39        [0x5] = {PCIE1, PCIE1, SGMII_TSEC1, SGMII_TSEC2},
  40        [0x6] = {PCIE1, NONE, SRIO1, SRIO2},
  41        [0x7] = {PCIE1, PCIE1, SRIO1, SRIO2},
  42        [0x8] = {PCIE1, PCIE1, SRIO1, SRIO2},
  43        [0x9] = {SRIO1, SRIO1, SRIO1, SRIO1},
  44        [0xa] = {SRIO1, SRIO1, SRIO1, SRIO1},
  45        [0xb] = {SRIO1, SRIO1, SRIO1, SRIO1},
  46        [0xc] = {PCIE1, SRIO1, SGMII_TSEC1, SGMII_TSEC2},
  47        [0xf] = {PCIE1, PCIE1, PCIE1, PCIE1},
  48};
  49
  50int is_serdes_configured(enum srds_prtcl prtcl)
  51{
  52        return (1 << prtcl) & serdes1_prtcl_map;
  53}
  54
  55void fsl_serdes_init(void)
  56{
  57        ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
  58        u32 pordevsr = in_be32(&gur->pordevsr);
  59        u32 srds_cfg = (pordevsr & MPC85xx_PORDEVSR_IO_SEL) >>
  60                                MPC85xx_PORDEVSR_IO_SEL_SHIFT;
  61        int lane;
  62
  63        debug("PORDEVSR[IO_SEL_SRDS] = %x\n", srds_cfg);
  64
  65        if (srds_cfg > ARRAY_SIZE(serdes1_cfg_tbl)) {
  66                printf("Invalid PORDEVSR[IO_SEL_SRDS] = %d\n", srds_cfg);
  67                return;
  68        }
  69
  70        for (lane = 0; lane < SRDS1_MAX_LANES; lane++) {
  71                enum srds_prtcl lane_prtcl = serdes1_cfg_tbl[srds_cfg][lane];
  72                serdes1_prtcl_map |= (1 << lane_prtcl);
  73        }
  74}
  75