LXR uboot/arch/x86/lib/pci.c

   1/*
   2 * (C) Copyright 2002
   3 * Daniel Engström, Omicron Ceti AB, <daniel@omicron.se>
   4 *
   5 * See file CREDITS for list of people who contributed to this
   6 * project.
   7 *
   8 * This program is free software; you can redistribute it and/or
   9 * modify it under the terms of the GNU General Public License as
  10 * published by the Free Software Foundation; either version 2 of
  11 * the License, or (at your option) any later version.
  12 *
  13 * This program is distributed in the hope that it will be useful,
  14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16 * GNU General Public License for more details.
  17 *
  18 * You should have received a copy of the GNU General Public License
  19 * along with this program; if not, write to the Free Software
  20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  21 * MA 02111-1307 USA
  22 */
  23
  24#include <common.h>
  25#include <pci.h>
  26#include <asm/io.h>
  27#include <asm/pci.h>
  28
  29#undef PCI_ROM_SCAN_VERBOSE
  30
  31int pci_shadow_rom(pci_dev_t dev, unsigned char *dest)
  32{
  33        struct pci_controller *hose;
  34        int res = -1;
  35        int i;
  36
  37        u32 rom_addr;
  38        u32 addr_reg;
  39        u32 size;
  40
  41        u16 vendor;
  42        u16 device;
  43        u32 class_code;
  44
  45        u32 pci_data;
  46
  47        hose = pci_bus_to_hose(PCI_BUS(dev));
  48
  49        debug("pci_shadow_rom() asked to shadow device %x to %x\n",
  50               dev, (u32)dest);
  51
  52        pci_read_config_word(dev, PCI_VENDOR_ID, &vendor);
  53        pci_read_config_word(dev, PCI_DEVICE_ID, &device);
  54        pci_read_config_dword(dev, PCI_CLASS_REVISION, &class_code);
  55
  56        class_code &= 0xffffff00;
  57        class_code >>= 8;
  58
  59        debug("PCI Header Vendor %04x device %04x class %06x\n",
  60               vendor, device, class_code);
  61
  62        /* Enable the rom addess decoder */
  63        pci_write_config_dword(dev, PCI_ROM_ADDRESS, (u32)PCI_ROM_ADDRESS_MASK);
  64        pci_read_config_dword(dev, PCI_ROM_ADDRESS, &addr_reg);
  65
  66        if (!addr_reg) {
  67                /* register unimplemented */
  68                printf("pci_chadow_rom: device do not seem to have a rom\n");
  69                return -1;
  70        }
  71
  72        size = (~(addr_reg&PCI_ROM_ADDRESS_MASK)) + 1;
  73
  74        debug("ROM is %d bytes\n", size);
  75
  76        rom_addr = pci_get_rom_window(hose, size);
  77
  78        debug("ROM mapped at %x\n", rom_addr);
  79
  80        pci_write_config_dword(dev, PCI_ROM_ADDRESS,
  81                               pci_phys_to_mem(dev, rom_addr)
  82                               |PCI_ROM_ADDRESS_ENABLE);
  83
  84
  85        for (i = rom_addr; i < rom_addr + size; i += 512) {
  86                if (readw(i) == 0xaa55) {
  87#ifdef PCI_ROM_SCAN_VERBOSE
  88                        printf("ROM signature found\n");
  89#endif
  90                        pci_data = readw(0x18 + i);
  91                        pci_data += i;
  92
  93                        if (0 == memcmp((void *)pci_data, "PCIR", 4)) {
  94#ifdef PCI_ROM_SCAN_VERBOSE
  95                                printf("Fount PCI rom image at offset %d\n",
  96                                       i - rom_addr);
  97                                printf("Vendor %04x device %04x class %06x\n",
  98                                       readw(pci_data + 4), readw(pci_data + 6),
  99                                       readl(pci_data + 0x0d) & 0xffffff);
 100                                printf("%s\n",
 101                                       (readw(pci_data + 0x15) & 0x80) ?
 102                                       "Last image" : "More images follow");
 103                                switch  (readb(pci_data + 0x14)) {
 104                                case 0:
 105                                        printf("X86 code\n");
 106                                        break;
 107                                case 1:
 108                                        printf("Openfirmware code\n");
 109                                        break;
 110                                case 2:
 111                                        printf("PARISC code\n");
 112                                        break;
 113                                }
 114                                printf("Image size %d\n",
 115                                       readw(pci_data + 0x10) * 512);
 116#endif
 117                                /*
 118                                 * FixMe: I think we should compare the class
 119                                 * code bytes as well but I have no reference
 120                                 * on the exact order of these bytes in the PCI
 121                                 * ROM header
 122                                 */
 123                                if (readw(pci_data + 4) == vendor &&
 124                                    readw(pci_data + 6) == device &&
 125                                    readb(pci_data + 0x14) == 0) {
 126#ifdef PCI_ROM_SCAN_VERBOSE
 127                                        printf("Suitable ROM image found\n");
 128#endif
 129                                        memmove(dest, (void *)rom_addr,
 130                                                readw(pci_data + 0x10) * 512);
 131                                        res = 0;
 132                                        break;
 133
 134                                }
 135
 136                                if (readw(pci_data + 0x15) & 0x80)
 137                                        break;
 138                        }
 139                }
 140
 141        }
 142
 143#ifdef PCI_ROM_SCAN_VERBOSE
 144        if (res)
 145                printf("No suitable image found\n");
 146#endif
 147        /* disable PAR register and PCI device ROM address devocer */
 148        pci_remove_rom_window(hose, rom_addr);
 149
 150        pci_write_config_dword(dev, PCI_ROM_ADDRESS, 0);
 151
 152        return res;
 153}
 154
 155#ifdef PCI_BIOS_DEBUG
 156
 157void print_bios_bios_stat(void)
 158{
 159        printf("16 bit functions:\n");
 160        printf("pci_bios_present:                %d\n",
 161                        RELOC_16_LONG(0xf000, num_pci_bios_present));
 162        printf("pci_bios_find_device:            %d\n",
 163                        RELOC_16_LONG(0xf000, num_pci_bios_find_device));
 164        printf("pci_bios_find_class:             %d\n",
 165                        RELOC_16_LONG(0xf000, num_pci_bios_find_class));
 166        printf("pci_bios_generate_special_cycle: %d\n",
 167                        RELOC_16_LONG(0xf000,
 168                                      num_pci_bios_generate_special_cycle));
 169        printf("pci_bios_read_cfg_byte:          %d\n",
 170                        RELOC_16_LONG(0xf000, num_pci_bios_read_cfg_byte));
 171        printf("pci_bios_read_cfg_word:          %d\n",
 172                        RELOC_16_LONG(0xf000, num_pci_bios_read_cfg_word));
 173        printf("pci_bios_read_cfg_dword:         %d\n",
 174                        RELOC_16_LONG(0xf000, num_pci_bios_read_cfg_dword));
 175        printf("pci_bios_write_cfg_byte:         %d\n",
 176                        RELOC_16_LONG(0xf000, num_pci_bios_write_cfg_byte));
 177        printf("pci_bios_write_cfg_word:         %d\n",
 178                        RELOC_16_LONG(0xf000, num_pci_bios_write_cfg_word));
 179        printf("pci_bios_write_cfg_dword:        %d\n",
 180                        RELOC_16_LONG(0xf000, num_pci_bios_write_cfg_dword));
 181        printf("pci_bios_get_irq_routing:        %d\n",
 182                        RELOC_16_LONG(0xf000, num_pci_bios_get_irq_routing));
 183        printf("pci_bios_set_irq:                %d\n",
 184                        RELOC_16_LONG(0xf000, num_pci_bios_set_irq));
 185        printf("pci_bios_unknown_function:       %d\n",
 186                        RELOC_16_LONG(0xf000, num_pci_bios_unknown_function));
 187}
 188#endif
 189