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29#include <common.h>
30#include <config.h>
31#include <asm/io.h>
32#include <asm/arch/hardware.h>
33#include <asm/types.h>
34#include <asm/io.h>
35#include <asm/errno.h>
36
37#include "prcmu-fw.h"
38
39
40#define PRCM_MBOX_CPU_VAL (U8500_PRCMU_BASE + 0x0fc)
41#define PRCM_MBOX_CPU_SET (U8500_PRCMU_BASE + 0x100)
42#define PRCM_MBOX_CPU_CLR (U8500_PRCMU_BASE + 0x104)
43
44static int prcmu_is_ready(void)
45{
46 int ready = readb(PRCM_XP70_CUR_PWR_STATE) == AP_EXECUTE;
47 if (!ready)
48 printf("PRCMU firmware not ready\n");
49 return ready;
50}
51
52static int _wait_for_req_complete(int num)
53{
54 int timeout = 1000;
55
56
57 while ((readl(PRCM_MBOX_CPU_VAL) & (1 << num)) && timeout--)
58 ;
59
60 timeout = 1000;
61
62
63 writel(1 << num, PRCM_MBOX_CPU_SET);
64
65 while ((readl(PRCM_MBOX_CPU_VAL) & (1 << num)) && timeout--)
66 ;
67
68 if (!timeout) {
69 printf("PRCMU operation timed out\n");
70 return -1;
71 }
72
73 return 0;
74}
75
76
77
78
79
80
81
82int prcmu_i2c_read(u8 reg, u16 slave)
83{
84 uint8_t i2c_status;
85 uint8_t i2c_val;
86
87 if (!prcmu_is_ready())
88 return -1;
89
90 debug("\nprcmu_4500_i2c_read:bank=%x;reg=%x;\n",
91 reg, slave);
92
93
94 writeb((reg << 1) | I2CREAD, PRCM_REQ_MB5_I2COPTYPE_REG);
95 writeb((1 << 3) | 0x0, PRCM_REQ_MB5_BIT_FIELDS);
96 writeb(slave, PRCM_REQ_MB5_I2CSLAVE);
97 writeb(0, PRCM_REQ_MB5_I2CVAL);
98
99 _wait_for_req_complete(REQ_MB5);
100
101
102 debug("ack-mb5:transfer status = %x\n",
103 readb(PRCM_ACK_MB5_STATUS));
104 debug("ack-mb5:reg bank = %x\n", readb(PRCM_ACK_MB5) >> 1);
105 debug("ack-mb5:slave_add = %x\n",
106 readb(PRCM_ACK_MB5_SLAVE));
107 debug("ack-mb5:reg_val = %d\n", readb(PRCM_ACK_MB5_VAL));
108
109 i2c_status = readb(PRCM_ACK_MB5_STATUS);
110 i2c_val = readb(PRCM_ACK_MB5_VAL);
111
112 if (i2c_status == I2C_RD_OK)
113 return i2c_val;
114 else {
115
116 printf("prcmu_i2c_read:read return status= %d\n",
117 i2c_status);
118 return -1;
119 }
120
121}
122
123
124
125
126
127
128
129
130int prcmu_i2c_write(u8 reg, u16 slave, u8 reg_data)
131{
132 uint8_t i2c_status;
133
134 if (!prcmu_is_ready())
135 return -1;
136
137 debug("\nprcmu_4500_i2c_write:bank=%x;reg=%x;\n",
138 reg, slave);
139
140
141 writeb((reg << 1) | I2CWRITE, PRCM_REQ_MB5_I2COPTYPE_REG);
142 writeb((1 << 3) | 0x0, PRCM_REQ_MB5_BIT_FIELDS);
143 writeb(slave, PRCM_REQ_MB5_I2CSLAVE);
144 writeb(reg_data, PRCM_REQ_MB5_I2CVAL);
145
146 debug("\ncpu_is_u8500v11\n");
147 _wait_for_req_complete(REQ_MB5);
148
149
150 debug("ack-mb5:transfer status = %x\n",
151 readb(PRCM_ACK_MB5_STATUS));
152 debug("ack-mb5:reg bank = %x\n", readb(PRCM_ACK_MB5) >> 1);
153 debug("ack-mb5:slave_add = %x\n",
154 readb(PRCM_ACK_MB5_SLAVE));
155 debug("ack-mb5:reg_val = %d\n", readb(PRCM_ACK_MB5_VAL));
156
157 i2c_status = readb(PRCM_ACK_MB5_STATUS);
158 debug("\ni2c_status = %x\n", i2c_status);
159 if (i2c_status == I2C_WR_OK)
160 return 0;
161 else {
162 printf("ape-i2c: i2c_status : 0x%x\n", i2c_status);
163 return -1;
164 }
165}
166