1/*********************************************************************** 2 * 3 * (C) Copyright 2004-2009 4 * DENX Software Engineering 5 * Wolfgang Denk, wd@denx.de 6 * 7 * Simple 16550A serial driver 8 * 9 * Originally from linux source (drivers/char/ps2ser.c) 10 * 11 * Used by the PS/2 multiplexer driver (ps2mult.c) 12 * 13 ***********************************************************************/ 14 15#include <common.h> 16 17#include <asm/io.h> 18#include <asm/atomic.h> 19#include <ps2mult.h> 20/* This is needed for ns16550.h */ 21#ifndef CONFIG_SYS_NS16550_REG_SIZE 22#define CONFIG_SYS_NS16550_REG_SIZE 1 23#endif 24#include <ns16550.h> 25 26DECLARE_GLOBAL_DATA_PTR; 27 28/* #define DEBUG */ 29 30#define PS2SER_BAUD 57600 31 32#ifdef CONFIG_MPC5xxx 33#if CONFIG_PS2SERIAL == 1 34#define PSC_BASE MPC5XXX_PSC1 35#elif CONFIG_PS2SERIAL == 2 36#define PSC_BASE MPC5XXX_PSC2 37#elif CONFIG_PS2SERIAL == 3 38#define PSC_BASE MPC5XXX_PSC3 39#elif CONFIG_PS2SERIAL == 4 40#define PSC_BASE MPC5XXX_PSC4 41#elif CONFIG_PS2SERIAL == 5 42#define PSC_BASE MPC5XXX_PSC5 43#elif CONFIG_PS2SERIAL == 6 44#define PSC_BASE MPC5XXX_PSC6 45#else 46#error CONFIG_PS2SERIAL must be in 1 ... 6 47#endif 48 49#else 50 51#if CONFIG_PS2SERIAL == 1 52#define COM_BASE (CONFIG_SYS_CCSRBAR+0x4500) 53#elif CONFIG_PS2SERIAL == 2 54#define COM_BASE (CONFIG_SYS_CCSRBAR+0x4600) 55#else 56#error CONFIG_PS2SERIAL must be in 1 ... 2 57#endif 58 59#endif /* CONFIG_MPC5xxx / other */ 60 61static int ps2ser_getc_hw(void); 62static void ps2ser_interrupt(void *dev_id); 63 64extern struct serial_state rs_table[]; /* in serial.c */ 65 66static u_char ps2buf[PS2BUF_SIZE]; 67static atomic_t ps2buf_cnt; 68static int ps2buf_in_idx; 69static int ps2buf_out_idx; 70 71#ifdef CONFIG_MPC5xxx 72int ps2ser_init(void) 73{ 74 volatile struct mpc5xxx_psc *psc = (struct mpc5xxx_psc *)PSC_BASE; 75 unsigned long baseclk; 76 int div; 77 78 /* reset PSC */ 79 psc->command = PSC_SEL_MODE_REG_1; 80 81 /* select clock sources */ 82 psc->psc_clock_select = 0; 83 baseclk = (gd->ipb_clk + 16) / 32; 84 85 /* switch to UART mode */ 86 psc->sicr = 0; 87 88 /* configure parity, bit length and so on */ 89 psc->mode = PSC_MODE_8_BITS | PSC_MODE_PARNONE; 90 psc->mode = PSC_MODE_ONE_STOP; 91 92 /* set up UART divisor */ 93 div = (baseclk + (PS2SER_BAUD/2)) / PS2SER_BAUD; 94 psc->ctur = (div >> 8) & 0xff; 95 psc->ctlr = div & 0xff; 96 97 /* disable all interrupts */ 98 psc->psc_imr = 0; 99 100 /* reset and enable Rx/Tx */ 101 psc->command = PSC_RST_RX; 102 psc->command = PSC_RST_TX; 103 psc->command = PSC_RX_ENABLE | PSC_TX_ENABLE; 104 105 return (0); 106} 107 108#else 109 110int ps2ser_init(void) 111{ 112 NS16550_t com_port = (NS16550_t)COM_BASE; 113 114 com_port->ier = 0x00; 115 com_port->lcr = UART_LCR_BKSE | UART_LCR_8N1; 116 com_port->dll = (CONFIG_SYS_NS16550_CLK / 16 / PS2SER_BAUD) & 0xff; 117 com_port->dlm = ((CONFIG_SYS_NS16550_CLK / 16 / PS2SER_BAUD) >> 8) & 0xff; 118 com_port->lcr = UART_LCR_8N1; 119 com_port->mcr = (UART_MCR_DTR | UART_MCR_RTS); 120 com_port->fcr = (UART_FCR_FIFO_EN | UART_FCR_RXSR | UART_FCR_TXSR); 121 122 return (0); 123} 124 125#endif /* CONFIG_MPC5xxx / other */ 126 127void ps2ser_putc(int chr) 128{ 129#ifdef CONFIG_MPC5xxx 130 volatile struct mpc5xxx_psc *psc = (struct mpc5xxx_psc *)PSC_BASE; 131#else 132 NS16550_t com_port = (NS16550_t)COM_BASE; 133#endif 134 debug(">>>> 0x%02x\n", chr); 135 136#ifdef CONFIG_MPC5xxx 137 while (!(psc->psc_status & PSC_SR_TXRDY)); 138 139 psc->psc_buffer_8 = chr; 140#else 141 while ((com_port->lsr & UART_LSR_THRE) == 0); 142 com_port->thr = chr; 143#endif 144} 145 146static int ps2ser_getc_hw(void) 147{ 148#ifdef CONFIG_MPC5xxx 149 volatile struct mpc5xxx_psc *psc = (struct mpc5xxx_psc *)PSC_BASE; 150#else 151 NS16550_t com_port = (NS16550_t)COM_BASE; 152#endif 153 int res = -1; 154 155#ifdef CONFIG_MPC5xxx 156 if (psc->psc_status & PSC_SR_RXRDY) { 157 res = (psc->psc_buffer_8); 158 } 159#else 160 if (com_port->lsr & UART_LSR_DR) { 161 res = com_port->rbr; 162 } 163#endif 164 165 return res; 166} 167 168int ps2ser_getc(void) 169{ 170 volatile int chr; 171 int flags; 172 173 debug("<< "); 174 175 flags = disable_interrupts(); 176 177 do { 178 if (atomic_read(&ps2buf_cnt) != 0) { 179 chr = ps2buf[ps2buf_out_idx++]; 180 ps2buf_out_idx &= (PS2BUF_SIZE - 1); 181 atomic_dec(&ps2buf_cnt); 182 } else { 183 chr = ps2ser_getc_hw(); 184 } 185 } 186 while (chr < 0); 187 188 if (flags) 189 enable_interrupts(); 190 191 debug("0x%02x\n", chr); 192 193 return chr; 194} 195 196int ps2ser_check(void) 197{ 198 int flags; 199 200 flags = disable_interrupts(); 201 ps2ser_interrupt(NULL); 202 if (flags) enable_interrupts(); 203 204 return atomic_read(&ps2buf_cnt); 205} 206 207static void ps2ser_interrupt(void *dev_id) 208{ 209#ifdef CONFIG_MPC5xxx 210 volatile struct mpc5xxx_psc *psc = (struct mpc5xxx_psc *)PSC_BASE; 211#else 212 NS16550_t com_port = (NS16550_t)COM_BASE; 213#endif 214 int chr; 215 int status; 216 217 do { 218 chr = ps2ser_getc_hw(); 219#ifdef CONFIG_MPC5xxx 220 status = psc->psc_status; 221#else 222 status = com_port->lsr; 223#endif 224 if (chr < 0) continue; 225 226 if (atomic_read(&ps2buf_cnt) < PS2BUF_SIZE) { 227 ps2buf[ps2buf_in_idx++] = chr; 228 ps2buf_in_idx &= (PS2BUF_SIZE - 1); 229 atomic_inc(&ps2buf_cnt); 230 } else { 231 printf ("ps2ser.c: buffer overflow\n"); 232 } 233#ifdef CONFIG_MPC5xxx 234 } while (status & PSC_SR_RXRDY); 235#else 236 } while (status & UART_LSR_DR); 237#endif 238 if (atomic_read(&ps2buf_cnt)) { 239 ps2mult_callback(atomic_read(&ps2buf_cnt)); 240 } 241} 242