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29#ifndef __CONFIG_H
30#define __CONFIG_H
31
32
33#define CONFIG_BOOKE 1
34#define CONFIG_E500 1
35#define CONFIG_MPC85xx 1
36#define CONFIG_CPM2 1
37#define CONFIG_MPC8541 1
38#define CONFIG_MPC8541CDS 1
39
40#define CONFIG_SYS_TEXT_BASE 0xfff80000
41
42#define CONFIG_PCI
43#define CONFIG_SYS_PCI_64BIT 1
44#define CONFIG_TSEC_ENET
45#define CONFIG_ENV_OVERWRITE
46
47#define CONFIG_FSL_LAW 1
48
49#define CONFIG_FSL_VIA
50
51#ifndef __ASSEMBLY__
52extern unsigned long get_clock_freq(void);
53#endif
54#define CONFIG_SYS_CLK_FREQ get_clock_freq()
55
56
57
58
59#define CONFIG_L2_CACHE
60#define CONFIG_BTB
61
62#define CONFIG_SYS_MEMTEST_START 0x00200000
63#define CONFIG_SYS_MEMTEST_END 0x00400000
64
65#define CONFIG_SYS_CCSRBAR 0xe0000000
66#define CONFIG_SYS_CCSRBAR_PHYS_LOW CONFIG_SYS_CCSRBAR
67
68
69#define CONFIG_FSL_DDR1
70#define CONFIG_SPD_EEPROM
71#define CONFIG_DDR_SPD
72#undef CONFIG_FSL_DDR_INTERACTIVE
73
74#define CONFIG_MEM_INIT_VALUE 0xDeadBeef
75
76#define CONFIG_SYS_DDR_SDRAM_BASE 0x00000000
77#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE
78
79#define CONFIG_NUM_DDR_CONTROLLERS 1
80#define CONFIG_DIMM_SLOTS_PER_CTLR 1
81#define CONFIG_CHIP_SELECTS_PER_CTRL (2 * CONFIG_DIMM_SLOTS_PER_CTLR)
82
83
84#define SPD_EEPROM_ADDRESS 0x51
85
86
87
88
89#ifndef CONFIG_SPD_EEPROM
90#error ("CONFIG_SPD_EEPROM is required by MPC85555CDS")
91#endif
92
93#undef CONFIG_CLOCKS_IN_MHZ
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128
129#define CONFIG_SYS_FLASH_BASE 0xff000000
130
131#define CONFIG_SYS_BR0_PRELIM 0xff801001
132#define CONFIG_SYS_BR1_PRELIM 0xff001001
133
134#define CONFIG_SYS_OR0_PRELIM 0xff806e65
135#define CONFIG_SYS_OR1_PRELIM 0xff806e65
136
137#define CONFIG_SYS_FLASH_BANKS_LIST {0xff800000, CONFIG_SYS_FLASH_BASE}
138#define CONFIG_SYS_MAX_FLASH_BANKS 2
139#define CONFIG_SYS_MAX_FLASH_SECT 128
140#undef CONFIG_SYS_FLASH_CHECKSUM
141#define CONFIG_SYS_FLASH_ERASE_TOUT 60000
142#define CONFIG_SYS_FLASH_WRITE_TOUT 500
143
144#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
145
146#define CONFIG_FLASH_CFI_DRIVER
147#define CONFIG_SYS_FLASH_CFI
148#define CONFIG_SYS_FLASH_EMPTY_INFO
149
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153
154#define CONFIG_SYS_LBC_SDRAM_BASE 0xf0000000
155#define CONFIG_SYS_LBC_SDRAM_SIZE 64
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174
175#define CONFIG_SYS_BR2_PRELIM 0xf0001861
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190
191#define CONFIG_SYS_OR2_PRELIM 0xfc006901
192
193#define CONFIG_SYS_LBC_LCRR 0x00030004
194#define CONFIG_SYS_LBC_LBCR 0x00000000
195#define CONFIG_SYS_LBC_LSRT 0x20000000
196#define CONFIG_SYS_LBC_MRTPR 0x00000000
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203
204#define CONFIG_SYS_LBC_LSDMR_COMMON ( LSDMR_RFCR16 \
205 | LSDMR_PRETOACT7 \
206 | LSDMR_ACTTORW7 \
207 | LSDMR_BL8 \
208 | LSDMR_WRC4 \
209 | LSDMR_CL3 \
210 | LSDMR_RFEN \
211 )
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242
243#define CONFIG_FSL_CADMUS
244
245#define CADMUS_BASE_ADDR 0xf8000000
246#define CONFIG_SYS_BR3_PRELIM 0xf8000801
247#define CONFIG_SYS_OR3_PRELIM 0xfff00ff7
248
249#define CONFIG_SYS_INIT_RAM_LOCK 1
250#define CONFIG_SYS_INIT_RAM_ADDR 0xe4010000
251#define CONFIG_SYS_INIT_RAM_SIZE 0x4000
252
253#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
254#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
255
256#define CONFIG_SYS_MONITOR_LEN (256 * 1024)
257#define CONFIG_SYS_MALLOC_LEN (128 * 1024)
258
259
260#define CONFIG_CONS_INDEX 2
261#define CONFIG_SYS_NS16550
262#define CONFIG_SYS_NS16550_SERIAL
263#define CONFIG_SYS_NS16550_REG_SIZE 1
264#define CONFIG_SYS_NS16550_CLK get_bus_freq(0)
265
266#define CONFIG_SYS_BAUDRATE_TABLE \
267 {300, 600, 1200, 2400, 4800, 9600, 19200, 38400,115200}
268
269#define CONFIG_SYS_NS16550_COM1 (CONFIG_SYS_CCSRBAR+0x4500)
270#define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_CCSRBAR+0x4600)
271
272
273#define CONFIG_SYS_HUSH_PARSER
274#ifdef CONFIG_SYS_HUSH_PARSER
275#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
276#endif
277
278
279#define CONFIG_OF_LIBFDT 1
280#define CONFIG_OF_BOARD_SETUP 1
281#define CONFIG_OF_STDOUT_VIA_ALIAS 1
282
283
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285
286#define CONFIG_FSL_I2C
287#define CONFIG_HARD_I2C
288#undef CONFIG_SOFT_I2C
289#define CONFIG_SYS_I2C_SPEED 400000
290#define CONFIG_SYS_I2C_SLAVE 0x7F
291#define CONFIG_SYS_I2C_NOPROBES {0x69}
292#define CONFIG_SYS_I2C_OFFSET 0x3000
293
294
295#define CONFIG_ID_EEPROM
296#define CONFIG_SYS_I2C_EEPROM_CCID
297#define CONFIG_SYS_ID_EEPROM
298#define CONFIG_SYS_I2C_EEPROM_ADDR 0x57
299#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
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304
305#define CONFIG_SYS_PCI1_MEM_VIRT 0x80000000
306#define CONFIG_SYS_PCI1_MEM_BUS 0x80000000
307#define CONFIG_SYS_PCI1_MEM_PHYS 0x80000000
308#define CONFIG_SYS_PCI1_MEM_SIZE 0x20000000
309#define CONFIG_SYS_PCI1_IO_VIRT 0xe2000000
310#define CONFIG_SYS_PCI1_IO_BUS 0x00000000
311#define CONFIG_SYS_PCI1_IO_PHYS 0xe2000000
312#define CONFIG_SYS_PCI1_IO_SIZE 0x100000
313
314#define CONFIG_SYS_PCI2_MEM_VIRT 0xa0000000
315#define CONFIG_SYS_PCI2_MEM_BUS 0xa0000000
316#define CONFIG_SYS_PCI2_MEM_PHYS 0xa0000000
317#define CONFIG_SYS_PCI2_MEM_SIZE 0x20000000
318#define CONFIG_SYS_PCI2_IO_VIRT 0xe2100000
319#define CONFIG_SYS_PCI2_IO_BUS 0x00000000
320#define CONFIG_SYS_PCI2_IO_PHYS 0xe2100000
321#define CONFIG_SYS_PCI2_IO_SIZE 0x100000
322
323#ifdef CONFIG_LEGACY
324#define BRIDGE_ID 17
325#define VIA_ID 2
326#else
327#define BRIDGE_ID 28
328#define VIA_ID 4
329#endif
330
331#if defined(CONFIG_PCI)
332
333#define CONFIG_MPC85XX_PCI2
334#define CONFIG_PCI_PNP
335
336#undef CONFIG_EEPRO100
337#undef CONFIG_TULIP
338
339#undef CONFIG_PCI_SCAN_SHOW
340#define CONFIG_SYS_PCI_SUBSYS_VENDORID 0x1057
341
342#endif
343
344
345#if defined(CONFIG_TSEC_ENET)
346
347#define CONFIG_MII 1
348#define CONFIG_TSEC1 1
349#define CONFIG_TSEC1_NAME "TSEC0"
350#define CONFIG_TSEC2 1
351#define CONFIG_TSEC2_NAME "TSEC1"
352#define TSEC1_PHY_ADDR 0
353#define TSEC2_PHY_ADDR 1
354#define TSEC1_PHYIDX 0
355#define TSEC2_PHYIDX 0
356#define TSEC1_FLAGS TSEC_GIGABIT
357#define TSEC2_FLAGS TSEC_GIGABIT
358
359
360#define CONFIG_ETHPRIME "TSEC0"
361
362#endif
363
364
365
366
367#define CONFIG_ENV_IS_IN_FLASH 1
368#define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE + 0x40000)
369#define CONFIG_ENV_SECT_SIZE 0x40000
370#define CONFIG_ENV_SIZE 0x2000
371
372#define CONFIG_LOADS_ECHO 1
373#define CONFIG_SYS_LOADS_BAUD_CHANGE 1
374
375
376
377
378#define CONFIG_BOOTP_BOOTFILESIZE
379#define CONFIG_BOOTP_BOOTPATH
380#define CONFIG_BOOTP_GATEWAY
381#define CONFIG_BOOTP_HOSTNAME
382
383
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385
386
387#include <config_cmd_default.h>
388
389#define CONFIG_CMD_PING
390#define CONFIG_CMD_I2C
391#define CONFIG_CMD_MII
392#define CONFIG_CMD_ELF
393#define CONFIG_CMD_IRQ
394#define CONFIG_CMD_SETEXPR
395#define CONFIG_CMD_REGINFO
396
397#if defined(CONFIG_PCI)
398 #define CONFIG_CMD_PCI
399#endif
400
401
402#undef CONFIG_WATCHDOG
403
404
405
406
407#define CONFIG_SYS_LONGHELP
408#define CONFIG_CMDLINE_EDITING
409#define CONFIG_AUTO_COMPLETE
410#define CONFIG_SYS_LOAD_ADDR 0x2000000
411#define CONFIG_SYS_PROMPT "=> "
412#if defined(CONFIG_CMD_KGDB)
413#define CONFIG_SYS_CBSIZE 1024
414#else
415#define CONFIG_SYS_CBSIZE 256
416#endif
417#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
418#define CONFIG_SYS_MAXARGS 16
419#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
420#define CONFIG_SYS_HZ 1000
421
422
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424
425
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427#define CONFIG_SYS_BOOTMAPSZ (64 << 20)
428#define CONFIG_SYS_BOOTM_LEN (64 << 20)
429
430#if defined(CONFIG_CMD_KGDB)
431#define CONFIG_KGDB_BAUDRATE 230400
432#define CONFIG_KGDB_SER_INDEX 2
433#endif
434
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439
440#if defined(CONFIG_TSEC_ENET)
441#define CONFIG_HAS_ETH0
442#define CONFIG_ETHADDR 00:E0:0C:00:00:FD
443#define CONFIG_HAS_ETH1
444#define CONFIG_ETH1ADDR 00:E0:0C:00:01:FD
445#define CONFIG_HAS_ETH2
446#define CONFIG_ETH2ADDR 00:E0:0C:00:02:FD
447#endif
448
449#define CONFIG_IPADDR 192.168.1.253
450
451#define CONFIG_HOSTNAME unknown
452#define CONFIG_ROOTPATH "/nfsroot"
453#define CONFIG_BOOTFILE "your.uImage"
454
455#define CONFIG_SERVERIP 192.168.1.1
456#define CONFIG_GATEWAYIP 192.168.1.1
457#define CONFIG_NETMASK 255.255.255.0
458
459#define CONFIG_LOADADDR 200000
460
461#define CONFIG_BOOTDELAY 10
462#undef CONFIG_BOOTARGS
463
464#define CONFIG_BAUDRATE 115200
465
466#define CONFIG_EXTRA_ENV_SETTINGS \
467 "netdev=eth0\0" \
468 "consoledev=ttyS1\0" \
469 "ramdiskaddr=600000\0" \
470 "ramdiskfile=your.ramdisk.u-boot\0" \
471 "fdtaddr=400000\0" \
472 "fdtfile=your.fdt.dtb\0"
473
474#define CONFIG_NFSBOOTCOMMAND \
475 "setenv bootargs root=/dev/nfs rw " \
476 "nfsroot=$serverip:$rootpath " \
477 "ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname:$netdev:off " \
478 "console=$consoledev,$baudrate $othbootargs;" \
479 "tftp $loadaddr $bootfile;" \
480 "tftp $fdtaddr $fdtfile;" \
481 "bootm $loadaddr - $fdtaddr"
482
483#define CONFIG_RAMBOOTCOMMAND \
484 "setenv bootargs root=/dev/ram rw " \
485 "console=$consoledev,$baudrate $othbootargs;" \
486 "tftp $ramdiskaddr $ramdiskfile;" \
487 "tftp $loadaddr $bootfile;" \
488 "bootm $loadaddr $ramdiskaddr"
489
490#define CONFIG_BOOTCOMMAND CONFIG_NFSBOOTCOMMAND
491
492#endif
493