LXR uboot/include/configs/cpuat91.h

   1/*
   2 * CPUAT91 by (C) Copyright 2006-2010 Eric Benard
   3 * eric@eukrea.com
   4 *
   5 * Configuration settings for the CPUAT91 board.
   6 *
   7 * See file CREDITS for list of people who contributed to this
   8 * project.
   9 *
  10 * This program is free software; you can redistribute it and/or
  11 * modify it under the terms of the GNU General Public License as
  12 * published by the Free Software Foundation; either version 2 of
  13 * the License, or (at your option) any later version.
  14 *
  15 * This program is distributed in the hope that it will be useful,
  16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
  17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  18 * GNU General Public License for more details.
  19 *
  20 * You should have received a copy of the GNU General Public License
  21 * along with this program; if not, write to the Free Software
  22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  23 * MA 02111-1307 USA
  24 */
  25
  26#ifndef _CONFIG_CPUAT91_H
  27#define _CONFIG_CPUAT91_H
  28
  29#include <asm/sizes.h>
  30
  31#ifdef CONFIG_RAMBOOT
  32#define CONFIG_SKIP_LOWLEVEL_INIT
  33#define CONFIG_SYS_TEXT_BASE            0x21F00000
  34#else
  35#define CONFIG_BOOTDELAY                1
  36#define CONFIG_SYS_TEXT_BASE            0
  37#endif
  38
  39#define AT91C_XTAL_CLOCK                18432000
  40#define CONFIG_SYS_AT91_SLOW_CLOCK      32768
  41#define AT91C_MAIN_CLOCK                ((AT91C_XTAL_CLOCK / 4) * 39)
  42#define AT91C_MASTER_CLOCK              (AT91C_MAIN_CLOCK / 3)
  43#define CONFIG_SYS_HZ_CLOCK             (AT91C_MASTER_CLOCK / 2)
  44#define CONFIG_SYS_HZ                   1000
  45
  46#define CONFIG_ARM920T
  47#define CONFIG_AT91RM9200
  48#define CONFIG_CPUAT91
  49#undef CONFIG_USE_IRQ
  50#define USE_920T_MMU
  51
  52#include <asm/hardware.h>       /* needed for port definitions */
  53
  54#define CONFIG_CMDLINE_TAG
  55#define CONFIG_SETUP_MEMORY_TAGS
  56#define CONFIG_INITRD_TAG
  57#define CONFIG_BOARD_EARLY_INIT_F
  58
  59#ifndef CONFIG_SKIP_LOWLEVEL_INIT
  60#define CONFIG_SYS_USE_MAIN_OSCILLATOR
  61/* flash */
  62#define CONFIG_SYS_MC_PUIA_VAL  0x00000000
  63#define CONFIG_SYS_MC_PUP_VAL   0x00000000
  64#define CONFIG_SYS_MC_PUER_VAL  0x00000000
  65#define CONFIG_SYS_MC_ASR_VAL   0x00000000
  66#define CONFIG_SYS_MC_AASR_VAL  0x00000000
  67#define CONFIG_SYS_EBI_CFGR_VAL 0x00000000
  68#define CONFIG_SYS_SMC_CSR0_VAL 0x00003284 /* 16bit, 2 TDF, 4 WS */
  69
  70/* clocks */
  71#define CONFIG_SYS_PLLAR_VAL    0x20263E04 /* 179.712000 MHz for PCK */
  72#define CONFIG_SYS_PLLBR_VAL    0x10483E0E /* 48.054857 MHz for USB */
  73#define CONFIG_SYS_MCKR_VAL     0x00000202 /* PCK/3 = MCK Master Clock */
  74
  75/* sdram */
  76#define CONFIG_SYS_PIOC_ASR_VAL 0xFFFF0000 /* Configure PIOC as D16/D31 */
  77#define CONFIG_SYS_PIOC_BSR_VAL 0x00000000
  78#define CONFIG_SYS_PIOC_PDR_VAL 0xFFFF0000
  79#define CONFIG_SYS_EBI_CSA_VAL  0x00000002 /* CS1=SDRAM */
  80#define CONFIG_SYS_SDRC_CR_VAL  0x2188C155 /* set up the SDRAM */
  81#define CONFIG_SYS_SDRAM        0x20000000 /* address of the SDRAM */
  82#define CONFIG_SYS_SDRAM1       0x20000080 /* address of the SDRAM */
  83#define CONFIG_SYS_SDRAM_VAL    0x00000000 /* value written to SDRAM */
  84#define CONFIG_SYS_SDRC_MR_VAL  0x00000002 /* Precharge All */
  85#define CONFIG_SYS_SDRC_MR_VAL1 0x00000004 /* refresh */
  86#define CONFIG_SYS_SDRC_MR_VAL2 0x00000003 /* Load Mode Register */
  87#define CONFIG_SYS_SDRC_MR_VAL3 0x00000000 /* Normal Mode */
  88#define CONFIG_SYS_SDRC_TR_VAL  0x000002E0 /* Write refresh rate */
  89#endif  /* CONFIG_SKIP_LOWLEVEL_INIT */
  90
  91#define CONFIG_ATMEL_USART
  92#define CONFIG_USART_BASE       ATMEL_BASE_DBGU
  93#define CONFIG_USART_ID         0/* ignored in arm */
  94
  95#undef CONFIG_HARD_I2C
  96#undef CONFIG_SOFT_I2C
  97#define AT91_PIN_SDA                    (1<<25)
  98#define AT91_PIN_SCL                    (1<<26)
  99
 100#define CONFIG_SYS_I2C_INIT_BOARD
 101#define CONFIG_SYS_I2C_SPEED            50000
 102#define CONFIG_SYS_I2C_SLAVE            0
 103
 104#define I2C_INIT        i2c_init_board();
 105#define I2C_ACTIVE      writel(AT91_PMX_AA_TWD, &pio->pioa.mddr);
 106#define I2C_TRISTATE    writel(AT91_PMX_AA_TWD, &pio->pioa.mder);
 107#define I2C_READ        ((readl(&pio->pioa.pdsr) & AT91_PMX_AA_TWD) != 0)
 108#define I2C_SDA(bit)                                            \
 109        if (bit)                                                \
 110                writel(AT91_PMX_AA_TWD, &pio->pioa.sodr);       \
 111        else                                                    \
 112                writel(AT91_PMX_AA_TWD, &pio->pioa.codr);
 113#define I2C_SCL(bit)                                            \
 114        if (bit)                                                \
 115                writel(AT91_PMX_AA_TWCK, &pio->pioa.sodr);      \
 116        else                                                    \
 117                writel(AT91_PMX_AA_TWCK, &pio->pioa.codr);
 118
 119#define I2C_DELAY       udelay(2500000/CONFIG_SYS_I2C_SPEED)
 120
 121#define CONFIG_SYS_I2C_EEPROM_ADDR              0x54
 122#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN          1
 123#define CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW     1
 124#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS   10
 125
 126#define CONFIG_BOOTP_BOOTFILESIZE
 127#define CONFIG_BOOTP_BOOTPATH
 128#define CONFIG_BOOTP_GATEWAY
 129#define CONFIG_BOOTP_HOSTNAME
 130
 131#include <config_cmd_default.h>
 132
 133#define CONFIG_CMD_PING
 134#define CONFIG_CMD_MII
 135#define CONFIG_CMD_CACHE
 136#undef CONFIG_CMD_USB
 137#undef CONFIG_CMD_FPGA
 138#undef CONFIG_CMD_IMI
 139#undef CONFIG_CMD_LOADS
 140#undef CONFIG_CMD_NFS
 141#undef CONFIG_CMD_DHCP
 142
 143#ifdef CONFIG_SOFT_I2C
 144#define CONFIG_CMD_EEPROM
 145#define CONFIG_CMD_I2C
 146#endif
 147
 148#define CONFIG_NR_DRAM_BANKS                    1
 149#define CONFIG_SYS_SDRAM_BASE                   0x20000000
 150#define CONFIG_SYS_SDRAM_SIZE                   (32 * 1024 * 1024)
 151
 152#define CONFIG_SYS_MEMTEST_START                CONFIG_SYS_SDRAM_BASE
 153#define CONFIG_SYS_MEMTEST_END                  \
 154        (CONFIG_SYS_MEMTEST_START + CONFIG_SYS_SDRAM_SIZE - 512 * 1024)
 155
 156#define CONFIG_DRIVER_AT91EMAC
 157#define CONFIG_SYS_RX_ETH_BUFFER        16
 158#define CONFIG_RMII
 159#define CONFIG_MII
 160#define CONFIG_DRIVER_AT91EMAC_PHYADDR  1
 161#define CONFIG_NET_RETRY_COUNT                  20
 162#define CONFIG_KS8721_PHY
 163
 164#define CONFIG_SYS_FLASH_CFI
 165#define CONFIG_FLASH_CFI_DRIVER
 166#define CONFIG_SYS_FLASH_EMPTY_INFO
 167#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE
 168#define CONFIG_SYS_MAX_FLASH_BANKS              1
 169#define CONFIG_SYS_FLASH_PROTECTION
 170#define PHYS_FLASH_1                            0x10000000
 171#define CONFIG_SYS_FLASH_BASE                   PHYS_FLASH_1
 172#define CONFIG_SYS_MAX_FLASH_SECT               128
 173#define CONFIG_SYS_FLASH_CFI_WIDTH              FLASH_CFI_16BIT
 174#define CONFIG_SYS_MONITOR_BASE                 PHYS_FLASH_1
 175#define PHYS_FLASH_SIZE                         (16 * 1024 * 1024)
 176#define CONFIG_SYS_FLASH_BANKS_LIST             \
 177                { PHYS_FLASH_1 }
 178
 179#if defined(CONFIG_CMD_USB)
 180#define CONFIG_USB_ATMEL
 181#define CONFIG_USB_OHCI_NEW
 182#define CONFIG_USB_STORAGE
 183#define CONFIG_DOS_PARTITION
 184#define CONFIG_AT91C_PQFP_UHPBU
 185#undef CONFIG_SYS_USB_OHCI_BOARD_INIT
 186#define CONFIG_SYS_USB_OHCI_CPU_INIT
 187#define CONFIG_SYS_USB_OHCI_REGS_BASE           AT91_USB_HOST_BASE
 188#define CONFIG_SYS_USB_OHCI_SLOT_NAME           "at91rm9200"
 189#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS      15
 190#endif
 191
 192#define CONFIG_ENV_IS_IN_FLASH
 193#define CONFIG_ENV_ADDR                         (PHYS_FLASH_1 + 128 * 1024)
 194#define CONFIG_ENV_SIZE                         (128 * 1024)
 195#define CONFIG_ENV_SECT_SIZE            (128 * 1024)
 196
 197#define CONFIG_SYS_LOAD_ADDR            0x21000000
 198
 199#define CONFIG_BAUDRATE                 115200
 200#define CONFIG_SYS_BAUDRATE_TABLE       { 115200, 57600, 38400, 19200, 9600 }
 201
 202#define CONFIG_SYS_PROMPT               "CPUAT91=> "
 203#define CONFIG_SYS_CBSIZE               256
 204#define CONFIG_SYS_MAXARGS              32
 205#define CONFIG_SYS_PBSIZE               \
 206        (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
 207#define CONFIG_CMDLINE_EDITING
 208
 209#define CONFIG_SYS_MALLOC_LEN           \
 210                        ROUND(3 * CONFIG_ENV_SIZE + 128 * 1024, 4 * 1024)
 211
 212#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 4 * 1024 - \
 213                                GENERATED_GBL_DATA_SIZE)
 214
 215#define CONFIG_STACKSIZE                (32 * 1024)
 216#define CONFIG_STACKSIZE_IRQ            (4 * 1024)
 217#define CONFIG_STACKSIZE_FIQ            (4 * 1024)
 218
 219
 220#if defined(CONFIG_USE_IRQ)
 221#error CONFIG_USE_IRQ not supported
 222#endif
 223
 224#define CONFIG_DEVICE_NULLDEV
 225#define CONFIG_SILENT_CONSOLE
 226
 227#define CONFIG_AUTOBOOT_KEYED
 228#define CONFIG_AUTOBOOT_PROMPT          \
 229        "Press SPACE to abort autoboot\n"
 230#define CONFIG_AUTOBOOT_STOP_STR        " "
 231#define CONFIG_AUTOBOOT_DELAY_STR       "d"
 232
 233#define CONFIG_VERSION_VARIABLE
 234
 235#define MTDIDS_DEFAULT                  "nor0=physmap-flash.0"
 236#define MTDPARTS_DEFAULT                \
 237        "mtdparts=physmap-flash.0:"     \
 238                "128k(u-boot)ro,"       \
 239                "128k(u-boot-env),"     \
 240                "1792k(kernel),"        \
 241                "-(rootfs)"
 242
 243#define CONFIG_BOOTARGS                 \
 244        "root=/dev/mtdblock3 rootfstype=jffs2 console=ttyS0,115200"
 245
 246#define CONFIG_BOOTCOMMAND              "run flashboot"
 247
 248#define CONFIG_EXTRA_ENV_SETTINGS                                       \
 249        "mtdid=" MTDIDS_DEFAULT "\0"                                    \
 250        "mtdparts=" MTDPARTS_DEFAULT "\0"                               \
 251        "flub=tftp 21000000 cpuat91/u-boot.bin; protect off 10000000 "  \
 252                "1001FFFF; erase 10000000 1001FFFF; cp.b 21000000 "     \
 253                "10000000 ${filesize}\0"                                \
 254        "flui=tftp 21000000 cpuat91/uImage; protect off 10040000 "      \
 255                "1019ffff; erase 10040000 101fffff; cp.b 21000000 "     \
 256                "10040000 ${filesize}\0"                                \
 257        "flrfs=tftp 21000000 cpuat91/rootfs.jffs2; protect off "        \
 258                "10200000 10ffffff; erase 10200000 10ffffff; cp.b "     \
 259                "21000000 10200000 ${filesize}\0"                       \
 260        "ramargs=setenv bootargs $(bootargs) $(mtdparts)\0"             \
 261        "flashboot=run ramargs;bootm 10040000\0"                        \
 262        "netboot=run ramargs;tftpboot 21000000 cpuat91/uImage;"         \
 263                "bootm 21000000\0"
 264#endif  /* _CONFIG_CPUAT91_H */
 265