1/* 2 * Copyright (C) 2011 Freescale Semiconductor, Inc. 3 * 4 * Configuration settings for the MX53ARD Freescale board. 5 * 6 * This program is free software; you can redistribute it and/or 7 * modify it under the terms of the GNU General Public License as 8 * published by the Free Software Foundation; either version 2 of 9 * the License, or (at your option) any later version. 10 * 11 * This program is distributed in the hope that it will be useful, 12 * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 * GNU General Public License for more details. 15 * 16 * You should have received a copy of the GNU General Public License 17 * along with this program; if not, write to the Free Software 18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 19 * MA 02111-1307 USA 20 */ 21 22#ifndef __CONFIG_H 23#define __CONFIG_H 24 25#define CONFIG_MX53 26 27#define CONFIG_SYS_MX5_HCLK 24000000 28#define CONFIG_SYS_MX5_CLK32 32768 29#define CONFIG_DISPLAY_CPUINFO 30#define CONFIG_DISPLAY_BOARDINFO 31 32#define CONFIG_MACH_TYPE MACH_TYPE_MX53_ARD 33 34#include <asm/arch/imx-regs.h> 35 36#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ 37#define CONFIG_SETUP_MEMORY_TAGS 38#define CONFIG_INITRD_TAG 39 40/* Size of malloc() pool */ 41#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 2 * 1024 * 1024) 42 43#define CONFIG_BOARD_EARLY_INIT_F 44#define CONFIG_MXC_GPIO 45 46#define CONFIG_MXC_UART 47#define CONFIG_MXC_UART_BASE UART1_BASE 48 49/* I2C Configs */ 50#define CONFIG_CMD_I2C 51#define CONFIG_HARD_I2C 52#define CONFIG_I2C_MXC 53#define CONFIG_SYS_I2C_MX53_PORT2 54#define CONFIG_SYS_I2C_SPEED 100000 55#define CONFIG_SYS_I2C_SLAVE 0xfe 56 57/* MMC Configs */ 58#define CONFIG_FSL_ESDHC 59#define CONFIG_SYS_FSL_ESDHC_ADDR 0 60#define CONFIG_SYS_FSL_ESDHC_NUM 2 61 62#define CONFIG_MMC 63#define CONFIG_CMD_MMC 64#define CONFIG_GENERIC_MMC 65#define CONFIG_CMD_FAT 66#define CONFIG_DOS_PARTITION 67 68/* Eth Configs */ 69#define CONFIG_HAS_ETH1 70#define CONFIG_MII 71#define CONFIG_MII_GASKET 72#define CONFIG_DISCOVER_PHY 73 74#define CONFIG_CMD_PING 75#define CONFIG_CMD_DHCP 76#define CONFIG_CMD_MII 77#define CONFIG_CMD_NET 78 79/* allow to overwrite serial and ethaddr */ 80#define CONFIG_ENV_OVERWRITE 81#define CONFIG_CONS_INDEX 1 82#define CONFIG_BAUDRATE 115200 83#define CONFIG_SYS_BAUDRATE_TABLE {9600, 19200, 38400, 57600, 115200} 84 85/* Command definition */ 86#include <config_cmd_default.h> 87 88#undef CONFIG_CMD_IMLS 89 90#define CONFIG_BOOTDELAY 3 91 92#define CONFIG_ETHPRIME "smc911x" 93 94/*Support LAN9217*/ 95#define CONFIG_SMC911X 96#define CONFIG_SMC911X_16_BIT 97#define CONFIG_SMC911X_BASE CS1_BASE_ADDR 98 99#define CONFIG_LOADADDR 0x70800000 /* loadaddr env var */ 100#define CONFIG_SYS_TEXT_BASE 0x77800000 101 102#define CONFIG_EXTRA_ENV_SETTINGS \ 103 "script=boot.scr\0" \ 104 "uimage=uImage\0" \ 105 "mmcdev=0\0" \ 106 "mmcpart=2\0" \ 107 "mmcroot=/dev/mmcblk0p3 rw\0" \ 108 "mmcrootfstype=ext3 rootwait\0" \ 109 "mmcargs=setenv bootargs console=ttymxc0,${baudrate} " \ 110 "root=${mmcroot} " \ 111 "rootfstype=${mmcrootfstype}\0" \ 112 "loadbootscript=" \ 113 "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \ 114 "bootscript=echo Running bootscript from mmc ...; " \ 115 "source\0" \ 116 "loaduimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${uimage}\0" \ 117 "mmcboot=echo Booting from mmc ...; " \ 118 "run mmcargs; " \ 119 "bootm\0" \ 120 "netargs=setenv bootargs console=ttymxc0,${baudrate} " \ 121 "root=/dev/nfs " \ 122 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \ 123 "netboot=echo Booting from net ...; " \ 124 "run netargs; " \ 125 "dhcp ${uimage}; bootm\0" \ 126 127#define CONFIG_BOOTCOMMAND \ 128 "if mmc rescan ${mmcdev}; then " \ 129 "if run loadbootscript; then " \ 130 "run bootscript; " \ 131 "else " \ 132 "if run loaduimage; then " \ 133 "run mmcboot; " \ 134 "else run netboot; " \ 135 "fi; " \ 136 "fi; " \ 137 "else run netboot; fi" 138#define CONFIG_ARP_TIMEOUT 200UL 139 140/* Miscellaneous configurable options */ 141#define CONFIG_SYS_LONGHELP /* undef to save memory */ 142#define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */ 143#define CONFIG_SYS_PROMPT_HUSH_PS2 "> " 144#define CONFIG_SYS_PROMPT "MX53ARD U-Boot > " 145#define CONFIG_AUTO_COMPLETE 146#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ 147 148/* Print Buffer Size */ 149#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) 150#define CONFIG_SYS_MAXARGS 16 /* max number of command args */ 151#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ 152 153#define CONFIG_SYS_MEMTEST_START 0x70000000 154#define CONFIG_SYS_MEMTEST_END 0x70010000 155 156#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR 157 158#define CONFIG_SYS_HZ 1000 159#define CONFIG_CMDLINE_EDITING 160 161/* Stack sizes */ 162#define CONFIG_STACKSIZE (128 * 1024) /* regular stack */ 163 164/* Physical Memory Map */ 165#define CONFIG_NR_DRAM_BANKS 2 166#define PHYS_SDRAM_1 CSD0_BASE_ADDR 167#define PHYS_SDRAM_1_SIZE (512 * 1024 * 1024) 168#define PHYS_SDRAM_2 CSD1_BASE_ADDR 169#define PHYS_SDRAM_2_SIZE (512 * 1024 * 1024) 170#define PHYS_SDRAM_SIZE (PHYS_SDRAM_1_SIZE + PHYS_SDRAM_2_SIZE) 171 172#define CONFIG_SYS_SDRAM_BASE (PHYS_SDRAM_1) 173#define CONFIG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR) 174#define CONFIG_SYS_INIT_RAM_SIZE (IRAM_SIZE) 175 176#define CONFIG_SYS_INIT_SP_OFFSET \ 177 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) 178#define CONFIG_SYS_INIT_SP_ADDR \ 179 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) 180 181/* FLASH and environment organization */ 182#define CONFIG_SYS_NO_FLASH 183 184#define CONFIG_ENV_OFFSET (6 * 64 * 1024) 185#define CONFIG_ENV_SIZE (8 * 1024) 186#define CONFIG_ENV_IS_IN_MMC 187#define CONFIG_SYS_MMC_ENV_DEV 0 188 189#define CONFIG_OF_LIBFDT 190 191#define MX53ARD_CS1GCR1 (CSEN | DSZ(2)) 192#define MX53ARD_CS1RCR1 (RCSN(2) | OEN (1) | RWSC(22)) 193#define MX53ARD_CS1RCR2 RBEN(2) 194#define MX53ARD_CS1WCR1 (WCSN(2) | WEN(2) | WBEN(2) | WWSC(22)) 195 196#endif /* __CONFIG_H */ 197