1/* 2 * (C) Copyright 2004 3 * Texas Instruments. 4 * Kshitij Gupta <kshitij@ti.com> 5 * Configuration settings for the TI OMAP 1610 H2 board. 6 * 7 * See file CREDITS for list of people who contributed to this 8 * project. 9 * 10 * This program is free software; you can redistribute it and/or 11 * modify it under the terms of the GNU General Public License as 12 * published by the Free Software Foundation; either version 2 of 13 * the License, or (at your option) any later version. 14 * 15 * This program is distributed in the hope that it will be useful, 16 * but WITHOUT ANY WARRANTY; without even the implied warranty of 17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 18 * GNU General Public License for more details. 19 * 20 * You should have received a copy of the GNU General Public License 21 * along with this program; if not, write to the Free Software 22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 23 * MA 02111-1307 USA 24 */ 25 26#ifndef __CONFIG_H 27#define __CONFIG_H 28 29/* 30 * High Level Configuration Options 31 * (easy to change) 32 */ 33#define CONFIG_ARM926EJS 1 /* This is an arm926ejs CPU core */ 34#define CONFIG_OMAP 1 /* in a TI OMAP core */ 35#define CONFIG_OMAP1610 1 /* which is in a 1610 */ 36#define CONFIG_H2_OMAP1610 1 /* on an H2 Board */ 37 38#define CONFIG_MACH_TYPE MACH_TYPE_OMAP_H2 39 40/* input clock of PLL */ 41/* the OMAP1610 H2 has 12MHz input clock */ 42#define CONFIG_SYS_CLK_FREQ 12000000 43 44#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */ 45 46#define CONFIG_MISC_INIT_R 47 48#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ 49#define CONFIG_SETUP_MEMORY_TAGS 1 50#define CONFIG_INITRD_TAG 1 51 52/* 53 * Size of malloc() pool 54 */ 55#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024) 56 57/* 58 * Hardware drivers 59 */ 60#define CONFIG_LAN91C96 61#define CONFIG_LAN91C96_BASE 0x04000300 62#define CONFIG_LAN91C96_EXT_PHY 63 64/* 65 * NS16550 Configuration 66 */ 67#define CONFIG_SYS_NS16550 68#define CONFIG_SYS_NS16550_SERIAL 69#define CONFIG_SYS_NS16550_REG_SIZE (-4) 70#define CONFIG_SYS_NS16550_CLK (48000000) /* can be 12M/32Khz or 48Mhz */ 71#define CONFIG_SYS_NS16550_COM1 0xfffb0000 /* uart1, bluetooth uart */ 72 73/* 74 * select serial console configuration 75 */ 76#define CONFIG_SERIAL1 1 /* we use SERIAL 1 on OMAP1610 H2 */ 77 78/* allow to overwrite serial and ethaddr */ 79#define CONFIG_ENV_OVERWRITE 80#define CONFIG_CONS_INDEX 1 81#define CONFIG_BAUDRATE 115200 82#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } 83 84 85/* 86 * Command line configuration. 87 */ 88#include <config_cmd_default.h> 89 90#define CONFIG_CMD_DHCP 91 92 93/* 94 * BOOTP options 95 */ 96#define CONFIG_BOOTP_SUBNETMASK 97#define CONFIG_BOOTP_GATEWAY 98#define CONFIG_BOOTP_HOSTNAME 99#define CONFIG_BOOTP_BOOTPATH 100 101 102#include <configs/omap1510.h> 103 104#define CONFIG_BOOTDELAY 3 105#define CONFIG_BOOTARGS "console=ttyS0,115200n8 noinitrd root=/dev/nfs ip=dhcp" 106#define CONFIG_BOOTCOMMAND "bootp;tftp;bootm" 107#define CONFIG_SYS_AUTOLOAD "n" /* No autoload */ 108 109#if defined(CONFIG_CMD_KGDB) 110#define CONFIG_KGDB_BAUDRATE 115200 /* speed to run kgdb serial port */ 111#define CONFIG_KGDB_SER_INDEX 1 /* which serial port to use */ 112#endif 113 114/* 115 * Miscellaneous configurable options 116 */ 117#define CONFIG_SYS_LONGHELP /* undef to save memory */ 118#define CONFIG_SYS_PROMPT "OMAP1610 H2 # " /* Monitor Command Prompt */ 119#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ 120/* Print Buffer Size */ 121#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) 122#define CONFIG_SYS_MAXARGS 16 /* max number of command args */ 123#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ 124 125#define CONFIG_SYS_MEMTEST_START 0x10000000 /* memtest works on */ 126#define CONFIG_SYS_MEMTEST_END 0x12000000 /* 32 MB in DRAM */ 127 128#define CONFIG_SYS_LOAD_ADDR 0x10000000 /* default load address */ 129 130/* The 1610 has 6 timers, they can be driven by the RefClk (12Mhz) or by 131 * DPLL1. This time is further subdivided by a local divisor. 132 */ 133#define CONFIG_SYS_TIMERBASE 0xFFFEC500 /* use timer 1 */ 134#define CONFIG_SYS_PTV 7 /* 2^(PTV+1), divide by 256 */ 135#define CONFIG_SYS_HZ ((CONFIG_SYS_CLK_FREQ)/(2 << CONFIG_SYS_PTV)) 136 137/*----------------------------------------------------------------------- 138 * Stack sizes 139 * 140 * The stack sizes are set up in start.S using the settings below 141 */ 142#define CONFIG_STACKSIZE (128*1024) /* regular stack */ 143#ifdef CONFIG_USE_IRQ 144#define CONFIG_STACKSIZE_IRQ (4*1024) /* IRQ stack */ 145#define CONFIG_STACKSIZE_FIQ (4*1024) /* FIQ stack */ 146#endif 147 148/*----------------------------------------------------------------------- 149 * Physical Memory Map 150 */ 151#define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */ 152#define PHYS_SDRAM_1 0x10000000 /* SDRAM Bank #1 */ 153#define PHYS_SDRAM_1_SIZE 0x02000000 /* 32 MB */ 154 155#define PHYS_FLASH_1_BM1 0x00000000 /* Flash Bank #1 if booting from flash */ 156#define PHYS_FLASH_1_BM0 0x0C000000 /* Flash Bank #1 if booting from RAM */ 157 158#ifdef CONFIG_CS_AUTOBOOT /* Determine CS assignment in runtime */ 159 160#ifndef __ASSEMBLY__ 161extern unsigned long omap_flash_base; /* set in flash__init */ 162#endif 163#define CONFIG_SYS_FLASH_BASE omap_flash_base 164 165#elif defined(CONFIG_CS0_BOOT) 166 167#define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1_BM0 168 169#else 170 171#define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1_BM1 172 173#endif 174 175#define PHYS_SRAM 0x20000000 176 177/*----------------------------------------------------------------------- 178 * FLASH and environment organization 179 */ 180#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */ 181#define PHYS_FLASH_SIZE 0x02000000 /* 32MB */ 182#define CONFIG_SYS_MAX_FLASH_SECT (259) /* max number of sectors on one chip */ 183/* addr of environment */ 184#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x020000) 185 186/* timeout values are in ticks */ 187#define CONFIG_SYS_FLASH_ERASE_TOUT (20*CONFIG_SYS_HZ) /* Timeout for Flash Erase */ 188#define CONFIG_SYS_FLASH_WRITE_TOUT (20*CONFIG_SYS_HZ) /* Timeout for Flash Write */ 189 190#define CONFIG_ENV_IS_IN_FLASH 1 191#define CONFIG_ENV_SIZE 0x20000 /* Total Size of Environment Sector */ 192#define CONFIG_ENV_OFFSET 0x20000 /* environment starts here */ 193 194#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 195#define CONFIG_SYS_INIT_SP_ADDR PHYS_SRAM 196 197#endif /* __CONFIG_H */ 198