LXR uboot/arch/arm/include/asm/arch-davinci/psc

   1/*
   2 * Copyright (C) 2011
   3 * Heiko Schocher, DENX Software Engineering, hs@denx.de.
   4 *
   5 * See file CREDITS for list of people who contributed to this
   6 * project.
   7 *
   8 * This program is free software; you can redistribute it and/or
   9 * modify it under the terms of the GNU General Public License as
  10 * published by the Free Software Foundation; either version 2 of
  11 * the License, or (at your option) any later version.
  12 *
  13 * This program is distributed in the hope that it will be useful,
  14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16 * GNU General Public License for more details.
  17 *
  18 * You should have received a copy of the GNU General Public License
  19 * along with this program; if not, write to the Free Software
  20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  21 * MA 02111-1307 USA
  22 */
  23#ifndef _DV_PSC_DEFS_H_
  24#define _DV_PSC_DEFS_H_
  25
  26/*
  27 * Power/Sleep Ctrl Register structure
  28 * See sprufb3.pdf, Chapter 7
  29 */
  30struct dv_psc_regs {
  31        unsigned int    pid;            /* 0x000 */
  32        unsigned char   rsvd0[16];      /* 0x004 */
  33        unsigned char   rsvd1[4];       /* 0x014 */
  34        unsigned int    inteval;        /* 0x018 */
  35        unsigned char   rsvd2[36];      /* 0x01C */
  36        unsigned int    merrpr0;        /* 0x040 */
  37        unsigned int    merrpr1;        /* 0x044 */
  38        unsigned char   rsvd3[8];       /* 0x048 */
  39        unsigned int    merrcr0;        /* 0x050 */
  40        unsigned int    merrcr1;        /* 0x054 */
  41        unsigned char   rsvd4[8];       /* 0x058 */
  42        unsigned int    perrpr;         /* 0x060 */
  43        unsigned char   rsvd5[4];       /* 0x064 */
  44        unsigned int    perrcr;         /* 0x068 */
  45        unsigned char   rsvd6[4];       /* 0x06C */
  46        unsigned int    epcpr;          /* 0x070 */
  47        unsigned char   rsvd7[4];       /* 0x074 */
  48        unsigned int    epccr;          /* 0x078 */
  49        unsigned char   rsvd8[144];     /* 0x07C */
  50        unsigned char   rsvd9[20];      /* 0x10C */
  51        unsigned int    ptcmd;          /* 0x120 */
  52        unsigned char   rsvd10[4];      /* 0x124 */
  53        unsigned int    ptstat;         /* 0x128 */
  54        unsigned char   rsvd11[212];    /* 0x12C */
  55        unsigned int    pdstat0;        /* 0x200 */
  56        unsigned int    pdstat1;        /* 0x204 */
  57        unsigned char   rsvd12[248];    /* 0x208 */
  58        unsigned int    pdctl0;         /* 0x300 */
  59        unsigned int    pdctl1;         /* 0x304 */
  60        unsigned char   rsvd13[536];    /* 0x308 */
  61        unsigned int    mckout0;        /* 0x520 */
  62        unsigned int    mckout1;        /* 0x524 */
  63        unsigned char   rsvd14[728];    /* 0x528 */
  64        unsigned int    mdstat[52];     /* 0x800 */
  65        unsigned char   rsvd15[304];    /* 0x8D0 */
  66        unsigned int    mdctl[52];      /* 0xA00 */
  67};
  68
  69/* PSC constants */
  70#define EMURSTIE_MASK   (0x00000200)
  71
  72#define PD0             (0)
  73
  74#define PSC_ENABLE              (0x3)
  75#define PSC_DISABLE             (0x2)
  76#define PSC_SYNCRESET           (0x1)
  77#define PSC_SWRSTDISABLE        (0x0)
  78
  79#define PSC_GOSTAT              (1 << 0)
  80#define PSC_MD_STATE_MSK        (0x1f)
  81
  82#define PSC_CMD_GO              (1 << 0)
  83
  84#define dv_psc_regs ((struct dv_psc_regs *)DAVINCI_PWR_SLEEP_CNTRL_BASE)
  85
  86#endif /* _DV_PSC_DEFS_H_ */
  87