LXR uboot/arch/powerpc/cpu/ppc4xx/u-boot.lds

   1/*
   2 * Copyright 2007-2009 Freescale Semiconductor, Inc.
   3 *
   4 * See file CREDITS for list of people who contributed to this
   5 * project.
   6 *
   7 * This program is free software; you can redistribute it and/or
   8 * modify it under the terms of the GNU General Public License as
   9 * published by the Free Software Foundation; either version 2 of
  10 * the License, or (at your option) any later version.
  11 *
  12 * This program is distributed in the hope that it will be useful,
  13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15 * GNU General Public License for more details.
  16 *
  17 * You should have received a copy of the GNU General Public License
  18 * along with this program; if not, write to the Free Software
  19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  20 * MA 02111-1307 USA
  21 */
  22
  23#include "config.h"     /* CONFIG_BOARDDIR */
  24
  25#ifndef RESET_VECTOR_ADDRESS
  26#ifdef CONFIG_RESET_VECTOR_ADDRESS
  27#define RESET_VECTOR_ADDRESS    CONFIG_RESET_VECTOR_ADDRESS
  28#else
  29#define RESET_VECTOR_ADDRESS    0xfffffffc
  30#endif
  31#endif
  32
  33OUTPUT_ARCH(powerpc)
  34
  35PHDRS
  36{
  37  text PT_LOAD;
  38  bss PT_LOAD;
  39}
  40
  41SECTIONS
  42{
  43  /* Read-only sections, merged into text segment: */
  44  . = + SIZEOF_HEADERS;
  45  .text      :
  46  {
  47    *(.text*)
  48   } :text
  49    _etext = .;
  50    PROVIDE (etext = .);
  51    .rodata    :
  52   {
  53    *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))
  54  } :text
  55
  56  /* Read-write section, merged into data segment: */
  57  . = (. + 0x00FF) & 0xFFFFFF00;
  58  _erotext = .;
  59  PROVIDE (erotext = .);
  60  .reloc   :
  61  {
  62    _GOT2_TABLE_ = .;
  63    KEEP(*(.got2))
  64    KEEP(*(.got))
  65    PROVIDE(_GLOBAL_OFFSET_TABLE_ = . + 4);
  66    _FIXUP_TABLE_ = .;
  67    KEEP(*(.fixup))
  68  }
  69  __got2_entries = ((_GLOBAL_OFFSET_TABLE_ - _GOT2_TABLE_) >> 2) - 1;
  70  __fixup_entries = (. - _FIXUP_TABLE_) >> 2;
  71
  72  .data    :
  73  {
  74    *(.data*)
  75    *(.sdata*)
  76  }
  77  _edata  =  .;
  78  PROVIDE (edata = .);
  79
  80  . = .;
  81  __u_boot_cmd_start = .;
  82  .u_boot_cmd : { *(.u_boot_cmd) }
  83  __u_boot_cmd_end = .;
  84
  85  . = .;
  86  __start___ex_table = .;
  87  __ex_table : { *(__ex_table) }
  88  __stop___ex_table = .;
  89
  90  . = ALIGN(256);
  91  __init_begin = .;
  92  .text.init : { *(.text.init) }
  93  .data.init : { *(.data.init) }
  94  . = ALIGN(256);
  95  __init_end = .;
  96
  97#ifdef CONFIG_440
  98  .bootpg RESET_VECTOR_ADDRESS - 0xffc :
  99  {
 100    arch/powerpc/cpu/ppc4xx/start.o     (.bootpg)
 101
 102    /*
 103     * PPC440 board need a board specific object with the
 104     * TLB definitions. This needs to get included right after
 105     * start.o, since the first shadow TLB only covers 4k
 106     * of address space.
 107     */
 108#ifdef CONFIG_INIT_TLB
 109    CONFIG_INIT_TLB (.bootpg)
 110#else
 111    CONFIG_BOARDDIR/init.o      (.bootpg)
 112#endif
 113  } :text = 0xffff
 114#endif
 115
 116  .resetvec RESET_VECTOR_ADDRESS :
 117  {
 118    KEEP(*(.resetvec))
 119  } :text = 0xffff
 120
 121  . = RESET_VECTOR_ADDRESS + 0x4;
 122
 123  /*
 124   * Make sure that the bss segment isn't linked at 0x0, otherwise its
 125   * address won't be updated during relocation fixups.  Note that
 126   * this is a temporary fix.  Code to dynamically the fixup the bss
 127   * location will be added in the future.  When the bss relocation
 128   * fixup code is present this workaround should be removed.
 129   */
 130#if (RESET_VECTOR_ADDRESS == 0xfffffffc)
 131  . |= 0x10;
 132#endif
 133
 134  __bss_start = .;
 135  .bss (NOLOAD)       :
 136  {
 137   *(.bss*)
 138   *(.sbss*)
 139   *(COMMON)
 140  } :bss
 141
 142  . = ALIGN(4);
 143  __bss_end__ = . ;
 144  PROVIDE (end = .);
 145}
 146