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29#include <common.h>
30#include <miiphy.h>
31#include <phy.h>
32
33#include <asm/types.h>
34#include <linux/list.h>
35#include <malloc.h>
36#include <net.h>
37
38
39#undef MII_DEBUG
40
41#undef debug
42#ifdef MII_DEBUG
43#define debug(fmt, args...) printf(fmt, ##args)
44#else
45#define debug(fmt, args...)
46#endif
47
48static struct list_head mii_devs;
49static struct mii_dev *current_mii;
50
51
52
53
54struct mii_dev *miiphy_get_dev_by_name(const char *devname)
55{
56 struct list_head *entry;
57 struct mii_dev *dev;
58
59 if (!devname) {
60 printf("NULL device name!\n");
61 return NULL;
62 }
63
64 list_for_each(entry, &mii_devs) {
65 dev = list_entry(entry, struct mii_dev, link);
66 if (strcmp(dev->name, devname) == 0)
67 return dev;
68 }
69
70 return NULL;
71}
72
73
74
75
76
77void miiphy_init(void)
78{
79 INIT_LIST_HEAD(&mii_devs);
80 current_mii = NULL;
81}
82
83static int legacy_miiphy_read(struct mii_dev *bus, int addr, int devad, int reg)
84{
85 unsigned short val;
86 int ret;
87 struct legacy_mii_dev *ldev = bus->priv;
88
89 ret = ldev->read(bus->name, addr, reg, &val);
90
91 return ret ? -1 : (int)val;
92}
93
94static int legacy_miiphy_write(struct mii_dev *bus, int addr, int devad,
95 int reg, u16 val)
96{
97 struct legacy_mii_dev *ldev = bus->priv;
98
99 return ldev->write(bus->name, addr, reg, val);
100}
101
102
103
104
105
106
107void miiphy_register(const char *name,
108 int (*read)(const char *devname, unsigned char addr,
109 unsigned char reg, unsigned short *value),
110 int (*write)(const char *devname, unsigned char addr,
111 unsigned char reg, unsigned short value))
112{
113 struct mii_dev *new_dev;
114 struct legacy_mii_dev *ldev;
115
116 BUG_ON(strlen(name) >= MDIO_NAME_LEN);
117
118
119 new_dev = miiphy_get_dev_by_name(name);
120 if (new_dev) {
121 printf("miiphy_register: non unique device name '%s'\n", name);
122 return;
123 }
124
125
126 new_dev = mdio_alloc();
127 ldev = malloc(sizeof(*ldev));
128
129 if (new_dev == NULL || ldev == NULL) {
130 printf("miiphy_register: cannot allocate memory for '%s'\n",
131 name);
132 return;
133 }
134
135
136 new_dev->read = legacy_miiphy_read;
137 new_dev->write = legacy_miiphy_write;
138 strncpy(new_dev->name, name, MDIO_NAME_LEN);
139 new_dev->name[MDIO_NAME_LEN - 1] = 0;
140 ldev->read = read;
141 ldev->write = write;
142 new_dev->priv = ldev;
143
144 debug("miiphy_register: added '%s', read=0x%08lx, write=0x%08lx\n",
145 new_dev->name, ldev->read, ldev->write);
146
147
148 list_add_tail(&new_dev->link, &mii_devs);
149
150 if (!current_mii)
151 current_mii = new_dev;
152}
153
154struct mii_dev *mdio_alloc(void)
155{
156 struct mii_dev *bus;
157
158 bus = malloc(sizeof(*bus));
159 if (!bus)
160 return bus;
161
162 memset(bus, 0, sizeof(*bus));
163
164
165 INIT_LIST_HEAD(&bus->link);
166
167 return bus;
168}
169
170int mdio_register(struct mii_dev *bus)
171{
172 if (!bus || !bus->name || !bus->read || !bus->write)
173 return -1;
174
175
176 if (miiphy_get_dev_by_name(bus->name)) {
177 printf("mdio_register: non unique device name '%s'\n",
178 bus->name);
179 return -1;
180 }
181
182
183 list_add_tail(&bus->link, &mii_devs);
184
185 if (!current_mii)
186 current_mii = bus;
187
188 return 0;
189}
190
191void mdio_list_devices(void)
192{
193 struct list_head *entry;
194
195 list_for_each(entry, &mii_devs) {
196 int i;
197 struct mii_dev *bus = list_entry(entry, struct mii_dev, link);
198
199 printf("%s:\n", bus->name);
200
201 for (i = 0; i < PHY_MAX_ADDR; i++) {
202 struct phy_device *phydev = bus->phymap[i];
203
204 if (phydev) {
205 printf("%d - %s", i, phydev->drv->name);
206
207 if (phydev->dev)
208 printf(" <--> %s\n", phydev->dev->name);
209 else
210 printf("\n");
211 }
212 }
213 }
214}
215
216int miiphy_set_current_dev(const char *devname)
217{
218 struct mii_dev *dev;
219
220 dev = miiphy_get_dev_by_name(devname);
221 if (dev) {
222 current_mii = dev;
223 return 0;
224 }
225
226 printf("No such device: %s\n", devname);
227
228 return 1;
229}
230
231struct mii_dev *mdio_get_current_dev(void)
232{
233 return current_mii;
234}
235
236struct phy_device *mdio_phydev_for_ethname(const char *ethname)
237{
238 struct list_head *entry;
239 struct mii_dev *bus;
240
241 list_for_each(entry, &mii_devs) {
242 int i;
243 bus = list_entry(entry, struct mii_dev, link);
244
245 for (i = 0; i < PHY_MAX_ADDR; i++) {
246 if (!bus->phymap[i] || !bus->phymap[i]->dev)
247 continue;
248
249 if (strcmp(bus->phymap[i]->dev->name, ethname) == 0)
250 return bus->phymap[i];
251 }
252 }
253
254 printf("%s is not a known ethernet\n", ethname);
255 return NULL;
256}
257
258const char *miiphy_get_current_dev(void)
259{
260 if (current_mii)
261 return current_mii->name;
262
263 return NULL;
264}
265
266static struct mii_dev *miiphy_get_active_dev(const char *devname)
267{
268
269 if (current_mii)
270 if (strcmp(current_mii->name, devname) == 0)
271 return current_mii;
272
273
274 if (miiphy_set_current_dev(devname))
275 return NULL;
276 else
277 return current_mii;
278}
279
280
281
282
283
284
285
286
287
288
289
290int miiphy_read(const char *devname, unsigned char addr, unsigned char reg,
291 unsigned short *value)
292{
293 struct mii_dev *bus;
294 int ret;
295
296 bus = miiphy_get_active_dev(devname);
297 if (!bus)
298 return 1;
299
300 ret = bus->read(bus, addr, MDIO_DEVAD_NONE, reg);
301 if (ret < 0)
302 return 1;
303
304 *value = (unsigned short)ret;
305 return 0;
306}
307
308
309
310
311
312
313
314
315
316
317
318int miiphy_write(const char *devname, unsigned char addr, unsigned char reg,
319 unsigned short value)
320{
321 struct mii_dev *bus;
322
323 bus = miiphy_get_active_dev(devname);
324 if (bus)
325 return bus->write(bus, addr, MDIO_DEVAD_NONE, reg, value);
326
327 return 1;
328}
329
330
331
332
333
334void miiphy_listdev(void)
335{
336 struct list_head *entry;
337 struct mii_dev *dev;
338
339 puts("MII devices: ");
340 list_for_each(entry, &mii_devs) {
341 dev = list_entry(entry, struct mii_dev, link);
342 printf("'%s' ", dev->name);
343 }
344 puts("\n");
345
346 if (current_mii)
347 printf("Current device: '%s'\n", current_mii->name);
348}
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363int miiphy_info(const char *devname, unsigned char addr, unsigned int *oui,
364 unsigned char *model, unsigned char *rev)
365{
366 unsigned int reg = 0;
367 unsigned short tmp;
368
369 if (miiphy_read(devname, addr, MII_PHYSID2, &tmp) != 0) {
370 debug("PHY ID register 2 read failed\n");
371 return -1;
372 }
373 reg = tmp;
374
375 debug("MII_PHYSID2 @ 0x%x = 0x%04x\n", addr, reg);
376
377 if (reg == 0xFFFF) {
378
379 return -1;
380 }
381
382 if (miiphy_read(devname, addr, MII_PHYSID1, &tmp) != 0) {
383 debug("PHY ID register 1 read failed\n");
384 return -1;
385 }
386 reg |= tmp << 16;
387 debug("PHY_PHYIDR[1,2] @ 0x%x = 0x%08x\n", addr, reg);
388
389 *oui = (reg >> 10);
390 *model = (unsigned char)((reg >> 4) & 0x0000003F);
391 *rev = (unsigned char)(reg & 0x0000000F);
392 return 0;
393}
394
395#ifndef CONFIG_PHYLIB
396
397
398
399
400
401
402
403
404
405int miiphy_reset(const char *devname, unsigned char addr)
406{
407 unsigned short reg;
408 int timeout = 500;
409
410 if (miiphy_read(devname, addr, MII_BMCR, ®) != 0) {
411 debug("PHY status read failed\n");
412 return -1;
413 }
414 if (miiphy_write(devname, addr, MII_BMCR, reg | BMCR_RESET) != 0) {
415 debug("PHY reset failed\n");
416 return -1;
417 }
418#ifdef CONFIG_PHY_RESET_DELAY
419 udelay(CONFIG_PHY_RESET_DELAY);
420#endif
421
422
423
424
425
426 reg = 0x8000;
427 while (((reg & 0x8000) != 0) && timeout--) {
428 if (miiphy_read(devname, addr, MII_BMCR, ®) != 0) {
429 debug("PHY status read failed\n");
430 return -1;
431 }
432 udelay(1000);
433 }
434 if ((reg & 0x8000) == 0) {
435 return 0;
436 } else {
437 puts("PHY reset timed out\n");
438 return -1;
439 }
440 return 0;
441}
442#endif
443
444
445
446
447
448int miiphy_speed(const char *devname, unsigned char addr)
449{
450 u16 bmcr, anlpar;
451
452#if defined(CONFIG_PHY_GIGE)
453 u16 btsr;
454
455
456
457
458
459 if (miiphy_is_1000base_x(devname, addr))
460 return _1000BASET;
461
462
463
464
465
466 if (miiphy_read(devname, addr, MII_STAT1000, &btsr)) {
467 printf("PHY 1000BT status");
468 goto miiphy_read_failed;
469 }
470 if (btsr != 0xFFFF &&
471 (btsr & (PHY_1000BTSR_1000FD | PHY_1000BTSR_1000HD)))
472 return _1000BASET;
473#endif
474
475
476 if (miiphy_read(devname, addr, MII_BMCR, &bmcr)) {
477 printf("PHY speed");
478 goto miiphy_read_failed;
479 }
480
481 if (bmcr & BMCR_ANENABLE) {
482
483 if (miiphy_read(devname, addr, MII_LPA, &anlpar)) {
484 printf("PHY AN speed");
485 goto miiphy_read_failed;
486 }
487 return (anlpar & LPA_100) ? _100BASET : _10BASET;
488 }
489
490 return (bmcr & BMCR_SPEED100) ? _100BASET : _10BASET;
491
492miiphy_read_failed:
493 printf(" read failed, assuming 10BASE-T\n");
494 return _10BASET;
495}
496
497
498
499
500
501int miiphy_duplex(const char *devname, unsigned char addr)
502{
503 u16 bmcr, anlpar;
504
505#if defined(CONFIG_PHY_GIGE)
506 u16 btsr;
507
508
509 if (miiphy_is_1000base_x(devname, addr)) {
510
511 if (miiphy_read(devname, addr, MII_LPA, &anlpar)) {
512 printf("1000BASE-X PHY AN duplex");
513 goto miiphy_read_failed;
514 }
515 }
516
517
518
519
520 if (miiphy_read(devname, addr, MII_STAT1000, &btsr)) {
521 printf("PHY 1000BT status");
522 goto miiphy_read_failed;
523 }
524 if (btsr != 0xFFFF) {
525 if (btsr & PHY_1000BTSR_1000FD) {
526 return FULL;
527 } else if (btsr & PHY_1000BTSR_1000HD) {
528 return HALF;
529 }
530 }
531#endif
532
533
534 if (miiphy_read(devname, addr, MII_BMCR, &bmcr)) {
535 puts("PHY duplex");
536 goto miiphy_read_failed;
537 }
538
539 if (bmcr & BMCR_ANENABLE) {
540
541 if (miiphy_read(devname, addr, MII_LPA, &anlpar)) {
542 puts("PHY AN duplex");
543 goto miiphy_read_failed;
544 }
545 return (anlpar & (LPA_10FULL | LPA_100FULL)) ?
546 FULL : HALF;
547 }
548
549 return (bmcr & BMCR_FULLDPLX) ? FULL : HALF;
550
551miiphy_read_failed:
552 printf(" read failed, assuming half duplex\n");
553 return HALF;
554}
555
556
557
558
559
560
561int miiphy_is_1000base_x(const char *devname, unsigned char addr)
562{
563#if defined(CONFIG_PHY_GIGE)
564 u16 exsr;
565
566 if (miiphy_read(devname, addr, MII_ESTATUS, &exsr)) {
567 printf("PHY extended status read failed, assuming no "
568 "1000BASE-X\n");
569 return 0;
570 }
571 return 0 != (exsr & (ESTATUS_1000XF | ESTATUS_1000XH));
572#else
573 return 0;
574#endif
575}
576
577#ifdef CONFIG_SYS_FAULT_ECHO_LINK_DOWN
578
579
580
581
582int miiphy_link(const char *devname, unsigned char addr)
583{
584 unsigned short reg;
585
586
587 (void)miiphy_read(devname, addr, MII_BMSR, ®);
588 if (miiphy_read(devname, addr, MII_BMSR, ®)) {
589 puts("MII_BMSR read failed, assuming no link\n");
590 return 0;
591 }
592
593
594 if ((reg & BMSR_LSTATUS) != 0) {
595 return 1;
596 } else {
597 return 0;
598 }
599}
600#endif
601