uboot/include/configs/efikamx.h
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   1/*
   2 * Copyright (C) 2007, Guennadi Liakhovetski <lg@denx.de>
   3 *
   4 * (C) Copyright 2009 Freescale Semiconductor, Inc.
   5 *
   6 * Configuration settings for the MX51EVK Board
   7 *
   8 * This program is free software; you can redistribute it and/or
   9 * modify it under the terms of the GNU General Public License as
  10 * published by the Free Software Foundation; either version 2 of
  11 * the License, or (at your option) any later version.
  12 *
  13 * This program is distributed in the hope that it will be useful,
  14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16 * GNU General Public License for more details.
  17 *
  18 * You should have received a copy of the GNU General Public License
  19 * along with this program; if not, write to the Free Software
  20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  21 * MA 02111-1307 USA
  22 */
  23
  24#ifndef __CONFIG_H
  25#define __CONFIG_H
  26
  27#include <config_cmd_default.h>
  28
  29/*
  30 * High Level Board Configuration Options
  31 */
  32/* An i.MX51 CPU */
  33#define CONFIG_MX51
  34
  35#define machine_is_efikamx()    (CONFIG_MACH_TYPE == MACH_TYPE_MX51_EFIKAMX)
  36#define machine_is_efikasb()    (CONFIG_MACH_TYPE == MACH_TYPE_MX51_EFIKASB)
  37
  38#include <asm/arch/imx-regs.h>
  39
  40#define CONFIG_SYS_MX5_HCLK             24000000
  41#define CONFIG_SYS_MX5_CLK32            32768
  42#define CONFIG_DISPLAY_CPUINFO
  43#define CONFIG_DISPLAY_BOARDINFO
  44
  45#define CONFIG_SYS_TEXT_BASE            0x97800000
  46
  47#define CONFIG_L2_OFF
  48#define CONFIG_SYS_ICACHE_OFF
  49#define CONFIG_SYS_DCACHE_OFF
  50
  51/*
  52 * Bootloader Components Configuration
  53 */
  54#define CONFIG_CMD_SPI
  55#define CONFIG_CMD_SF
  56#define CONFIG_CMD_MMC
  57#define CONFIG_CMD_FAT
  58#define CONFIG_CMD_EXT2
  59#define CONFIG_CMD_IDE
  60#define CONFIG_CMD_NET
  61#define CONFIG_CMD_DATE
  62#undef CONFIG_CMD_IMLS
  63
  64/*
  65 * Environmental settings
  66 */
  67
  68#define CONFIG_ENV_OFFSET               (6 * 64 * 1024)
  69#define CONFIG_ENV_SECT_SIZE            (1 * 64 * 1024)
  70#define CONFIG_ENV_SIZE                 (4 * 1024)
  71
  72/*
  73 * ATAG setup
  74 */
  75#define CONFIG_CMDLINE_TAG              /* enable passing of ATAGs */
  76#define CONFIG_REVISION_TAG
  77#define CONFIG_SETUP_MEMORY_TAGS
  78#define CONFIG_INITRD_TAG
  79
  80#define CONFIG_OF_LIBFDT                1
  81
  82/*
  83 * Size of malloc() pool
  84 */
  85#define CONFIG_SYS_MALLOC_LEN           (CONFIG_ENV_SIZE + 2 * 1024 * 1024)
  86
  87#define CONFIG_BOARD_EARLY_INIT_F
  88#define CONFIG_BOARD_LATE_INIT
  89
  90/*
  91 * Hardware drivers
  92 */
  93#define CONFIG_MXC_UART
  94#define CONFIG_MXC_UART_BASE            UART1_BASE
  95#define CONFIG_CONS_INDEX               1
  96#define CONFIG_BAUDRATE                 115200
  97#define CONFIG_SYS_BAUDRATE_TABLE       {9600, 19200, 38400, 57600, 115200}
  98
  99#define CONFIG_MXC_GPIO
 100
 101/*
 102 * SPI Interface
 103 */
 104#ifdef CONFIG_CMD_SPI
 105
 106#define CONFIG_HARD_SPI
 107#define CONFIG_MXC_SPI
 108#define CONFIG_DEFAULT_SPI_BUS          1
 109#define CONFIG_DEFAULT_SPI_MODE         (SPI_MODE_0 | SPI_CS_HIGH)
 110
 111/* SPI FLASH */
 112#ifdef CONFIG_CMD_SF
 113
 114#define CONFIG_SPI_FLASH
 115#define CONFIG_SPI_FLASH_SST
 116#define CONFIG_SF_DEFAULT_CS            (1 | 121 << 8)
 117#define CONFIG_SF_DEFAULT_MODE          (SPI_MODE_0)
 118#define CONFIG_SF_DEFAULT_SPEED         25000000
 119
 120#define CONFIG_ENV_SPI_CS               (1 | 121 << 8)
 121#define CONFIG_ENV_SPI_BUS              0
 122#define CONFIG_ENV_SPI_MAX_HZ           25000000
 123#define CONFIG_ENV_SPI_MODE             (SPI_MODE_0)
 124#define CONFIG_FSL_ENV_IN_SF
 125#define CONFIG_ENV_IS_IN_SPI_FLASH
 126#define CONFIG_SYS_NO_FLASH
 127
 128#else
 129#define CONFIG_ENV_IS_NOWHERE
 130#endif
 131
 132/* SPI PMIC */
 133#define CONFIG_PMIC
 134#define CONFIG_PMIC_SPI
 135#define CONFIG_PMIC_FSL
 136#define CONFIG_FSL_PMIC_BUS             0
 137#define CONFIG_FSL_PMIC_CS              (0 | 120 << 8)
 138#define CONFIG_FSL_PMIC_CLK             25000000
 139#define CONFIG_FSL_PMIC_MODE            (SPI_MODE_0 | SPI_CS_HIGH)
 140#define CONFIG_FSL_PMIC_BITLEN  32
 141#define CONFIG_RTC_MC13XXX
 142#endif
 143
 144/*
 145 * MMC Configs
 146 */
 147#ifdef CONFIG_CMD_MMC
 148#define CONFIG_MMC
 149#define CONFIG_GENERIC_MMC
 150#define CONFIG_FSL_ESDHC
 151#define CONFIG_SYS_FSL_ESDHC_ADDR       0
 152#define CONFIG_SYS_FSL_ESDHC_NUM        2
 153#endif
 154
 155/*
 156 * ATA/IDE
 157 */
 158#ifdef CONFIG_CMD_IDE
 159#define CONFIG_LBA48
 160#undef CONFIG_IDE_LED
 161#undef CONFIG_IDE_RESET
 162
 163#define CONFIG_MX51_PATA
 164
 165#define __io
 166
 167#define CONFIG_SYS_IDE_MAXBUS           1
 168#define CONFIG_SYS_IDE_MAXDEVICE        1
 169
 170#define CONFIG_SYS_ATA_BASE_ADDR        0x83fe0000
 171#define CONFIG_SYS_ATA_IDE0_OFFSET      0x0
 172
 173#define CONFIG_SYS_ATA_DATA_OFFSET      0xa0
 174#define CONFIG_SYS_ATA_REG_OFFSET       0xa0
 175#define CONFIG_SYS_ATA_ALT_OFFSET       0xd8
 176
 177#define CONFIG_SYS_ATA_STRIDE           4
 178
 179#define CONFIG_IDE_PREINIT
 180#define CONFIG_MXC_ATA_PIO_MODE         4
 181#endif
 182
 183/*
 184 * USB
 185 */
 186#define CONFIG_CMD_USB
 187#ifdef  CONFIG_CMD_USB
 188#define CONFIG_USB_EHCI                 /* Enable EHCI USB support */
 189#define CONFIG_USB_EHCI_MX5
 190#define CONFIG_USB_ULPI
 191#define CONFIG_USB_ULPI_VIEWPORT
 192#define CONFIG_MXC_USB_PORT     1
 193#if     (CONFIG_MXC_USB_PORT == 0)
 194#define CONFIG_MXC_USB_PORTSC   (1 << 28)
 195#define CONFIG_MXC_USB_FLAGS    MXC_EHCI_INTERNAL_PHY
 196#else
 197#define CONFIG_MXC_USB_PORTSC   (2 << 30)
 198#define CONFIG_MXC_USB_FLAGS    0
 199#endif
 200#define CONFIG_EHCI_IS_TDI
 201#define CONFIG_USB_STORAGE
 202#define CONFIG_USB_HOST_ETHER
 203#define CONFIG_USB_KEYBOARD
 204#define CONFIG_SYS_USB_EVENT_POLL_VIA_CONTROL_EP
 205#define CONFIG_PREBOOT
 206/* USB NET */
 207#ifdef  CONFIG_CMD_NET
 208#define CONFIG_USB_ETHER_ASIX
 209#define CONFIG_CMD_PING
 210#define CONFIG_CMD_DHCP
 211#endif
 212#endif /* CONFIG_CMD_USB */
 213
 214/*
 215 * Filesystems
 216 */
 217#ifdef CONFIG_CMD_FAT
 218#define CONFIG_DOS_PARTITION
 219#ifdef  CONFIG_CMD_NET
 220#define CONFIG_CMD_NFS
 221#endif
 222#endif
 223
 224/*
 225 * Miscellaneous configurable options
 226 */
 227#define CONFIG_ENV_OVERWRITE
 228#define CONFIG_BOOTDELAY                3
 229#define CONFIG_LOADADDR                 0x90800000
 230
 231#define CONFIG_SYS_LONGHELP             /* undef to save memory */
 232#define CONFIG_SYS_HUSH_PARSER          /* use "hush" command parser */
 233#define CONFIG_SYS_PROMPT_HUSH_PS2      "> "
 234#define CONFIG_SYS_PROMPT               "Efika> "
 235#define CONFIG_AUTO_COMPLETE
 236#define CONFIG_SYS_CBSIZE               256     /* Console I/O Buffer Size */
 237/* Print Buffer Size */
 238#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
 239#define CONFIG_SYS_MAXARGS              16      /* max number of command args */
 240#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
 241
 242#define CONFIG_SYS_MEMTEST_START        0x90000000
 243#define CONFIG_SYS_MEMTEST_END          0x90010000
 244
 245#define CONFIG_SYS_LOAD_ADDR            CONFIG_LOADADDR
 246
 247#define CONFIG_SYS_HZ                   1000
 248#define CONFIG_CMDLINE_EDITING
 249
 250/*-----------------------------------------------------------------------
 251 * Stack sizes
 252 *
 253 * The stack sizes are set up in start.S using the settings below
 254 */
 255#define CONFIG_STACKSIZE        (128 * 1024)    /* regular stack */
 256
 257/*-----------------------------------------------------------------------
 258 * Physical Memory Map
 259 */
 260#define CONFIG_NR_DRAM_BANKS            1
 261#define PHYS_SDRAM_1                    CSD0_BASE_ADDR
 262#define PHYS_SDRAM_1_SIZE               (512 * 1024 * 1024)
 263
 264#define CONFIG_SYS_SDRAM_BASE           (PHYS_SDRAM_1)
 265#define CONFIG_SYS_INIT_RAM_ADDR        (IRAM_BASE_ADDR)
 266#define CONFIG_SYS_INIT_RAM_SIZE        (IRAM_SIZE)
 267
 268#define CONFIG_SYS_INIT_SP_OFFSET \
 269        (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
 270#define CONFIG_SYS_INIT_SP_ADDR \
 271        (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
 272
 273#define CONFIG_SYS_DDR_CLKSEL           0
 274#define CONFIG_SYS_CLKTL_CBCDR          0x59E35145
 275
 276#endif
 277