1/* 2 * (C) Copyright 2005 3 * Stefan Roese, DENX Software Engineering, sr@denx.de. 4 * John Otken, jotken@softadvances.com 5 * 6 * See file CREDITS for list of people who contributed to this 7 * project. 8 * 9 * This program is free software; you can redistribute it and/or 10 * modify it under the terms of the GNU General Public License as 11 * published by the Free Software Foundation; either version 2 of 12 * the License, or (at your option) any later version. 13 * 14 * This program is distributed in the hope that it will be useful, 15 * but WITHOUT ANY WARRANTY; without even the implied warranty of 16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 17 * GNU General Public License for more details. 18 * 19 * You should have received a copy of the GNU General Public License 20 * along with this program; if not, write to the Free Software 21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 22 * MA 02111-1307 USA 23 */ 24 25/************************************************************************ 26 * luan.h - configuration for LUAN board 27 ***********************************************************************/ 28#ifndef __CONFIG_H 29#define __CONFIG_H 30 31/*----------------------------------------------------------------------- 32 * High Level Configuration Options 33 *----------------------------------------------------------------------*/ 34#define CONFIG_LUAN 1 /* Board is Luan */ 35#define CONFIG_440SP 1 /* Specific PPC440SP support */ 36#define CONFIG_4xx 1 /* PPC4xx family */ 37#define CONFIG_440 1 38#define CONFIG_SYS_CLK_FREQ 33333333 /* external freq to pll */ 39 40#define CONFIG_SYS_TEXT_BASE 0xFFFB0000 41 42/* 43 * Include common defines/options for all AMCC eval boards 44 */ 45#define CONFIG_HOSTNAME luan 46#include "amcc-common.h" 47 48#define CONFIG_BOARD_EARLY_INIT_F 1 /* call board_early_init_f() */ 49#define CONFIG_MISC_INIT_R 1 /* call misc_init_r() */ 50 51/*----------------------------------------------------------------------- 52 * Base addresses -- Note these are effective addresses where the 53 * actual resources get mapped (not physical addresses) 54 *----------------------------------------------------------------------*/ 55#define CONFIG_SYS_LARGE_FLASH 0xffc00000 /* 4MB flash address CS0 */ 56#define CONFIG_SYS_SMALL_FLASH 0xff900000 /* 1MB flash address CS2 */ 57#define CONFIG_SYS_SRAM_BASE 0xff800000 /* 1MB SRAM address CS2 */ 58#define CONFIG_SYS_SRAM_SIZE (1 << 20) 59#define CONFIG_SYS_EPLD_BASE 0xff000000 /* EPLD and FRAM CS1 */ 60 61#define CONFIG_SYS_ISRAM_BASE 0xf8000000 /* internal 8k SRAM (L2 cache) */ 62 63#define CONFIG_SYS_PCI_MEMBASE 0x80000000 /* mapped pci memory */ 64#define CONFIG_SYS_PCI_BASE 0xd0000000 /* internal PCI regs */ 65#define CONFIG_SYS_PCI_TARGBASE 0x80000000 /* PCIaddr mapped to CONFIG_SYS_PCI_MEMBASE */ 66 67#if CONFIG_SYS_LARGE_FLASH == 0xffc00000 68#define CONFIG_SYS_FLASH_BASE CONFIG_SYS_LARGE_FLASH 69#else 70#define CONFIG_SYS_FLASH_BASE CONFIG_SYS_SMALL_FLASH 71#endif 72 73#if CONFIG_SYS_SRAM_BASE 74#define CONFIG_SYS_KBYTES_SDRAM 1024*2 75#else 76#define CONFIG_SYS_KBYTES_SDRAM 1024 77#endif 78 79/*----------------------------------------------------------------------- 80 * Initial RAM & stack pointer (placed in SDRAM) 81 *----------------------------------------------------------------------*/ 82#define CONFIG_SYS_INIT_RAM_ADDR CONFIG_SYS_ISRAM_BASE 83#define CONFIG_SYS_INIT_RAM_SIZE (8 << 10) 84#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) 85#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET 86 87/*----------------------------------------------------------------------- 88 * Serial Port 89 *----------------------------------------------------------------------*/ 90#define CONFIG_CONS_INDEX 1 /* Use UART0 */ 91#define CONFIG_SYS_EXT_SERIAL_CLOCK 11059200 /* external 11.059MHz clk */ 92 93/*----------------------------------------------------------------------- 94 * Environment 95 *----------------------------------------------------------------------*/ 96/* 97 * Define here the location of the environment variables (FLASH or EEPROM). 98 * Note: DENX encourages to use redundant environment in FLASH. 99 */ 100#define CONFIG_ENV_IS_IN_FLASH 1 /* use FLASH for environment vars */ 101 102/*----------------------------------------------------------------------- 103 * FLASH related 104 *----------------------------------------------------------------------*/ 105#define CONFIG_SYS_MAX_FLASH_BANKS 3 /* max number of memory banks */ 106#define CONFIG_SYS_MAX_FLASH_SECT 64 /* max number of sectors on one chip */ 107 108#define CONFIG_SYS_FLASH_ERASE_TOUT 120000 /* Timeout for Flash Erase (in ms) */ 109#define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write (in ms) */ 110 111#define CONFIG_SYS_FLASH_EMPTY_INFO /* print 'E' for empty sector on flinfo */ 112 113#define CONFIG_SYS_FLASH_ADDR0 0x555 114#define CONFIG_SYS_FLASH_ADDR1 0x2aa 115#define CONFIG_SYS_FLASH_WORD_SIZE unsigned char 116 117#ifdef CONFIG_ENV_IS_IN_FLASH 118#define CONFIG_ENV_SECT_SIZE 0x10000 /* size of one complete sector */ 119#define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE-CONFIG_ENV_SECT_SIZE) 120#define CONFIG_ENV_SIZE 0x2000 /* Total Size of Environment Sector */ 121 122/* Address and size of Redundant Environment Sector */ 123#define CONFIG_ENV_ADDR_REDUND (CONFIG_ENV_ADDR-CONFIG_ENV_SECT_SIZE) 124#define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SIZE) 125#endif /* CONFIG_ENV_IS_IN_FLASH */ 126 127/*----------------------------------------------------------------------- 128 * DDR SDRAM 129 *----------------------------------------------------------------------*/ 130#define CONFIG_SPD_EEPROM 1 /* Use SPD EEPROM for setup */ 131#define SPD_EEPROM_ADDRESS {0x53, 0x52} /* SPD i2c spd addresses*/ 132#define CONFIG_DDR_ECC 1 /* with ECC support */ 133 134/*----------------------------------------------------------------------- 135 * I2C 136 *----------------------------------------------------------------------*/ 137#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */ 138 139#define CONFIG_SYS_I2C_MULTI_EEPROMS 140#define CONFIG_SYS_I2C_EEPROM_ADDR (0xa8>>1) 141#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 142#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3 143#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10 144 145/* 146 * Default environment variables 147 */ 148#define CONFIG_EXTRA_ENV_SETTINGS \ 149 CONFIG_AMCC_DEF_ENV \ 150 CONFIG_AMCC_DEF_ENV_PPC \ 151 CONFIG_AMCC_DEF_ENV_NOR_UPD \ 152 "kernel_addr=fc000000\0" \ 153 "ramdisk_addr=fc100000\0" \ 154 "" 155 156#define CONFIG_HAS_ETH0 157#define CONFIG_PHY_ADDR 1 158#define CONFIG_CIS8201_PHY 1 /* Enable 'special' RGMII mode for Cicada phy */ 159#define CONFIG_PHY_GIGE 1 /* Include GbE speed/duplex detection */ 160 161#ifdef DEBUG 162#define CONFIG_PANIC_HANG 163#else 164#define CONFIG_HW_WATCHDOG /* watchdog */ 165#endif 166 167/* 168 * Commands additional to the ones defined in amcc-common.h 169 */ 170#define CONFIG_CMD_PCI 171#define CONFIG_CMD_SDRAM 172 173/*----------------------------------------------------------------------- 174 * PCI stuff 175 *----------------------------------------------------------------------- 176 */ 177#if defined(CONFIG_CMD_PCI) 178 179/* General PCI */ 180#define CONFIG_PCI /* include pci support */ 181#define CONFIG_PCI_PNP /* do (not) pci plug-and-play */ 182#define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */ 183 184/* Board-specific PCI */ 185#define CONFIG_SYS_PCI_TARGET_INIT 186#undef CONFIG_SYS_PCI_MASTER_INIT 187 188#define CONFIG_SYS_PCI_SUBSYS_VENDORID 0x10e8 /* AMCC */ 189#define CONFIG_SYS_PCI_SUBSYS_DEVICEID 0x4403 /* whatever */ 190 191#endif 192 193#endif /* __CONFIG_H */ 194