1/* 2 * ppmc7xx.h 3 * --------- 4 * 5 * Wind River PPMC 7xx/74xx board configuration file. 6 * 7 * By Richard Danter (richard.danter@windriver.com) 8 * Copyright (C) 2005 Wind River Systems 9 */ 10 11 12#ifndef __CONFIG_H 13#define __CONFIG_H 14 15#define CONFIG_PPMC7XX 16 17 18/*=================================================================== 19 * 20 * User configurable settings - Modify to your preference 21 * 22 *=================================================================== 23 */ 24 25/* 26 * Debug 27 * 28 * DEBUG - Define this is you want extra debug info 29 * GTREGREAD - Required to build with debug 30 * do_bdinfo - Required to build with debug 31 */ 32 33#ifdef DEBUG 34#define GTREGREAD(x) 0xFFFFFFFF 35#define do_bdinfo(a,b,c,d) 36#endif 37 38/* 39 * CPU type 40 * 41 * CONFIG_7xx - We have a 750 or 755 CPU 42 * CONFIG_74xx - We have a 7400 CPU 43 * CONFIG_ALTIVEC - We have altivec enabled CPU (only 7400) 44 * CONFIG_BUS_CLK - System bus clock in Hz 45 */ 46 47#define CONFIG_7xx 48#undef CONFIG_74xx 49#undef CONFIG_ALTIVEC 50#define CONFIG_BUS_CLK 66000000 51 52#define CONFIG_SYS_TEXT_BASE 0xFFF00000 53 54#ifndef __ASSEMBLY__ 55#include <galileo/core.h> 56#endif 57 58/* 59 * Monitor configuration 60 * 61 * List of command sets to include in shell 62 * 63 * The following command sets have been tested and known to work: 64 * 65 * CMD_CACHE - Cache control commands 66 * CMD_MEMORY - Memory display, change and test commands 67 * CMD_FLASH - Erase and program flash 68 * CMD_ENV - Environment commands 69 * CMD_RUN - Run commands stored in env vars 70 * CMD_ELF - Load ELF files 71 * CMD_NET - Networking/file download commands 72 * CMD_PIN - ICMP Echo Request command 73 * CMD_PCI - PCI Bus scanning command 74 */ 75 76/* 77 * BOOTP options 78 */ 79#define CONFIG_BOOTP_BOOTFILESIZE 80#define CONFIG_BOOTP_BOOTPATH 81#define CONFIG_BOOTP_GATEWAY 82#define CONFIG_BOOTP_HOSTNAME 83 84 85/* 86 * Command line configuration. 87 */ 88#include <config_cmd_default.h> 89 90#define CONFIG_CMD_FLASH 91#define CONFIG_CMD_SAVEENV 92#define CONFIG_CMD_RUN 93#define CONFIG_CMD_ELF 94#define CONFIG_CMD_NET 95#define CONFIG_CMD_PING 96#define CONFIG_CMD_PCI 97 98#undef CONFIG_CMD_KGDB 99 100 101/* 102 * Serial configuration 103 * 104 * CONFIG_CONS_INDEX - Serial console port number (COM1) 105 * CONFIG_BAUDRATE - Serial speed 106 */ 107 108#define CONFIG_CONS_INDEX 1 109#define CONFIG_BAUDRATE 9600 110 111 112/* 113 * PCI config 114 * 115 * CONFIG_PCI - Enable PCI bus 116 * CONFIG_PCI_PNP - Enable Plug & Play support 117 * CONFIG_PCI_SCAN_SHOW - Enable display of devices at startup 118 */ 119 120#define CONFIG_PCI 121#define CONFIG_PCI_PNP 122#undef CONFIG_PCI_SCAN_SHOW 123 124 125/* 126 * Network config 127 * 128 * CONFIG_EEPRO100 - Intel 8255x Ethernet Controller 129 * CONFIG_EEPRO100_SROM_WRITE - Enable writing to network card ROM 130 */ 131 132#define CONFIG_EEPRO100 133#define CONFIG_EEPRO100_SROM_WRITE 134 135 136/* 137 * Enable extra init functions 138 * 139 * CONFIG_MISC_INIT_F - Call pre-relocation init functions 140 * CONFIG_MISC_INIT_R - Call post relocation init functions 141 */ 142 143#undef CONFIG_MISC_INIT_F 144#define CONFIG_MISC_INIT_R 145 146 147/* 148 * Boot config 149 * 150 * CONFIG_BOOTCOMMAND - Command(s) to execute to auto-boot 151 * CONFIG_BOOTDELAY - How long to wait before auto-boot (in sec) 152 */ 153 154#define CONFIG_BOOTCOMMAND \ 155 "bootp;" \ 156 "setenv bootargs root=/dev/nfs rw nfsroot=$(serverip):$(rootpath) " \ 157 "ip=$(ipaddr):$(serverip):$(gatewayip):$(netmask):$(hostname)::off;" \ 158 "bootm" 159#define CONFIG_BOOTDELAY 5 160 161 162/*=================================================================== 163 * 164 * Board configuration settings - You should not need to modify these 165 * 166 *=================================================================== 167 */ 168 169 170/* 171 * Memory map 172 * 173 * This board runs in a standard CHRP (Map-B) configuration. 174 * 175 * Type Start End Size Width Chip Sel 176 * ----------- ----------- ----------- ------- ------- -------- 177 * SDRAM 0x00000000 0x04000000 64MB 64b SDRAMCS0 178 * User LED's 0x78000000 RCS3 179 * UART 0x7C000000 RCS2 180 * Mailbox 0xFF000000 RCS1 181 * Flash 0xFFC00000 0xFFFFFFFF 4MB 64b RCS0 182 * 183 * Flash sectors are laid out as follows. 184 * 185 * Sector Start End Size Comments 186 * ------- ----------- ----------- ------- ----------- 187 * 0 0xFFC00000 0xFFC3FFFF 256KB 188 * 1 0xFFC40000 0xFFC7FFFF 256KB 189 * 2 0xFFC80000 0xFFCBFFFF 256KB 190 * 3 0xFFCC0000 0xFFCFFFFF 256KB 191 * 4 0xFFD00000 0xFFD3FFFF 256KB 192 * 5 0xFFD40000 0xFFD7FFFF 256KB 193 * 6 0xFFD80000 0xFFDBFFFF 256KB 194 * 7 0xFFDC0000 0xFFDFFFFF 256KB 195 * 8 0xFFE00000 0xFFE3FFFF 256KB 196 * 9 0xFFE40000 0xFFE7FFFF 256KB 197 * 10 0xFFE80000 0xFFEBFFFF 256KB 198 * 11 0xFFEC0000 0xFFEFFFFF 256KB 199 * 12 0xFFF00000 0xFFF3FFFF 256KB U-Boot code here 200 * 13 0xFFF40000 0xFFF7FFFF 256KB 201 * 14 0xFFF80000 0xFFFBFFFF 256KB 202 * 15 0xFFFC0000 0xFFFDFFFF 128KB 203 * 16 0xFFFE0000 0xFFFE7FFF 32KB U-Boot env vars here 204 * 17 0xFFFE8000 0xFFFEFFFF 32KB U-Boot backup copy of env vars here 205 * 18 0xFFFF0000 0xFFFFFFFF 64KB 206 */ 207 208 209/* 210 * SDRAM config - see memory map details above. 211 * 212 * CONFIG_SYS_SDRAM_BASE - Start address of SDRAM, this _must_ be zero! 213 * CONFIG_SYS_SDRAM_SIZE - Total size of contiguous SDRAM bank(s) 214 */ 215 216#define CONFIG_SYS_SDRAM_BASE 0x00000000 217#define CONFIG_SYS_SDRAM_SIZE 0x04000000 218 219 220/* 221 * Flash config - see memory map details above. 222 * 223 * CONFIG_SYS_FLASH_BASE - Start address of flash memory 224 * CONFIG_SYS_FLASH_SIZE - Total size of contiguous flash mem 225 * CONFIG_SYS_FLASH_ERASE_TOUT - Erase timeout in ms 226 * CONFIG_SYS_FLASH_WRITE_TOUT - Write timeout in ms 227 * CONFIG_SYS_MAX_FLASH_BANKS - Number of banks of flash on board 228 * CONFIG_SYS_MAX_FLASH_SECT - Number of sectors in a bank 229 */ 230 231#define CONFIG_SYS_FLASH_BASE 0xFFC00000 232#define CONFIG_SYS_FLASH_SIZE 0x00400000 233#define CONFIG_SYS_FLASH_ERASE_TOUT 250000 234#define CONFIG_SYS_FLASH_WRITE_TOUT 5000 235#define CONFIG_SYS_MAX_FLASH_BANKS 1 236#define CONFIG_SYS_MAX_FLASH_SECT 19 237 238 239/* 240 * Monitor config - see memory map details above 241 * 242 * CONFIG_SYS_MONITOR_BASE - Base address of monitor code 243 * CONFIG_SYS_MALLOC_LEN - Size of malloc pool (128KB) 244 */ 245 246#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE 247#define CONFIG_SYS_MALLOC_LEN 0x20000 248 249 250/* 251 * Command shell settings 252 * 253 * CONFIG_SYS_BARGSIZE - Boot Argument buffer size 254 * CONFIG_SYS_BOOTMAPSZ - Size of app's mapped RAM at boot (Linux=8MB) 255 * CONFIG_SYS_CBSIZE - Console Buffer (input) size 256 * CONFIG_SYS_LOAD_ADDR - Default load address 257 * CONFIG_SYS_LONGHELP - Provide more detailed help 258 * CONFIG_SYS_MAXARGS - Number of args accepted by monitor commands 259 * CONFIG_SYS_MEMTEST_START - Start address of test to run on RAM 260 * CONFIG_SYS_MEMTEST_END - End address of RAM test 261 * CONFIG_SYS_PBSIZE - Print Buffer (output) size 262 * CONFIG_SYS_PROMPT - Prompt string 263 */ 264 265#define CONFIG_SYS_BARGSIZE 1024 266#define CONFIG_SYS_BOOTMAPSZ 0x800000 267#define CONFIG_SYS_CBSIZE 1024 268#define CONFIG_SYS_LOAD_ADDR 0x100000 269#define CONFIG_SYS_LONGHELP 270#define CONFIG_SYS_MAXARGS 16 271#define CONFIG_SYS_MEMTEST_START 0x00040000 272#define CONFIG_SYS_MEMTEST_END 0x00040100 273#define CONFIG_SYS_PBSIZE 1024 274#define CONFIG_SYS_PROMPT "=> " 275 276 277/* 278 * Environment config - see memory map details above 279 * 280 * CONFIG_ENV_IS_IN_FLASH - The env variables are stored in flash 281 * CONFIG_ENV_ADDR - Address of the sector containing env vars 282 * CONFIG_ENV_SIZE - Ammount of RAM for env vars (used to save RAM, 4KB) 283 * CONFIG_ENV_SECT_SIZE - Size of sector containing env vars (32KB) 284 */ 285 286#define CONFIG_ENV_IS_IN_FLASH 1 287#define CONFIG_ENV_ADDR 0xFFFE0000 288#define CONFIG_ENV_SIZE 0x1000 289#define CONFIG_ENV_ADDR_REDUND 0xFFFE8000 290#define CONFIG_ENV_SIZE_REDUND 0x1000 291#define CONFIG_ENV_SECT_SIZE 0x8000 292 293 294/* 295 * Initial RAM config 296 * 297 * Since the main system RAM is initialised very early, we place the INIT_RAM 298 * in the main system RAM just above the exception vectors. The contents are 299 * copied to top of RAM by the init code. 300 * 301 * CONFIG_SYS_INIT_RAM_ADDR - Address of Init RAM, above exception vect 302 * CONFIG_SYS_INIT_RAM_SIZE - Size of Init RAM 303 * GENERATED_GBL_DATA_SIZE - Ammount of RAM to reserve for global data 304 * CONFIG_SYS_GBL_DATA_OFFSET - Start of global data, top of stack 305 */ 306 307#define CONFIG_SYS_INIT_RAM_ADDR (CONFIG_SYS_SDRAM_BASE + 0x4000) 308#define CONFIG_SYS_INIT_RAM_SIZE 0x4000 309#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) 310 311 312/* 313 * Initial BAT config 314 * 315 * BAT0 - System SDRAM 316 * BAT1 - LED's and Serial Port 317 * BAT2 - PCI Memory 318 * BAT3 - PCI I/O including Flash Memory 319 */ 320 321#define CONFIG_SYS_IBAT0L (CONFIG_SYS_SDRAM_BASE | BATL_PP_10 | BATL_MEMCOHERENCE) 322#define CONFIG_SYS_IBAT0U (CONFIG_SYS_SDRAM_BASE | BATU_BL_64M | BATU_VS | BATU_VP) 323#define CONFIG_SYS_DBAT0L CONFIG_SYS_IBAT0L 324#define CONFIG_SYS_DBAT0U CONFIG_SYS_IBAT0U 325 326#define CONFIG_SYS_IBAT1L (0x70000000 | BATL_PP_RW | BATL_CACHEINHIBIT) 327#define CONFIG_SYS_IBAT1U (0x70000000 | BATU_BL_256M | BATU_VS | BATU_VP) 328#define CONFIG_SYS_DBAT1L (0x70000000 | BATL_PP_RW | BATL_CACHEINHIBIT | BATL_GUARDEDSTORAGE) 329#define CONFIG_SYS_DBAT1U (0x70000000 | BATU_BL_256M | BATU_VS | BATU_VP) 330 331#define CONFIG_SYS_IBAT2L (0x80000000 | BATL_PP_RW | BATL_CACHEINHIBIT) 332#define CONFIG_SYS_IBAT2U (0x80000000 | BATU_BL_256M | BATU_VS | BATU_VP) 333#define CONFIG_SYS_DBAT2L (0x80000000 | BATL_PP_RW | BATL_CACHEINHIBIT | BATL_GUARDEDSTORAGE) 334#define CONFIG_SYS_DBAT2U (0x80000000 | BATU_BL_256M | BATU_VS | BATU_VP) 335 336#define CONFIG_SYS_IBAT3L (0xF0000000 | BATL_PP_RW | BATL_CACHEINHIBIT) 337#define CONFIG_SYS_IBAT3U (0xF0000000 | BATU_BL_256M | BATU_VS | BATU_VP) 338#define CONFIG_SYS_DBAT3L (0xF0000000 | BATL_PP_RW | BATL_CACHEINHIBIT | BATL_GUARDEDSTORAGE) 339#define CONFIG_SYS_DBAT3U (0xF0000000 | BATU_BL_256M | BATU_VS | BATU_VP) 340 341 342/* 343 * Cache config 344 * 345 * CONFIG_SYS_CACHELINE_SIZE - Size of a cache line (CPU specific) 346 * CONFIG_SYS_L2 - L2 cache enabled if defined 347 * L2_INIT - L2 cache init flags 348 * L2_ENABLE - L2 cache enable flags 349 */ 350 351#define CONFIG_SYS_CACHELINE_SIZE 32 352#undef CONFIG_SYS_L2 353#define L2_INIT 0 354#define L2_ENABLE 0 355 356 357/* 358 * Clocks config 359 * 360 * CONFIG_SYS_BUS_CLK - Bus clock frequency in Hz 361 * CONFIG_SYS_HZ - Decrementer freq in Hz 362 */ 363 364#define CONFIG_SYS_BUS_CLK CONFIG_BUS_CLK 365#define CONFIG_SYS_HZ 1000 366 367 368/* 369 * Serial port config 370 * 371 * CONFIG_SYS_BAUDRATE_TABLE - List of valid baud rates 372 * CONFIG_SYS_NS16550 - Include the NS16550 driver 373 * CONFIG_SYS_NS16550_SERIAL - Include the serial (wrapper) driver 374 * CONFIG_SYS_NS16550_CLK - Frequency of reference clock 375 * CONFIG_SYS_NS16550_REG_SIZE - 64-bit accesses to 8-bit port 376 * CONFIG_SYS_NS16550_COM1 - Base address of 1st serial port 377 */ 378 379#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } 380#define CONFIG_SYS_NS16550 381#define CONFIG_SYS_NS16550_SERIAL 382#define CONFIG_SYS_NS16550_CLK 3686400 383#define CONFIG_SYS_NS16550_REG_SIZE -8 384#define CONFIG_SYS_NS16550_COM1 0x7C000000 385 386 387/* 388 * PCI Config - Address Map B (CHRP) 389 */ 390 391#define CONFIG_SYS_PCI_MEMORY_BUS 0x00000000 392#define CONFIG_SYS_PCI_MEMORY_PHYS 0x00000000 393#define CONFIG_SYS_PCI_MEMORY_SIZE 0x40000000 394#define CONFIG_SYS_PCI_MEM_BUS 0x80000000 395#define CONFIG_SYS_PCI_MEM_PHYS 0x80000000 396#define CONFIG_SYS_PCI_MEM_SIZE 0x7D000000 397#define CONFIG_SYS_ISA_MEM_BUS 0x00000000 398#define CONFIG_SYS_ISA_MEM_PHYS 0xFD000000 399#define CONFIG_SYS_ISA_MEM_SIZE 0x01000000 400#define CONFIG_SYS_PCI_IO_BUS 0x00800000 401#define CONFIG_SYS_PCI_IO_PHYS 0xFE800000 402#define CONFIG_SYS_PCI_IO_SIZE 0x00400000 403#define CONFIG_SYS_ISA_IO_BUS 0x00000000 404#define CONFIG_SYS_ISA_IO_PHYS 0xFE000000 405#define CONFIG_SYS_ISA_IO_SIZE 0x00800000 406#define CONFIG_SYS_ISA_IO_BASE_ADDRESS CONFIG_SYS_ISA_IO_PHYS 407#define CONFIG_SYS_ISA_IO CONFIG_SYS_ISA_IO_PHYS 408#define CONFIG_SYS_60X_PCI_IO_OFFSET CONFIG_SYS_ISA_IO_PHYS 409 410 411/* 412 * Extra init functions 413 * 414 * CONFIG_SYS_BOARD_ASM_INIT - Call assembly init code 415 */ 416 417#define CONFIG_SYS_BOARD_ASM_INIT 418 419#endif /* __CONFIG_H */ 420