uboot/arch/powerpc/cpu/mpc86xx/interrupts.c
<<
>>
Prefs
   1/*
   2 * (C) Copyright 2000-2002
   3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
   4 *
   5 * (C) Copyright 2002 (440 port)
   6 * Scott McNutt, Artesyn Communication Producs, smcnutt@artsyncp.com
   7 *
   8 * (C) Copyright 2003 Motorola Inc. (MPC85xx port)
   9 * Xianghua Xiao (X.Xiao@motorola.com)
  10 *
  11 * (C) Copyright 2004, 2007 Freescale Semiconductor. (MPC86xx Port)
  12 * Jeff Brown
  13 * Srikanth Srinivasan (srikanth.srinivasan@freescale.com)
  14 *
  15 * See file CREDITS for list of people who contributed to this
  16 * project.
  17 *
  18 * This program is free software; you can redistribute it and/or
  19 * modify it under the terms of the GNU General Public License as
  20 * published by the Free Software Foundation; either version 2 of
  21 * the License, or (at your option) any later version.
  22 *
  23 * This program is distributed in the hope that it will be useful,
  24 * but WITHOUT ANY WARRANTY; without even the implied warranty of
  25 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  26 * GNU General Public License for more details.
  27 *
  28 * You should have received a copy of the GNU General Public License
  29 * along with this program; if not, write to the Free Software
  30 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  31 * MA 02111-1307 USA
  32 */
  33
  34#include <common.h>
  35#include <mpc86xx.h>
  36#include <command.h>
  37#include <asm/processor.h>
  38#ifdef CONFIG_POST
  39#include <post.h>
  40#endif
  41
  42int interrupt_init_cpu(unsigned long *decrementer_count)
  43{
  44        volatile immap_t *immr = (immap_t *)CONFIG_SYS_IMMR;
  45        volatile ccsr_pic_t *pic = &immr->im_pic;
  46
  47#ifdef CONFIG_POST
  48        /*
  49         * The POST word is stored in the PIC's TFRR register which gets
  50         * cleared when the PIC is reset.  Save it off so we can restore it
  51         * later.
  52         */
  53        ulong post_word = post_word_load();
  54#endif
  55
  56        pic->gcr = MPC86xx_PICGCR_RST;
  57        while (pic->gcr & MPC86xx_PICGCR_RST)
  58                ;
  59        pic->gcr = MPC86xx_PICGCR_MODE;
  60
  61        *decrementer_count = get_tbclk() / CONFIG_SYS_HZ;
  62        debug("interrupt init: tbclk() = %ld MHz, decrementer_count = %ld\n",
  63              (get_tbclk() / 1000000),
  64              *decrementer_count);
  65
  66#ifdef CONFIG_INTERRUPTS
  67
  68        pic->iivpr1 = 0x810001; /* 50220 enable mcm interrupts */
  69        debug("iivpr1@%p = %x\n", &pic->iivpr1, pic->iivpr1);
  70
  71        pic->iivpr2 = 0x810002; /* 50240 enable ddr interrupts */
  72        debug("iivpr2@%p = %x\n", &pic->iivpr2, pic->iivpr2);
  73
  74        pic->iivpr3 = 0x810003; /* 50260 enable lbc interrupts */
  75        debug("iivpr3@%p = %x\n", &pic->iivpr3, pic->iivpr3);
  76
  77#if defined(CONFIG_PCI1) || defined(CONFIG_PCIE1)
  78        pic->iivpr8 = 0x810008; /* enable pcie1 interrupts */
  79        debug("iivpr8@%p = %x\n", &pic->iivpr8, pic->iivpr8);
  80#endif
  81#if defined(CONFIG_PCI2) || defined(CONFIG_PCIE2)
  82        pic->iivpr9 = 0x810009; /* enable pcie2 interrupts */
  83        debug("iivpr9@%p = %x\n", &pic->iivpr9, pic->iivpr9);
  84#endif
  85
  86        pic->ctpr = 0;  /* 40080 clear current task priority register */
  87#endif
  88
  89#ifdef CONFIG_POST
  90        post_word_store(post_word);
  91#endif
  92
  93        return 0;
  94}
  95
  96/*
  97 * timer_interrupt - gets called when the decrementer overflows,
  98 * with interrupts disabled.
  99 * Trivial implementation - no need to be really accurate.
 100 */
 101void timer_interrupt_cpu(struct pt_regs *regs)
 102{
 103        /* nothing to do here */
 104}
 105
 106/*
 107 * Install and free a interrupt handler. Not implemented yet.
 108 */
 109void irq_install_handler(int vec, interrupt_handler_t *handler, void *arg)
 110{
 111}
 112
 113void irq_free_handler(int vec)
 114{
 115}
 116
 117/*
 118 * irqinfo - print information about PCI devices,not implemented.
 119 */
 120int do_irqinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 121{
 122        return 0;
 123}
 124
 125/*
 126 * Handle external interrupts
 127 */
 128void external_interrupt(struct pt_regs *regs)
 129{
 130        puts("external_interrupt (oops!)\n");
 131}
 132