1/* 2 * (C) Copyright 2002-2010 3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de. 4 * 5 * See file CREDITS for list of people who contributed to this 6 * project. 7 * 8 * This program is free software; you can redistribute it and/or 9 * modify it under the terms of the GNU General Public License as 10 * published by the Free Software Foundation; either version 2 of 11 * the License, or (at your option) any later version. 12 * 13 * This program is distributed in the hope that it will be useful, 14 * but WITHOUT ANY WARRANTY; without even the implied warranty of 15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 16 * GNU General Public License for more details. 17 * 18 * You should have received a copy of the GNU General Public License 19 * along with this program; if not, write to the Free Software 20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 21 * MA 02111-1307 USA 22 */ 23 24#ifndef __ASM_GBL_DATA_H 25#define __ASM_GBL_DATA_H 26 27#include "config.h" 28#include "asm/types.h" 29 30/* 31 * The following data structure is placed in some memory wich is 32 * available very early after boot (like DPRAM on MPC8xx/MPC82xx, or 33 * some locked parts of the data cache) to allow for a minimum set of 34 * global variables during system initialization (until we have set 35 * up the memory controller so that we can use RAM). 36 * 37 * Keep it *SMALL* and remember to set GENERATED_GBL_DATA_SIZE > sizeof(gd_t) 38 */ 39 40typedef struct global_data { 41 bd_t *bd; 42 unsigned long flags; 43 unsigned long baudrate; 44 unsigned long cpu_clk; /* CPU clock in Hz! */ 45 unsigned long bus_clk; 46#if defined(CONFIG_8xx) 47 unsigned long brg_clk; 48#endif 49#if defined(CONFIG_CPM2) 50 /* There are many clocks on the MPC8260 - see page 9-5 */ 51 unsigned long vco_out; 52 unsigned long cpm_clk; 53 unsigned long scc_clk; 54 unsigned long brg_clk; 55#ifdef CONFIG_PCI 56 unsigned long pci_clk; 57#endif 58#endif 59 unsigned long mem_clk; 60#if defined(CONFIG_MPC83xx) 61 /* There are other clocks in the MPC83XX */ 62 u32 csb_clk; 63#if defined(CONFIG_MPC8308) || defined(CONFIG_MPC831x) || \ 64 defined(CONFIG_MPC834x) || defined(CONFIG_MPC837x) 65 u32 tsec1_clk; 66 u32 tsec2_clk; 67 u32 usbdr_clk; 68#endif 69#if defined (CONFIG_MPC834x) 70 u32 usbmph_clk; 71#endif /* CONFIG_MPC834x */ 72#if defined(CONFIG_MPC8315) 73 u32 tdm_clk; 74#endif 75 u32 core_clk; 76 u32 enc_clk; 77 u32 lbiu_clk; 78 u32 lclk_clk; 79 u32 pci_clk; 80#if defined(CONFIG_MPC8308) || defined(CONFIG_MPC831x) || \ 81 defined(CONFIG_MPC837x) 82 u32 pciexp1_clk; 83 u32 pciexp2_clk; 84#endif 85#if defined(CONFIG_MPC837x) || defined(CONFIG_MPC8315) 86 u32 sata_clk; 87#endif 88#if defined(CONFIG_MPC8360) 89 u32 mem_sec_clk; 90#endif /* CONFIG_MPC8360 */ 91#endif 92#if defined(CONFIG_FSL_ESDHC) 93 u32 sdhc_clk; 94#endif 95#if defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx) 96 u32 lbc_clk; 97 void *cpu; 98#endif /* CONFIG_MPC85xx || CONFIG_MPC86xx */ 99#if defined(CONFIG_MPC83xx) || defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx) 100 u32 i2c1_clk; 101 u32 i2c2_clk; 102#endif 103#if defined(CONFIG_QE) 104 u32 qe_clk; 105 u32 brg_clk; 106 uint mp_alloc_base; 107 uint mp_alloc_top; 108#endif /* CONFIG_QE */ 109#if defined(CONFIG_FSL_LAW) 110 u32 used_laws; 111#endif 112#if defined(CONFIG_E500) 113 u32 used_tlb_cams[(CONFIG_SYS_NUM_TLBCAMS+31)/32]; 114#endif 115#if defined(CONFIG_MPC5xxx) 116 unsigned long ipb_clk; 117 unsigned long pci_clk; 118#endif 119#if defined(CONFIG_MPC512X) 120 u32 ips_clk; 121 u32 csb_clk; 122 u32 pci_clk; 123#endif /* CONFIG_MPC512X */ 124#if defined(CONFIG_MPC8220) 125 unsigned long bExtUart; 126 unsigned long inp_clk; 127 unsigned long pci_clk; 128 unsigned long vco_clk; 129 unsigned long pev_clk; 130 unsigned long flb_clk; 131#endif 132 phys_size_t ram_size; /* RAM size */ 133 unsigned long reset_status; /* reset status register at boot */ 134#if defined(CONFIG_MPC83xx) 135 unsigned long arbiter_event_attributes; 136 unsigned long arbiter_event_address; 137#endif 138 unsigned long env_addr; /* Address of Environment struct */ 139 unsigned long env_valid; /* Checksum of Environment valid? */ 140 unsigned long have_console; /* serial_init() was called */ 141#ifdef CONFIG_PRE_CONSOLE_BUFFER 142 unsigned long precon_buf_idx; /* Pre-Console buffer index */ 143#endif 144#if defined(CONFIG_SYS_ALLOC_DPRAM) || defined(CONFIG_CPM2) 145 unsigned int dp_alloc_base; 146 unsigned int dp_alloc_top; 147#endif 148#if defined(CONFIG_4xx) 149 u32 uart_clk; 150#endif /* CONFIG_4xx */ 151#if defined(CONFIG_SYS_GT_6426x) 152 unsigned int mirror_hack[16]; 153#endif 154#if defined(CONFIG_A3000) || \ 155 defined(CONFIG_HIDDEN_DRAGON) || \ 156 defined(CONFIG_MUSENKI) || \ 157 defined(CONFIG_SANDPOINT) 158 void * console_addr; 159#endif 160 unsigned long relocaddr; /* Start address of U-Boot in RAM */ 161#if defined(CONFIG_LCD) || defined(CONFIG_VIDEO) 162 unsigned long fb_base; /* Base address of framebuffer memory */ 163#endif 164#if defined(CONFIG_POST) || defined(CONFIG_LOGBUFFER) 165 unsigned long post_log_word; /* Record POST activities */ 166 unsigned long post_log_res; /* success of POST test */ 167 unsigned long post_init_f_time; /* When post_init_f started */ 168#endif 169#ifdef CONFIG_BOARD_TYPES 170 unsigned long board_type; 171#endif 172#ifdef CONFIG_MODEM_SUPPORT 173 unsigned long do_mdm_init; 174 unsigned long be_quiet; 175#endif 176#if defined(CONFIG_LWMON) || defined(CONFIG_LWMON5) 177 unsigned long kbd_status; 178#endif 179#ifdef CONFIG_SYS_FPGA_COUNT 180 unsigned fpga_state[CONFIG_SYS_FPGA_COUNT]; 181#endif 182#if defined(CONFIG_WD_MAX_RATE) 183 unsigned long long wdt_last; /* trace watch-dog triggering rate */ 184#endif 185 void **jt; /* jump table */ 186 char env_buf[32]; /* buffer for getenv() before reloc. */ 187} gd_t; 188 189/* 190 * Global Data Flags 191 */ 192#define GD_FLG_RELOC 0x00001 /* Code was relocated to RAM */ 193#define GD_FLG_DEVINIT 0x00002 /* Devices have been initialized */ 194#define GD_FLG_SILENT 0x00004 /* Silent mode */ 195#define GD_FLG_POSTFAIL 0x00008 /* Critical POST test failed */ 196#define GD_FLG_POSTSTOP 0x00010 /* POST seqeunce aborted */ 197#define GD_FLG_LOGINIT 0x00020 /* Log Buffer has been initialized */ 198#define GD_FLG_DISABLE_CONSOLE 0x00040 /* Disable console (in & out) */ 199#define GD_FLG_ENV_READY 0x00080 /* Environment imported into hash table */ 200 201#if 1 202#define DECLARE_GLOBAL_DATA_PTR register volatile gd_t *gd asm ("r2") 203#else /* We could use plain global data, but the resulting code is bigger */ 204#define XTRN_DECLARE_GLOBAL_DATA_PTR extern 205#define DECLARE_GLOBAL_DATA_PTR XTRN_DECLARE_GLOBAL_DATA_PTR \ 206 gd_t *gd 207#endif 208 209#endif /* __ASM_GBL_DATA_H */ 210