LXR uboot/arch/powerpc/lib/board.c

   1/*
   2 * (C) Copyright 2000-2011
   3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
   4 *
   5 * See file CREDITS for list of people who contributed to this
   6 * project.
   7 *
   8 * This program is free software; you can redistribute it and/or
   9 * modify it under the terms of the GNU General Public License as
  10 * published by the Free Software Foundation; either version 2 of
  11 * the License, or (at your option) any later version.
  12 *
  13 * This program is distributed in the hope that it will be useful,
  14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16 * GNU General Public License for more details.
  17 *
  18 * You should have received a copy of the GNU General Public License
  19 * along with this program; if not, write to the Free Software
  20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  21 * MA 02111-1307 USA
  22 */
  23
  24#include <common.h>
  25#include <watchdog.h>
  26#include <command.h>
  27#include <malloc.h>
  28#include <stdio_dev.h>
  29#ifdef CONFIG_8xx
  30#include <mpc8xx.h>
  31#endif
  32#ifdef CONFIG_5xx
  33#include <mpc5xx.h>
  34#endif
  35#ifdef CONFIG_MPC5xxx
  36#include <mpc5xxx.h>
  37#endif
  38#if defined(CONFIG_CMD_IDE)
  39#include <ide.h>
  40#endif
  41#if defined(CONFIG_CMD_SCSI)
  42#include <scsi.h>
  43#endif
  44#if defined(CONFIG_CMD_KGDB)
  45#include <kgdb.h>
  46#endif
  47#ifdef CONFIG_STATUS_LED
  48#include <status_led.h>
  49#endif
  50#include <net.h>
  51#ifdef CONFIG_GENERIC_MMC
  52#include <mmc.h>
  53#endif
  54#include <serial.h>
  55#ifdef CONFIG_SYS_ALLOC_DPRAM
  56#if !defined(CONFIG_CPM2)
  57#include <commproc.h>
  58#endif
  59#endif
  60#include <version.h>
  61#if defined(CONFIG_BAB7xx)
  62#include <w83c553f.h>
  63#endif
  64#include <dtt.h>
  65#if defined(CONFIG_POST)
  66#include <post.h>
  67#endif
  68#if defined(CONFIG_LOGBUFFER)
  69#include <logbuff.h>
  70#endif
  71#if defined(CONFIG_SYS_INIT_RAM_LOCK) && defined(CONFIG_E500)
  72#include <asm/cache.h>
  73#endif
  74#ifdef CONFIG_PS2KBD
  75#include <keyboard.h>
  76#endif
  77
  78#ifdef CONFIG_ADDR_MAP
  79#include <asm/mmu.h>
  80#endif
  81
  82#ifdef CONFIG_MP
  83#include <asm/mp.h>
  84#endif
  85
  86#ifdef CONFIG_BITBANGMII
  87#include <miiphy.h>
  88#endif
  89
  90#ifdef CONFIG_SYS_UPDATE_FLASH_SIZE
  91extern int update_flash_size(int flash_size);
  92#endif
  93
  94#if defined(CONFIG_SC3)
  95extern void sc3_read_eeprom(void);
  96#endif
  97
  98#if defined(CONFIG_CMD_DOC)
  99void doc_init(void);
 100#endif
 101#if defined(CONFIG_HARD_I2C) || \
 102    defined(CONFIG_SOFT_I2C)
 103#include <i2c.h>
 104#endif
 105#include <spi.h>
 106#include <nand.h>
 107
 108static char *failed = "*** failed ***\n";
 109
 110#if defined(CONFIG_OXC) || defined(CONFIG_RMU)
 111extern flash_info_t flash_info[];
 112#endif
 113
 114#if defined(CONFIG_START_IDE)
 115extern int board_start_ide(void);
 116#endif
 117#include <environment.h>
 118
 119DECLARE_GLOBAL_DATA_PTR;
 120
 121#if !defined(CONFIG_SYS_MEM_TOP_HIDE)
 122#define CONFIG_SYS_MEM_TOP_HIDE 0
 123#endif
 124
 125extern ulong __init_end;
 126extern ulong __bss_end__;
 127ulong monitor_flash_len;
 128
 129#if defined(CONFIG_CMD_BEDBUG)
 130#include <bedbug/type.h>
 131#endif
 132
 133/*
 134 * Utilities
 135 */
 136
 137/*
 138 * All attempts to come up with a "common" initialization sequence
 139 * that works for all boards and architectures failed: some of the
 140 * requirements are just _too_ different. To get rid of the resulting
 141 * mess of board dependend #ifdef'ed code we now make the whole
 142 * initialization sequence configurable to the user.
 143 *
 144 * The requirements for any new initalization function is simple: it
 145 * receives a pointer to the "global data" structure as it's only
 146 * argument, and returns an integer return code, where 0 means
 147 * "continue" and != 0 means "fatal error, hang the system".
 148 */
 149typedef int (init_fnc_t)(void);
 150
 151/*
 152 * Init Utilities
 153 *
 154 * Some of this code should be moved into the core functions,
 155 * but let's get it working (again) first...
 156 */
 157
 158static int init_baudrate(void)
 159{
 160        gd->baudrate = getenv_ulong("baudrate", 10, CONFIG_BAUDRATE);
 161        return 0;
 162}
 163
 164/***********************************************************************/
 165
 166void __board_add_ram_info(int use_default)
 167{
 168        /* please define platform specific board_add_ram_info() */
 169}
 170
 171void board_add_ram_info(int)
 172        __attribute__ ((weak, alias("__board_add_ram_info")));
 173
 174int __board_flash_wp_on(void)
 175{
 176        /*
 177         * Most flashes can't be detected when write protection is enabled,
 178         * so provide a way to let U-Boot gracefully ignore write protected
 179         * devices.
 180         */
 181        return 0;
 182}
 183
 184int board_flash_wp_on(void)
 185        __attribute__ ((weak, alias("__board_flash_wp_on")));
 186
 187void __cpu_secondary_init_r(void)
 188{
 189}
 190
 191void cpu_secondary_init_r(void)
 192        __attribute__ ((weak, alias("__cpu_secondary_init_r")));
 193
 194static int init_func_ram(void)
 195{
 196#ifdef  CONFIG_BOARD_TYPES
 197        int board_type = gd->board_type;
 198#else
 199        int board_type = 0;     /* use dummy arg */
 200#endif
 201        puts("DRAM:  ");
 202
 203        gd->ram_size = initdram(board_type);
 204
 205        if (gd->ram_size > 0) {
 206                print_size(gd->ram_size, "");
 207                board_add_ram_info(0);
 208                putc('\n');
 209                return 0;
 210        }
 211        puts(failed);
 212        return 1;
 213}
 214
 215/***********************************************************************/
 216
 217#if defined(CONFIG_HARD_I2C) || defined(CONFIG_SOFT_I2C)
 218static int init_func_i2c(void)
 219{
 220        puts("I2C:   ");
 221        i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
 222        puts("ready\n");
 223        return 0;
 224}
 225#endif
 226
 227#if defined(CONFIG_HARD_SPI)
 228static int init_func_spi(void)
 229{
 230        puts("SPI:   ");
 231        spi_init();
 232        puts("ready\n");
 233        return 0;
 234}
 235#endif
 236
 237/***********************************************************************/
 238
 239#if defined(CONFIG_WATCHDOG)
 240static int init_func_watchdog_init(void)
 241{
 242        puts("       Watchdog enabled\n");
 243        WATCHDOG_RESET();
 244        return 0;
 245}
 246
 247#define INIT_FUNC_WATCHDOG_INIT init_func_watchdog_init,
 248
 249static int init_func_watchdog_reset(void)
 250{
 251        WATCHDOG_RESET();
 252        return 0;
 253}
 254
 255#define INIT_FUNC_WATCHDOG_RESET        init_func_watchdog_reset,
 256#else
 257#define INIT_FUNC_WATCHDOG_INIT         /* undef */
 258#define INIT_FUNC_WATCHDOG_RESET        /* undef */
 259#endif /* CONFIG_WATCHDOG */
 260
 261/*
 262 * Initialization sequence
 263 */
 264
 265init_fnc_t *init_sequence[] = {
 266#if defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx)
 267        probecpu,
 268#endif
 269#if defined(CONFIG_BOARD_EARLY_INIT_F)
 270        board_early_init_f,
 271#endif
 272#if !defined(CONFIG_8xx_CPUCLK_DEFAULT)
 273        get_clocks,             /* get CPU and bus clocks (etc.) */
 274#if defined(CONFIG_TQM8xxL) && !defined(CONFIG_TQM866M) \
 275    && !defined(CONFIG_TQM885D)
 276        adjust_sdram_tbs_8xx,
 277#endif
 278        init_timebase,
 279#endif
 280#ifdef CONFIG_SYS_ALLOC_DPRAM
 281#if !defined(CONFIG_CPM2)
 282        dpram_init,
 283#endif
 284#endif
 285#if defined(CONFIG_BOARD_POSTCLK_INIT)
 286        board_postclk_init,
 287#endif
 288        env_init,
 289#if defined(CONFIG_8xx_CPUCLK_DEFAULT)
 290        /* get CPU and bus clocks according to the environment variable */
 291        get_clocks_866,
 292        /* adjust sdram refresh rate according to the new clock */
 293        sdram_adjust_866,
 294        init_timebase,
 295#endif
 296        init_baudrate,
 297        serial_init,
 298        console_init_f,
 299        display_options,
 300#if defined(CONFIG_8260)
 301        prt_8260_rsr,
 302        prt_8260_clks,
 303#endif /* CONFIG_8260 */
 304#if defined(CONFIG_MPC83xx)
 305        prt_83xx_rsr,
 306#endif
 307        checkcpu,
 308#if defined(CONFIG_MPC5xxx)
 309        prt_mpc5xxx_clks,
 310#endif /* CONFIG_MPC5xxx */
 311#if defined(CONFIG_MPC8220)
 312        prt_mpc8220_clks,
 313#endif
 314        checkboard,
 315        INIT_FUNC_WATCHDOG_INIT
 316#if defined(CONFIG_MISC_INIT_F)
 317        misc_init_f,
 318#endif
 319        INIT_FUNC_WATCHDOG_RESET
 320#if defined(CONFIG_HARD_I2C) || defined(CONFIG_SOFT_I2C)
 321        init_func_i2c,
 322#endif
 323#if defined(CONFIG_HARD_SPI)
 324        init_func_spi,
 325#endif
 326#ifdef CONFIG_POST
 327        post_init_f,
 328#endif
 329        INIT_FUNC_WATCHDOG_RESET init_func_ram,
 330#if defined(CONFIG_SYS_DRAM_TEST)
 331        testdram,
 332#endif /* CONFIG_SYS_DRAM_TEST */
 333        INIT_FUNC_WATCHDOG_RESET
 334        NULL,   /* Terminate this list */
 335};
 336
 337ulong get_effective_memsize(void)
 338{
 339#ifndef CONFIG_VERY_BIG_RAM
 340        return gd->ram_size;
 341#else
 342        /* limit stack to what we can reasonable map */
 343        return ((gd->ram_size > CONFIG_MAX_MEM_MAPPED) ?
 344                CONFIG_MAX_MEM_MAPPED : gd->ram_size);
 345#endif
 346}
 347
 348/*
 349 * This is the first part of the initialization sequence that is
 350 * implemented in C, but still running from ROM.
 351 *
 352 * The main purpose is to provide a (serial) console interface as
 353 * soon as possible (so we can see any error messages), and to
 354 * initialize the RAM so that we can relocate the monitor code to
 355 * RAM.
 356 *
 357 * Be aware of the restrictions: global data is read-only, BSS is not
 358 * initialized, and stack space is limited to a few kB.
 359 */
 360
 361#ifdef CONFIG_LOGBUFFER
 362unsigned long logbuffer_base(void)
 363{
 364        return CONFIG_SYS_SDRAM_BASE + get_effective_memsize() - LOGBUFF_LEN;
 365}
 366#endif
 367
 368void board_init_f(ulong bootflag)
 369{
 370        bd_t *bd;
 371        ulong len, addr, addr_sp;
 372        ulong *s;
 373        gd_t *id;
 374        init_fnc_t **init_fnc_ptr;
 375
 376#ifdef CONFIG_PRAM
 377        ulong reg;
 378#endif
 379
 380        /* Pointer is writable since we allocated a register for it */
 381        gd = (gd_t *) (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_GBL_DATA_OFFSET);
 382        /* compiler optimization barrier needed for GCC >= 3.4 */
 383        __asm__ __volatile__("":::"memory");
 384
 385#if !defined(CONFIG_CPM2) && !defined(CONFIG_MPC512X) && \
 386    !defined(CONFIG_MPC83xx) && !defined(CONFIG_MPC85xx) && \
 387    !defined(CONFIG_MPC86xx)
 388        /* Clear initial global data */
 389        memset((void *) gd, 0, sizeof(gd_t));
 390#endif
 391
 392        for (init_fnc_ptr = init_sequence; *init_fnc_ptr; ++init_fnc_ptr)
 393                if ((*init_fnc_ptr) () != 0)
 394                        hang();
 395
 396#ifdef CONFIG_POST
 397        post_bootmode_init();
 398        post_run(NULL, POST_ROM | post_bootmode_get(0));
 399#endif
 400
 401        WATCHDOG_RESET();
 402
 403        /*
 404         * Now that we have DRAM mapped and working, we can
 405         * relocate the code and continue running from DRAM.
 406         *
 407         * Reserve memory at end of RAM for (top down in that order):
 408         *  - area that won't get touched by U-Boot and Linux (optional)
 409         *  - kernel log buffer
 410         *  - protected RAM
 411         *  - LCD framebuffer
 412         *  - monitor code
 413         *  - board info struct
 414         */
 415        len = (ulong)&__bss_end__ - CONFIG_SYS_MONITOR_BASE;
 416
 417        /*
 418         * Subtract specified amount of memory to hide so that it won't
 419         * get "touched" at all by U-Boot. By fixing up gd->ram_size
 420         * the Linux kernel should now get passed the now "corrected"
 421         * memory size and won't touch it either. This should work
 422         * for arch/ppc and arch/powerpc. Only Linux board ports in
 423         * arch/powerpc with bootwrapper support, that recalculate the
 424         * memory size from the SDRAM controller setup will have to
 425         * get fixed.
 426         */
 427        gd->ram_size -= CONFIG_SYS_MEM_TOP_HIDE;
 428
 429        addr = CONFIG_SYS_SDRAM_BASE + get_effective_memsize();
 430
 431#if defined(CONFIG_MP) && (defined(CONFIG_MPC86xx) || defined(CONFIG_E500))
 432        /*
 433         * We need to make sure the location we intend to put secondary core
 434         * boot code is reserved and not used by any part of u-boot
 435         */
 436        if (addr > determine_mp_bootpg()) {
 437                addr = determine_mp_bootpg();
 438                debug("Reserving MP boot page to %08lx\n", addr);
 439        }
 440#endif
 441
 442#ifdef CONFIG_LOGBUFFER
 443#ifndef CONFIG_ALT_LB_ADDR
 444        /* reserve kernel log buffer */
 445        addr -= (LOGBUFF_RESERVE);
 446        debug("Reserving %dk for kernel logbuffer at %08lx\n", LOGBUFF_LEN,
 447              addr);
 448#endif
 449#endif
 450
 451#ifdef CONFIG_PRAM
 452        /*
 453         * reserve protected RAM
 454         */
 455        reg = getenv_ulong("pram", 10, CONFIG_PRAM);
 456        addr -= (reg << 10);    /* size is in kB */
 457        debug("Reserving %ldk for protected RAM at %08lx\n", reg, addr);
 458#endif /* CONFIG_PRAM */
 459
 460        /* round down to next 4 kB limit */
 461        addr &= ~(4096 - 1);
 462        debug("Top of RAM usable for U-Boot at: %08lx\n", addr);
 463
 464#ifdef CONFIG_LCD
 465#ifdef CONFIG_FB_ADDR
 466        gd->fb_base = CONFIG_FB_ADDR;
 467#else
 468        /* reserve memory for LCD display (always full pages) */
 469        addr = lcd_setmem(addr);
 470        gd->fb_base = addr;
 471#endif /* CONFIG_FB_ADDR */
 472#endif /* CONFIG_LCD */
 473
 474#if defined(CONFIG_VIDEO) && defined(CONFIG_8xx)
 475        /* reserve memory for video display (always full pages) */
 476        addr = video_setmem(addr);
 477        gd->fb_base = addr;
 478#endif /* CONFIG_VIDEO  */
 479
 480        /*
 481         * reserve memory for U-Boot code, data & bss
 482         * round down to next 4 kB limit
 483         */
 484        addr -= len;
 485        addr &= ~(4096 - 1);
 486#ifdef CONFIG_E500
 487        /* round down to next 64 kB limit so that IVPR stays aligned */
 488        addr &= ~(65536 - 1);
 489#endif
 490
 491        debug("Reserving %ldk for U-Boot at: %08lx\n", len >> 10, addr);
 492
 493        /*
 494         * reserve memory for malloc() arena
 495         */
 496        addr_sp = addr - TOTAL_MALLOC_LEN;
 497        debug("Reserving %dk for malloc() at: %08lx\n",
 498              TOTAL_MALLOC_LEN >> 10, addr_sp);
 499
 500        /*
 501         * (permanently) allocate a Board Info struct
 502         * and a permanent copy of the "global" data
 503         */
 504        addr_sp -= sizeof(bd_t);
 505        bd = (bd_t *) addr_sp;
 506        memset(bd, 0, sizeof(bd_t));
 507        gd->bd = bd;
 508        debug("Reserving %zu Bytes for Board Info at: %08lx\n",
 509              sizeof(bd_t), addr_sp);
 510        addr_sp -= sizeof(gd_t);
 511        id = (gd_t *) addr_sp;
 512        debug("Reserving %zu Bytes for Global Data at: %08lx\n",
 513              sizeof(gd_t), addr_sp);
 514
 515        /*
 516         * Finally, we set up a new (bigger) stack.
 517         *
 518         * Leave some safety gap for SP, force alignment on 16 byte boundary
 519         * Clear initial stack frame
 520         */
 521        addr_sp -= 16;
 522        addr_sp &= ~0xF;
 523        s = (ulong *) addr_sp;
 524        *s-- = 0;
 525        *s-- = 0;
 526        addr_sp = (ulong) s;
 527        debug("Stack Pointer at: %08lx\n", addr_sp);
 528
 529        /*
 530         * Save local variables to board info struct
 531         */
 532
 533        bd->bi_memstart = CONFIG_SYS_SDRAM_BASE;        /* start of memory */
 534        bd->bi_memsize = gd->ram_size;                  /* size in bytes */
 535
 536#ifdef CONFIG_SYS_SRAM_BASE
 537        bd->bi_sramstart = CONFIG_SYS_SRAM_BASE;        /* start of SRAM */
 538        bd->bi_sramsize = CONFIG_SYS_SRAM_SIZE;         /* size  of SRAM */
 539#endif
 540
 541#if defined(CONFIG_8xx) || defined(CONFIG_8260) || defined(CONFIG_5xx) || \
 542    defined(CONFIG_E500) || defined(CONFIG_MPC86xx)
 543        bd->bi_immr_base = CONFIG_SYS_IMMR;     /* base  of IMMR register     */
 544#endif
 545#if defined(CONFIG_MPC5xxx)
 546        bd->bi_mbar_base = CONFIG_SYS_MBAR;     /* base of internal registers */
 547#endif
 548#if defined(CONFIG_MPC83xx)
 549        bd->bi_immrbar = CONFIG_SYS_IMMR;
 550#endif
 551#if defined(CONFIG_MPC8220)
 552        bd->bi_mbar_base = CONFIG_SYS_MBAR;     /* base of internal registers */
 553        bd->bi_inpfreq = gd->inp_clk;
 554        bd->bi_pcifreq = gd->pci_clk;
 555        bd->bi_vcofreq = gd->vco_clk;
 556        bd->bi_pevfreq = gd->pev_clk;
 557        bd->bi_flbfreq = gd->flb_clk;
 558
 559        /* store bootparam to sram (backward compatible), here? */
 560        {
 561                u32 *sram = (u32 *) CONFIG_SYS_SRAM_BASE;
 562
 563                *sram++ = gd->ram_size;
 564                *sram++ = gd->bus_clk;
 565                *sram++ = gd->inp_clk;
 566                *sram++ = gd->cpu_clk;
 567                *sram++ = gd->vco_clk;
 568                *sram++ = gd->flb_clk;
 569                *sram++ = 0xb8c3ba11;   /* boot signature */
 570        }
 571#endif
 572
 573        WATCHDOG_RESET();
 574        bd->bi_intfreq = gd->cpu_clk;   /* Internal Freq, in Hz */
 575        bd->bi_busfreq = gd->bus_clk;   /* Bus Freq,      in Hz */
 576#if defined(CONFIG_CPM2)
 577        bd->bi_cpmfreq = gd->cpm_clk;
 578        bd->bi_brgfreq = gd->brg_clk;
 579        bd->bi_sccfreq = gd->scc_clk;
 580        bd->bi_vco = gd->vco_out;
 581#endif /* CONFIG_CPM2 */
 582#if defined(CONFIG_MPC512X)
 583        bd->bi_ipsfreq = gd->ips_clk;
 584#endif /* CONFIG_MPC512X */
 585#if defined(CONFIG_MPC5xxx)
 586        bd->bi_ipbfreq = gd->ipb_clk;
 587        bd->bi_pcifreq = gd->pci_clk;
 588#endif /* CONFIG_MPC5xxx */
 589        bd->bi_baudrate = gd->baudrate; /* Console Baudrate     */
 590
 591#ifdef CONFIG_SYS_EXTBDINFO
 592        strncpy((char *) bd->bi_s_version, "1.2", sizeof(bd->bi_s_version));
 593        strncpy((char *) bd->bi_r_version, U_BOOT_VERSION,
 594                sizeof(bd->bi_r_version));
 595
 596        bd->bi_procfreq = gd->cpu_clk;  /* Processor Speed, In Hz */
 597        bd->bi_plb_busfreq = gd->bus_clk;
 598#if defined(CONFIG_405GP) || defined(CONFIG_405EP) || \
 599    defined(CONFIG_440EP) || defined(CONFIG_440GR) || \
 600    defined(CONFIG_440EPX) || defined(CONFIG_440GRX)
 601        bd->bi_pci_busfreq = get_PCI_freq();
 602        bd->bi_opbfreq = get_OPB_freq();
 603#elif defined(CONFIG_XILINX_405)
 604        bd->bi_pci_busfreq = get_PCI_freq();
 605#endif
 606#endif
 607
 608        debug("New Stack Pointer is: %08lx\n", addr_sp);
 609
 610        WATCHDOG_RESET();
 611
 612        gd->relocaddr = addr;   /* Store relocation addr, useful for debug */
 613
 614        memcpy(id, (void *) gd, sizeof(gd_t));
 615
 616        relocate_code(addr_sp, id, addr);
 617
 618        /* NOTREACHED - relocate_code() does not return */
 619}
 620
 621/*
 622 * This is the next part if the initialization sequence: we are now
 623 * running from RAM and have a "normal" C environment, i. e. global
 624 * data can be written, BSS has been cleared, the stack size in not
 625 * that critical any more, etc.
 626 */
 627void board_init_r(gd_t *id, ulong dest_addr)
 628{
 629        bd_t *bd;
 630        ulong malloc_start;
 631
 632#ifndef CONFIG_SYS_NO_FLASH
 633        ulong flash_size;
 634#endif
 635
 636        gd = id;                /* initialize RAM version of global data */
 637        bd = gd->bd;
 638
 639        gd->flags |= GD_FLG_RELOC;      /* tell others: relocation done */
 640
 641        /* The Malloc area is immediately below the monitor copy in DRAM */
 642        malloc_start = dest_addr - TOTAL_MALLOC_LEN;
 643
 644#if defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx)
 645        /*
 646         * The gd->cpu pointer is set to an address in flash before relocation.
 647         * We need to update it to point to the same CPU entry in RAM.
 648         */
 649        gd->cpu += dest_addr - CONFIG_SYS_MONITOR_BASE;
 650#endif
 651
 652#ifdef CONFIG_SYS_EXTRA_ENV_RELOC
 653        /*
 654         * Some systems need to relocate the env_addr pointer early because the
 655         * location it points to will get invalidated before env_relocate is
 656         * called.  One example is on systems that might use a L2 or L3 cache
 657         * in SRAM mode and initialize that cache from SRAM mode back to being
 658         * a cache in cpu_init_r.
 659         */
 660        gd->env_addr += dest_addr - CONFIG_SYS_MONITOR_BASE;
 661#endif
 662
 663#ifdef CONFIG_SERIAL_MULTI
 664        serial_initialize();
 665#endif
 666
 667        debug("Now running in RAM - U-Boot at: %08lx\n", dest_addr);
 668
 669        WATCHDOG_RESET();
 670
 671        /*
 672         * Setup trap handlers
 673         */
 674        trap_init(dest_addr);
 675
 676#ifdef CONFIG_ADDR_MAP
 677        init_addr_map();
 678#endif
 679
 680#if defined(CONFIG_BOARD_EARLY_INIT_R)
 681        board_early_init_r();
 682#endif
 683
 684        monitor_flash_len = (ulong)&__init_end - dest_addr;
 685
 686        WATCHDOG_RESET();
 687
 688#ifdef CONFIG_LOGBUFFER
 689        logbuff_init_ptrs();
 690#endif
 691#ifdef CONFIG_POST
 692        post_output_backlog();
 693#endif
 694
 695        WATCHDOG_RESET();
 696
 697#if defined(CONFIG_SYS_DELAYED_ICACHE)
 698        icache_enable();        /* it's time to enable the instruction cache */
 699#endif
 700
 701#if defined(CONFIG_SYS_INIT_RAM_LOCK) && defined(CONFIG_E500)
 702        unlock_ram_in_cache();  /* it's time to unlock D-cache in e500 */
 703#endif
 704
 705#if defined(CONFIG_PCI) && defined(CONFIG_SYS_EARLY_PCI_INIT)
 706        /*
 707         * Do early PCI configuration _before_ the flash gets initialised,
 708         * because PCU ressources are crucial for flash access on some boards.
 709         */
 710        pci_init();
 711#endif
 712#if defined(CONFIG_WINBOND_83C553)
 713        /*
 714         * Initialise the ISA bridge
 715         */
 716        initialise_w83c553f();
 717#endif
 718
 719        asm("sync ; isync");
 720
 721        mem_malloc_init(malloc_start, TOTAL_MALLOC_LEN);
 722
 723#if !defined(CONFIG_SYS_NO_FLASH)
 724        puts("Flash: ");
 725
 726        if (board_flash_wp_on()) {
 727                printf("Uninitialized - Write Protect On\n");
 728                /* Since WP is on, we can't find real size.  Set to 0 */
 729                flash_size = 0;
 730        } else if ((flash_size = flash_init()) > 0) {
 731#ifdef CONFIG_SYS_FLASH_CHECKSUM
 732                char *s;
 733
 734                print_size(flash_size, "");
 735                /*
 736                 * Compute and print flash CRC if flashchecksum is set to 'y'
 737                 *
 738                 * NOTE: Maybe we should add some WATCHDOG_RESET()? XXX
 739                 */
 740                s = getenv("flashchecksum");
 741                if (s && (*s == 'y')) {
 742                        printf("  CRC: %08X",
 743                               crc32(0,
 744                                     (const unsigned char *)
 745                                     CONFIG_SYS_FLASH_BASE, flash_size)
 746                                );
 747                }
 748                putc('\n');
 749#else  /* !CONFIG_SYS_FLASH_CHECKSUM */
 750                print_size(flash_size, "\n");
 751#endif /* CONFIG_SYS_FLASH_CHECKSUM */
 752        } else {
 753                puts(failed);
 754                hang();
 755        }
 756
 757        /* update start of FLASH memory    */
 758        bd->bi_flashstart = CONFIG_SYS_FLASH_BASE;
 759        /* size of FLASH memory (final value) */
 760        bd->bi_flashsize = flash_size;
 761
 762#if defined(CONFIG_SYS_UPDATE_FLASH_SIZE)
 763        /* Make a update of the Memctrl. */
 764        update_flash_size(flash_size);
 765#endif
 766
 767
 768#if defined(CONFIG_OXC) || defined(CONFIG_RMU)
 769        /* flash mapped at end of memory map */
 770        bd->bi_flashoffset = CONFIG_SYS_TEXT_BASE + flash_size;
 771#elif CONFIG_SYS_MONITOR_BASE == CONFIG_SYS_FLASH_BASE
 772        bd->bi_flashoffset = monitor_flash_len; /* reserved area for monitor */
 773#endif
 774#endif /* !CONFIG_SYS_NO_FLASH */
 775
 776        WATCHDOG_RESET();
 777
 778        /* initialize higher level parts of CPU like time base and timers */
 779        cpu_init_r();
 780
 781        WATCHDOG_RESET();
 782
 783#ifdef CONFIG_SPI
 784#if !defined(CONFIG_ENV_IS_IN_EEPROM)
 785        spi_init_f();
 786#endif
 787        spi_init_r();
 788#endif
 789
 790#if defined(CONFIG_CMD_NAND)
 791        WATCHDOG_RESET();
 792        puts("NAND:  ");
 793        nand_init();            /* go init the NAND */
 794#endif
 795
 796#ifdef CONFIG_GENERIC_MMC
 797/*
 798 * MMC initialization is called before relocating env.
 799 * Thus It is required that operations like pin multiplexer
 800 * be put in board_init.
 801 */
 802        WATCHDOG_RESET();
 803        puts("MMC:  ");
 804        mmc_initialize(bd);
 805#endif
 806
 807        /* relocate environment function pointers etc. */
 808        env_relocate();
 809
 810        /*
 811         * after non-volatile devices & environment is setup and cpu code have
 812         * another round to deal with any initialization that might require
 813         * full access to the environment or loading of some image (firmware)
 814         * from a non-volatile device
 815         */
 816        cpu_secondary_init_r();
 817
 818        /*
 819         * Fill in missing fields of bd_info.
 820         * We do this here, where we have "normal" access to the
 821         * environment; we used to do this still running from ROM,
 822         * where had to use getenv_f(), which can be pretty slow when
 823         * the environment is in EEPROM.
 824         */
 825
 826#if defined(CONFIG_SYS_EXTBDINFO)
 827#if defined(CONFIG_405GP) || defined(CONFIG_405EP)
 828#if defined(CONFIG_I2CFAST)
 829        /*
 830         * set bi_iic_fast for linux taking environment variable
 831         * "i2cfast" into account
 832         */
 833        {
 834                char *s = getenv("i2cfast");
 835
 836                if (s && ((*s == 'y') || (*s == 'Y'))) {
 837                        bd->bi_iic_fast[0] = 1;
 838                        bd->bi_iic_fast[1] = 1;
 839                }
 840        }
 841#endif /* CONFIG_I2CFAST */
 842#endif /* CONFIG_405GP, CONFIG_405EP */
 843#endif /* CONFIG_SYS_EXTBDINFO */
 844
 845#if defined(CONFIG_SC3)
 846        sc3_read_eeprom();
 847#endif
 848
 849#if defined(CONFIG_ID_EEPROM) || defined(CONFIG_SYS_I2C_MAC_OFFSET)
 850        mac_read_from_eeprom();
 851#endif
 852
 853#ifdef  CONFIG_HERMES
 854        if ((gd->board_type >> 16) == 2)
 855                bd->bi_ethspeed = gd->board_type & 0xFFFF;
 856        else
 857                bd->bi_ethspeed = 0xFFFF;
 858#endif
 859
 860#ifdef CONFIG_CMD_NET
 861        /* kept around for legacy kernels only ... ignore the next section */
 862        eth_getenv_enetaddr("ethaddr", bd->bi_enetaddr);
 863#ifdef CONFIG_HAS_ETH1
 864        eth_getenv_enetaddr("eth1addr", bd->bi_enet1addr);
 865#endif
 866#ifdef CONFIG_HAS_ETH2
 867        eth_getenv_enetaddr("eth2addr", bd->bi_enet2addr);
 868#endif
 869#ifdef CONFIG_HAS_ETH3
 870        eth_getenv_enetaddr("eth3addr", bd->bi_enet3addr);
 871#endif
 872#ifdef CONFIG_HAS_ETH4
 873        eth_getenv_enetaddr("eth4addr", bd->bi_enet4addr);
 874#endif
 875#ifdef CONFIG_HAS_ETH5
 876        eth_getenv_enetaddr("eth5addr", bd->bi_enet5addr);
 877#endif
 878#endif /* CONFIG_CMD_NET */
 879
 880        /* IP Address */
 881        bd->bi_ip_addr = getenv_IPaddr("ipaddr");
 882
 883        WATCHDOG_RESET();
 884
 885#if defined(CONFIG_PCI) && !defined(CONFIG_SYS_EARLY_PCI_INIT)
 886        /*
 887         * Do pci configuration
 888         */
 889        pci_init();
 890#endif
 891
 892/** leave this here (after malloc(), environment and PCI are working) **/
 893        /* Initialize stdio devices */
 894        stdio_init();
 895
 896        /* Initialize the jump table for applications */
 897        jumptable_init();
 898
 899#if defined(CONFIG_API)
 900        /* Initialize API */
 901        api_init();
 902#endif
 903
 904        /* Initialize the console (after the relocation and devices init) */
 905        console_init_r();
 906
 907#if defined(CONFIG_MISC_INIT_R)
 908        /* miscellaneous platform dependent initialisations */
 909        misc_init_r();
 910#endif
 911
 912#ifdef  CONFIG_HERMES
 913        if (bd->bi_ethspeed != 0xFFFF)
 914                hermes_start_lxt980((int) bd->bi_ethspeed);
 915#endif
 916
 917#if defined(CONFIG_CMD_KGDB)
 918        WATCHDOG_RESET();
 919        puts("KGDB:  ");
 920        kgdb_init();
 921#endif
 922
 923        debug("U-Boot relocated to %08lx\n", dest_addr);
 924
 925        /*
 926         * Enable Interrupts
 927         */
 928        interrupt_init();
 929
 930#if defined(CONFIG_STATUS_LED) && defined(STATUS_LED_BOOT)
 931        status_led_set(STATUS_LED_BOOT, STATUS_LED_BLINKING);
 932#endif
 933
 934        udelay(20);
 935
 936        /* Initialize from environment */
 937        load_addr = getenv_ulong("loadaddr", 16, load_addr);
 938#if defined(CONFIG_CMD_NET)
 939        {
 940                char *s = getenv("bootfile");
 941
 942                if (s != NULL)
 943                        copy_filename(BootFile, s, sizeof(BootFile));
 944        }
 945#endif
 946
 947        WATCHDOG_RESET();
 948
 949#if defined(CONFIG_CMD_SCSI)
 950        WATCHDOG_RESET();
 951        puts("SCSI:  ");
 952        scsi_init();
 953#endif
 954
 955#if defined(CONFIG_CMD_DOC)
 956        WATCHDOG_RESET();
 957        puts("DOC:   ");
 958        doc_init();
 959#endif
 960
 961#ifdef CONFIG_BITBANGMII
 962        bb_miiphy_init();
 963#endif
 964#if defined(CONFIG_CMD_NET)
 965        WATCHDOG_RESET();
 966        puts("Net:   ");
 967        eth_initialize(bd);
 968#endif
 969
 970#if defined(CONFIG_CMD_NET) && defined(CONFIG_RESET_PHY_R)
 971        WATCHDOG_RESET();
 972        debug("Reset Ethernet PHY\n");
 973        reset_phy();
 974#endif
 975
 976#ifdef CONFIG_POST
 977        post_run(NULL, POST_RAM | post_bootmode_get(0));
 978#endif
 979
 980#if defined(CONFIG_CMD_PCMCIA) \
 981    && !defined(CONFIG_CMD_IDE)
 982        WATCHDOG_RESET();
 983        puts("PCMCIA:");
 984        pcmcia_init();
 985#endif
 986
 987#if defined(CONFIG_CMD_IDE)
 988        WATCHDOG_RESET();
 989#ifdef  CONFIG_IDE_8xx_PCCARD
 990        puts("PCMCIA:");
 991#else
 992        puts("IDE:   ");
 993#endif
 994#if defined(CONFIG_START_IDE)
 995        if (board_start_ide())
 996                ide_init();
 997#else
 998        ide_init();
 999#endif
1000#endif

1001
1002#ifdef CONFIG_LAST_STAGE_INIT
1003        WATCHDOG_RESET();
1004        /*
1005         * Some parts can be only initialized if all others (like
1006         * Interrupts) are up and running (i.e. the PC-style ISA
1007         * keyboard).
1008         */
1009        last_stage_init();
1010#endif
1011
1012#if defined(CONFIG_CMD_BEDBUG)
1013        WATCHDOG_RESET();
1014        bedbug_init();
1015#endif
1016
1017#if defined(CONFIG_PRAM) || defined(CONFIG_LOGBUFFER)
1018        /*
1019         * Export available size of memory for Linux,
1020         * taking into account the protected RAM at top of memory
1021         */
1022        {
1023                ulong pram = 0;
1024                char memsz[32];
1025
1026#ifdef CONFIG_PRAM
1027                pram = getenv_ulong("pram", 10, CONFIG_PRAM);
1028#endif
1029#ifdef CONFIG_LOGBUFFER
1030#ifndef CONFIG_ALT_LB_ADDR
1031                /* Also take the logbuffer into account (pram is in kB) */
1032                pram += (LOGBUFF_LEN + LOGBUFF_OVERHEAD) / 1024;
1033#endif
1034#endif
1035                sprintf(memsz, "%ldk", (bd->bi_memsize / 1024) - pram);
1036                setenv("mem", memsz);
1037        }
1038#endif
1039
1040#ifdef CONFIG_PS2KBD
1041        puts("PS/2:  ");
1042        kbd_init();
1043#endif
1044
1045#ifdef CONFIG_MODEM_SUPPORT
1046        {
1047                extern int do_mdm_init;
1048
1049                do_mdm_init = gd->do_mdm_init;
1050        }
1051#endif
1052
1053        /* Initialization complete - start the monitor */
1054
1055        /* main_loop() can return to retry autoboot, if so just run it again. */
1056        for (;;) {
1057                WATCHDOG_RESET();
1058                main_loop();
1059        }
1060
1061        /* NOTREACHED - no way out of command loop except booting */
1062}
1063
1064void hang(void)
1065{
1066        puts("### ERROR ### Please RESET the board ###\n");
1067        bootstage_error(BOOTSTAGE_ID_NEED_RESET);
1068        for (;;)
1069                ;
1070}
1071
1072
1073#if 0   /* We could use plain global data, but the resulting code is bigger */
1074/*
1075 * Pointer to initial global data area
1076 *
1077 * Here we initialize it.
1078 */
1079#undef  XTRN_DECLARE_GLOBAL_DATA_PTR
1080#define XTRN_DECLARE_GLOBAL_DATA_PTR    /* empty = allocate here */
1081DECLARE_GLOBAL_DATA_PTR =
1082        (gd_t *) (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_GBL_DATA_OFFSET);
1083#endif /* 0 */
1084
1085/************************************************************************/
1086