LXR uboot/board/davinci/da8xxevm/da830evm.c

   1/*
   2 * Copyright (C) 2009 Nick Thompson, GE Fanuc, Ltd. <nick.thompson@gefanuc.com>
   3 *
   4 * Base on code from TI. Original Notices follow:
   5 *
   6 * (C) Copyright 2008, Texas Instruments, Inc. http://www.ti.com/
   7 *
   8 * Modified for DA8xx EVM.
   9 *
  10 * Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net>
  11 *
  12 * Parts are shamelessly stolen from various TI sources, original copyright
  13 * follows:
  14 * -----------------------------------------------------------------
  15 *
  16 * Copyright (C) 2004 Texas Instruments.
  17 *
  18 * ----------------------------------------------------------------------------
  19 * This program is free software; you can redistribute it and/or modify
  20 * it under the terms of the GNU General Public License as published by
  21 * the Free Software Foundation; either version 2 of the License, or
  22 * (at your option) any later version.
  23 *
  24 * This program is distributed in the hope that it will be useful,
  25 * but WITHOUT ANY WARRANTY; without even the implied warranty of
  26 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  27 * GNU General Public License for more details.
  28 *
  29 * You should have received a copy of the GNU General Public License
  30 * along with this program; if not, write to the Free Software
  31 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  32 * ----------------------------------------------------------------------------
  33 */
  34
  35#include <common.h>
  36#include <i2c.h>
  37#include <net.h>
  38#include <netdev.h>
  39#include <asm/arch/hardware.h>
  40#include <asm/arch/emif_defs.h>
  41#include <asm/arch/emac_defs.h>
  42#include <asm/io.h>
  43#include <nand.h>
  44#include <asm/arch/nand_defs.h>
  45#include <asm/arch/davinci_misc.h>
  46
  47DECLARE_GLOBAL_DATA_PTR;
  48
  49/* SPI0 pin muxer settings */
  50static const struct pinmux_config spi0_pins[] = {
  51        { pinmux(7), 1, 3 },
  52        { pinmux(7), 1, 4 },
  53        { pinmux(7), 1, 5 },
  54        { pinmux(7), 1, 6 },
  55        { pinmux(7), 1, 7 }
  56};
  57
  58/* EMIF-A bus pins for 8-bit NAND support on CS3 */
  59static const struct pinmux_config emifa_nand_pins[] = {
  60        { pinmux(13), 1, 6 },
  61        { pinmux(13), 1, 7 },
  62        { pinmux(14), 1, 0 },
  63        { pinmux(14), 1, 1 },
  64        { pinmux(14), 1, 2 },
  65        { pinmux(14), 1, 3 },
  66        { pinmux(14), 1, 4 },
  67        { pinmux(14), 1, 5 },
  68        { pinmux(15), 1, 7 },
  69        { pinmux(16), 1, 0 },
  70        { pinmux(18), 1, 1 },
  71        { pinmux(18), 1, 4 },
  72        { pinmux(18), 1, 5 },
  73};
  74
  75/* EMAC PHY interface pins */
  76static const struct pinmux_config emac_pins[] = {
  77        { pinmux(9), 0, 5 },
  78        { pinmux(10), 2, 1 },
  79        { pinmux(10), 2, 2 },
  80        { pinmux(10), 2, 3 },
  81        { pinmux(10), 2, 4 },
  82        { pinmux(10), 2, 5 },
  83        { pinmux(10), 2, 6 },
  84        { pinmux(10), 2, 7 },
  85        { pinmux(11), 2, 0 },
  86        { pinmux(11), 2, 1 },
  87};
  88
  89/* UART pin muxer settings */
  90static const struct pinmux_config uart_pins[] = {
  91        { pinmux(8), 2, 7 },
  92        { pinmux(9), 2, 0 }
  93};
  94
  95/* I2C pin muxer settings */
  96static const struct pinmux_config i2c_pins[] = {
  97        { pinmux(8), 2, 3 },
  98        { pinmux(8), 2, 4 }
  99};
 100
 101#ifdef CONFIG_USE_NAND
 102/* NAND pin muxer settings */
 103const struct pinmux_config aemif_pins[] = {
 104        { pinmux(13), 1, 6 },
 105        { pinmux(13), 1, 7 },
 106        { pinmux(14), 1, 0 },
 107        { pinmux(14), 1, 1 },
 108        { pinmux(14), 1, 2 },
 109        { pinmux(14), 1, 3 },
 110        { pinmux(14), 1, 4 },
 111        { pinmux(14), 1, 5 },
 112        { pinmux(14), 1, 6 },
 113        { pinmux(14), 1, 7 },
 114        { pinmux(15), 1, 0 },
 115        { pinmux(15), 1, 1 },
 116        { pinmux(15), 1, 2 },
 117        { pinmux(15), 1, 3 },
 118        { pinmux(15), 1, 4 },
 119        { pinmux(15), 1, 5 },
 120        { pinmux(15), 1, 6 },
 121        { pinmux(15), 1, 7 },
 122        { pinmux(16), 1, 0 },
 123        { pinmux(16), 1, 1 },
 124        { pinmux(16), 1, 2 },
 125        { pinmux(16), 1, 3 },
 126        { pinmux(16), 1, 4 },
 127        { pinmux(16), 1, 5 },
 128        { pinmux(16), 1, 6 },
 129        { pinmux(16), 1, 7 },
 130        { pinmux(17), 1, 0 },
 131        { pinmux(17), 1, 1 },
 132        { pinmux(17), 1, 2 },
 133        { pinmux(17), 1, 3 },
 134        { pinmux(17), 1, 4 },
 135        { pinmux(17), 1, 5 },
 136        { pinmux(17), 1, 6 },
 137        { pinmux(17), 1, 7 },
 138        { pinmux(18), 1, 0 },
 139        { pinmux(18), 1, 1 },
 140        { pinmux(18), 1, 2 },
 141        { pinmux(18), 1, 3 },
 142        { pinmux(18), 1, 4 },
 143        { pinmux(18), 1, 5 },
 144        { pinmux(18), 1, 6 },
 145        { pinmux(18), 1, 7 },
 146        { pinmux(10), 1, 0 }
 147};
 148#endif
 149
 150
 151/* USB0_DRVVBUS pin muxer settings */
 152static const struct pinmux_config usb_pins[] = {
 153        { pinmux(9), 1, 1 }
 154};
 155
 156static const struct pinmux_resource pinmuxes[] = {
 157#ifdef CONFIG_SPI_FLASH
 158        PINMUX_ITEM(spi0_pins),
 159#endif
 160        PINMUX_ITEM(uart_pins),
 161        PINMUX_ITEM(i2c_pins),
 162#ifdef CONFIG_USB_DA8XX
 163        PINMUX_ITEM(usb_pins),
 164#endif
 165#ifdef CONFIG_USE_NAND
 166        PINMUX_ITEM(emifa_nand_pins),
 167        PINMUX_ITEM(aemif_pins),
 168#endif
 169#if defined(CONFIG_DRIVER_TI_EMAC)
 170        PINMUX_ITEM(emac_pins),
 171#endif
 172};
 173
 174static const struct lpsc_resource lpsc[] = {
 175        { DAVINCI_LPSC_AEMIF }, /* NAND, NOR */
 176        { DAVINCI_LPSC_SPI0 },  /* Serial Flash */
 177        { DAVINCI_LPSC_EMAC },  /* image download */
 178        { DAVINCI_LPSC_UART2 }, /* console */
 179        { DAVINCI_LPSC_GPIO },
 180};
 181
 182int board_init(void)
 183{
 184#ifndef CONFIG_USE_IRQ
 185        irq_init();
 186#endif
 187
 188#ifdef CONFIG_NAND_DAVINCI
 189        /* EMIFA 100MHz clock select */
 190        writel(readl(&davinci_syscfg_regs->cfgchip3) & ~2,
 191               &davinci_syscfg_regs->cfgchip3);
 192        /* NAND CS setup */
 193        writel((DAVINCI_ABCR_WSETUP(0) |
 194                DAVINCI_ABCR_WSTROBE(2) |
 195                DAVINCI_ABCR_WHOLD(0) |
 196                DAVINCI_ABCR_RSETUP(0) |
 197                DAVINCI_ABCR_RSTROBE(2) |
 198                DAVINCI_ABCR_RHOLD(0) |
 199                DAVINCI_ABCR_TA(2) |
 200                DAVINCI_ABCR_ASIZE_8BIT),
 201               &davinci_emif_regs->ab2cr);
 202#endif
 203
 204        /* arch number of the board */
 205        gd->bd->bi_arch_number = MACH_TYPE_DAVINCI_DA830_EVM;
 206
 207        /* address of boot parameters */
 208        gd->bd->bi_boot_params = LINUX_BOOT_PARAM_ADDR;
 209
 210        /*
 211         * Power on required peripherals
 212         * ARM does not have access by default to PSC0 and PSC1
 213         * assuming here that the DSP bootloader has set the IOPU
 214         * such that PSC access is available to ARM
 215         */
 216        if (da8xx_configure_lpsc_items(lpsc, ARRAY_SIZE(lpsc)))
 217                return 1;
 218
 219        /* setup the SUSPSRC for ARM to control emulation suspend */
 220        writel(readl(&davinci_syscfg_regs->suspsrc) &
 221               ~(DAVINCI_SYSCFG_SUSPSRC_EMAC | DAVINCI_SYSCFG_SUSPSRC_I2C |
 222                 DAVINCI_SYSCFG_SUSPSRC_SPI0 | DAVINCI_SYSCFG_SUSPSRC_TIMER0 |
 223                 DAVINCI_SYSCFG_SUSPSRC_UART2),
 224               &davinci_syscfg_regs->suspsrc);
 225
 226        /* configure pinmux settings */
 227        if (davinci_configure_pin_mux_items(pinmuxes, ARRAY_SIZE(pinmuxes)))
 228                return 1;
 229
 230        /* enable the console UART */
 231        writel((DAVINCI_UART_PWREMU_MGMT_FREE | DAVINCI_UART_PWREMU_MGMT_URRST |
 232                DAVINCI_UART_PWREMU_MGMT_UTRST),
 233               &davinci_uart2_ctrl_regs->pwremu_mgmt);
 234
 235        return(0);
 236}
 237
 238
 239#ifdef CONFIG_NAND_DAVINCI
 240int board_nand_init(struct nand_chip *nand)
 241{
 242        davinci_nand_init(nand);
 243
 244        return 0;
 245}
 246#endif
 247
 248#if defined(CONFIG_DRIVER_TI_EMAC)
 249
 250#define PHY_SW_I2C_ADDR 0x5f /* Address of PHY on i2c bus */
 251
 252/*
 253 * Initializes on-board ethernet controllers.
 254 */
 255int board_eth_init(bd_t *bis)
 256{
 257        u_int8_t mac_addr[6];
 258        u_int8_t switch_start_cmd[2] = { 0x01, 0x23 };
 259        struct eth_device *dev;
 260
 261        /* Read Ethernet MAC address from EEPROM */
 262        if (dvevm_read_mac_address(mac_addr))
 263                /* set address env if not already set */
 264                davinci_sync_env_enetaddr(mac_addr);
 265
 266        /* read the address back from env */
 267        if (!eth_getenv_enetaddr("ethaddr", mac_addr))
 268                return -1;
 269
 270        /* enable the Ethernet switch in the 3 port PHY */
 271        if (i2c_write(PHY_SW_I2C_ADDR, 0, 0,
 272                        switch_start_cmd, sizeof(switch_start_cmd))) {
 273                printf("Ethernet switch start failed!\n");
 274                return -1;
 275        }
 276
 277        /* finally, initialise the driver */
 278        if (!davinci_emac_initialize()) {
 279                printf("Error: Ethernet init failed!\n");
 280                return -1;
 281        }
 282
 283        dev = eth_get_dev();
 284
 285        /* provide the resulting addr to the driver */
 286        memcpy(dev->enetaddr, mac_addr, 6);
 287        dev->write_hwaddr(dev);
 288
 289        return 0;
 290}
 291#endif /* CONFIG_DRIVER_TI_EMAC */
 292