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25#include <common.h>
26#include <netdev.h>
27#include <asm/arch/clock.h>
28#include <asm/arch/imx-regs.h>
29#include <asm/arch/sys_proto.h>
30
31DECLARE_GLOBAL_DATA_PTR;
32
33int dram_init(void)
34{
35
36 gd->ram_size = get_ram_size((void *)PHYS_SDRAM_1,
37 PHYS_SDRAM_1_SIZE);
38 return 0;
39}
40
41int board_early_init_f(void)
42{
43
44 static const struct mxc_weimcs cs0 = {
45
46 CSCR_U(0, 0, 0, 0, 0, 0, 0, 0, 3, 15, 0, 0, 3),
47
48 CSCR_L(10, 0, 3, 3, 0, 1, 5, 0, 0, 0, 0, 1),
49
50 CSCR_A(0, 0, 2, 2, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0)
51 };
52
53
54 static const struct mxc_weimcs cs4 = {
55
56 CSCR_U(0, 0, 0, 0, 0, 0, 0, 0, 3, 28, 1, 7, 6),
57
58 CSCR_L(4, 4, 4, 10, 4, 0, 5, 4, 0, 0, 0, 1),
59
60 CSCR_A(4, 4, 4, 4, 0, 1, 4, 3, 0, 0, 0, 0, 1, 0)
61 };
62
63 mxc_setup_weimcs(0, &cs0);
64 mxc_setup_weimcs(4, &cs4);
65
66
67 mx31_gpio_mux(MUX_RXD1__UART1_RXD_MUX);
68 mx31_gpio_mux(MUX_TXD1__UART1_TXD_MUX);
69 mx31_gpio_mux(MUX_RTS1__UART1_RTS_B);
70 mx31_gpio_mux(MUX_CTS1__UART1_CTS_B);
71
72
73 mx31_gpio_mux(MUX_CSPI2_SS2__CSPI2_SS2_B);
74 mx31_gpio_mux(MUX_CSPI2_SCLK__CSPI2_CLK);
75 mx31_gpio_mux(MUX_CSPI2_SPI_RDY__CSPI2_DATAREADY_B);
76 mx31_gpio_mux(MUX_CSPI2_MOSI__CSPI2_MOSI);
77 mx31_gpio_mux(MUX_CSPI2_MISO__CSPI2_MISO);
78 mx31_gpio_mux(MUX_CSPI2_SS0__CSPI2_SS0_B);
79 mx31_gpio_mux(MUX_CSPI2_SS1__CSPI2_SS1_B);
80
81
82 __REG(CCM_CGR2) = __REG(CCM_CGR2) | (3 << 4);
83
84 return 0;
85}
86
87int board_init(void)
88{
89 gd->bd->bi_boot_params = (0x80000100);
90
91 return 0;
92}
93
94int checkboard(void)
95{
96 printf("Board: i.MX31 Litekit\n");
97 return 0;
98}
99
100int board_eth_init(bd_t *bis)
101{
102 int rc = 0;
103#ifdef CONFIG_SMC911X
104 rc = smc911x_initialize(0, CONFIG_SMC911X_BASE);
105#endif
106 return rc;
107}
108