uboot/board/micronas/vct/top.c
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   1/*
   2 * (C) Copyright 2008 Stefan Roese <sr@denx.de>, DENX Software Engineering
   3 *
   4 * Copyright (C) 2006 Micronas GmbH
   5 *
   6 * This program is free software; you can redistribute it and/or
   7 * modify it under the terms of the GNU General Public License as
   8 * published by the Free Software Foundation; either version 2 of
   9 * the License, or (at your option) any later version.
  10 *
  11 * This program is distributed in the hope that it will be useful,
  12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14 * GNU General Public License for more details.
  15 *
  16 * You should have received a copy of the GNU General Public License
  17 * along with this program; if not, write to the Free Software
  18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  19 * MA 02111-1307 USA
  20 */
  21
  22#include <common.h>
  23#include "vct.h"
  24
  25typedef union _TOP_PINMUX_t
  26{
  27        u32 reg;
  28        struct {
  29                u32 res         : 24;   /* reserved             */
  30                u32 drive       :  2;   /* Driver strength      */
  31                u32 slew        :  1;   /* Slew rate            */
  32                u32 strig       :  1;   /* Schmitt trigger input*/
  33                u32 pu_pd       :  2;   /* Pull up/ pull down   */
  34                u32 funsel      :  2;   /* Pin function         */
  35        } Bits;
  36} TOP_PINMUX_t;
  37
  38#if defined(CONFIG_VCT_PREMIUM) || defined(CONFIG_VCT_PLATINUM)
  39
  40static TOP_PINMUX_t top_read_pin(int pin)
  41{
  42        TOP_PINMUX_t reg;
  43
  44        switch (pin) {
  45        case 2:
  46        case 3:
  47        case 6:
  48        case 9:
  49                reg.reg = 0xdeadbeef;
  50                break;
  51        case 4:
  52                reg.reg = reg_read(FWSRAM_TOP_SCL_CFG(FWSRAM_BASE));
  53                break;
  54        case 5:
  55                reg.reg = reg_read(FWSRAM_TOP_SDA_CFG(FWSRAM_BASE));
  56                break;
  57        case 7:
  58                reg.reg = reg_read(FWSRAM_TOP_TDO_CFG(FWSRAM_BASE));
  59                break;
  60        case 8:
  61                reg.reg = reg_read(FWSRAM_TOP_GPIO2_0_CFG(FWSRAM_BASE));
  62                break;
  63        case 10:
  64        case 11:
  65        case 12:
  66        case 13:
  67        case 14:
  68        case 15:
  69        case 16:
  70                reg.reg = reg_read(FWSRAM_BASE + FWSRAM_TOP_GPIO2_1_CFG_OFFS +
  71                                   ((pin - 10) * 4));
  72                break;
  73        default:
  74                reg.reg = reg_read(TOP_BASE + (pin * 4));
  75                break;
  76        }
  77
  78        return reg;
  79}
  80
  81static void top_write_pin(int pin, TOP_PINMUX_t reg)
  82{
  83
  84        switch (pin) {
  85        case 4:
  86                reg_write(FWSRAM_TOP_SCL_CFG(FWSRAM_BASE), reg.reg);
  87                break;
  88        case 5:
  89                reg_write(FWSRAM_TOP_SDA_CFG(FWSRAM_BASE), reg.reg);
  90                break;
  91        case 7:
  92                reg_write(FWSRAM_TOP_TDO_CFG(FWSRAM_BASE), reg.reg);
  93                break;
  94        case 8:
  95                reg_write(FWSRAM_TOP_GPIO2_0_CFG(FWSRAM_BASE), reg.reg);
  96                break;
  97        case 10:
  98        case 11:
  99        case 12:
 100        case 13:
 101        case 14:
 102        case 15:
 103        case 16:
 104                reg_write(FWSRAM_BASE + FWSRAM_TOP_GPIO2_1_CFG_OFFS +
 105                          ((pin - 10) * 4), reg.reg);
 106                break;
 107        default:
 108                reg_write(TOP_BASE + (pin * 4), reg.reg);
 109                break;
 110        }
 111}
 112
 113int top_set_pin(int pin, int func)
 114{
 115        TOP_PINMUX_t reg;
 116
 117        /* check global range */
 118        if ((pin < 0) || (pin > 170) || (func < 0) || (func > 3))
 119                return -1;  /* pin number or function out of valid range */
 120
 121        /* check undefined values; */
 122        if ((pin == 2) || (pin == 3) || (pin == 6) || (pin == 9))
 123                return -1;  /* pin number out of valid range */
 124
 125        reg = top_read_pin(pin);
 126        reg.Bits.funsel = func;
 127        top_write_pin(pin, reg);
 128
 129        return 0;
 130}
 131
 132#endif
 133
 134#if defined(CONFIG_VCT_PLATINUMAVC)
 135
 136int top_set_pin(int pin, int func)
 137{
 138        TOP_PINMUX_t reg;
 139
 140        /* check global range */
 141        if ((pin < 0) || (pin > 158))
 142                return -1;      /* pin number or function out of valid range */
 143
 144        reg.reg = reg_read(TOP_BASE + (pin * 4));
 145        reg.Bits.funsel = func;
 146        reg_write(TOP_BASE + (pin * 4), reg.reg);
 147
 148        return 0;
 149}
 150
 151#endif
 152
 153void vct_pin_mux_initialize(void)
 154{
 155#if defined(CONFIG_VCT_PREMIUM) || defined(CONFIG_VCT_PLATINUM)
 156        top_set_pin(34, 01);    /* EBI_CS0      */
 157        top_set_pin(33, 01);    /* EBI_CS1      */
 158        top_set_pin(32, 01);    /* EBI_CS2      */
 159        top_set_pin(100, 02);   /* EBI_CS3      */
 160        top_set_pin(101, 02);   /* EBI_CS4      */
 161        top_set_pin(102, 02);   /* EBI_CS5      */
 162        top_set_pin(103, 02);   /* EBI_CS6      */
 163        top_set_pin(104, 02);   /* EBI_CS7      top_set_pin(104,03); EBI_GENIO3 */
 164        top_set_pin(35, 01);    /* EBI_ALE      */
 165        top_set_pin(36, 01);    /* EBI_ADDR15   */
 166        top_set_pin(37, 01);    /* EBI_ADDR14   top_set_pin(78,03); EBI_ADDR14 */
 167        top_set_pin(38, 01);    /* EBI_ADDR13   */
 168        top_set_pin(39, 01);    /* EBI_ADDR12   */
 169        top_set_pin(40, 01);    /* EBI_ADDR11   */
 170        top_set_pin(41, 01);    /* EBI_ADDR10   */
 171        top_set_pin(42, 01);    /* EBI_ADDR9    */
 172        top_set_pin(43, 01);    /* EBI_ADDR8    */
 173        top_set_pin(44, 01);    /* EBI_ADDR7    */
 174        top_set_pin(45, 01);    /* EBI_ADDR6    */
 175        top_set_pin(46, 01);    /* EBI_ADDR5    */
 176        top_set_pin(47, 01);    /* EBI_ADDR4    */
 177        top_set_pin(48, 01);    /* EBI_ADDR3    */
 178        top_set_pin(49, 01);    /* EBI_ADDR2    */
 179        top_set_pin(50, 01);    /* EBI_ADDR1    */
 180        top_set_pin(51, 01);    /* EBI_ADDR0    */
 181        top_set_pin(52, 01);    /* EBI_DIR      */
 182        top_set_pin(53, 01);    /* EBI_DAT15    top_set_pin(81,01); EBI_DAT15 */
 183        top_set_pin(54, 01);    /* EBI_DAT14    top_set_pin(82,01); EBI_DAT14 */
 184        top_set_pin(55, 01);    /* EBI_DAT13    top_set_pin(83,01); EBI_DAT13 */
 185        top_set_pin(56, 01);    /* EBI_DAT12    top_set_pin(84,01); EBI_DAT12 */
 186        top_set_pin(57, 01);    /* EBI_DAT11    top_set_pin(85,01); EBI_DAT11 */
 187        top_set_pin(58, 01);    /* EBI_DAT10    top_set_pin(86,01); EBI_DAT10 */
 188        top_set_pin(59, 01);    /* EBI_DAT9     top_set_pin(87,01); EBI_DAT9 */
 189        top_set_pin(60, 01);    /* EBI_DAT8     top_set_pin(88,01); EBI_DAT8 */
 190        top_set_pin(61, 01);    /* EBI_DAT7     */
 191        top_set_pin(62, 01);    /* EBI_DAT6     */
 192        top_set_pin(63, 01);    /* EBI_DAT5     */
 193        top_set_pin(64, 01);    /* EBI_DAT4     */
 194        top_set_pin(65, 01);    /* EBI_DAT3     */
 195        top_set_pin(66, 01);    /* EBI_DAT2     */
 196        top_set_pin(67, 01);    /* EBI_DAT1     */
 197        top_set_pin(68, 01);    /* EBI_DAT0     */
 198        top_set_pin(69, 01);    /* EBI_IORD     */
 199        top_set_pin(70, 01);    /* EBI_IOWR     */
 200        top_set_pin(71, 01);    /* EBI_WE       */
 201        top_set_pin(72, 01);    /* EBI_OE       */
 202        top_set_pin(73, 01);    /* EBI_IORDY    */
 203        top_set_pin(95, 02);    /* EBI_EBI_DMACK*/
 204        top_set_pin(112, 02);   /* EBI_IRQ0     */
 205        top_set_pin(111, 02);   /* EBI_IRQ1     top_set_pin(111,03); EBI_DMARQ */
 206        top_set_pin(107, 02);   /* EBI_IRQ2     */
 207        top_set_pin(108, 02);   /* EBI_IRQ3     */
 208        top_set_pin(30, 01);    /* EBI_GENIO1   top_set_pin(99,03); EBI_GENIO1 */
 209        top_set_pin(31, 01);    /* EBI_GENIO2   top_set_pin(98,03); EBI_GENIO2 */
 210        top_set_pin(105, 02);   /* EBI_GENIO3   top_set_pin(104,03); EBI_GENIO3 */
 211        top_set_pin(106, 02);   /* EBI_GENIO4   top_set_pin(144,02); EBI_GENIO4 */
 212        top_set_pin(109, 02);   /* EBI_GENIO5   top_set_pin(142,02); EBI_GENIO5 */
 213        top_set_pin(110, 02);   /* EBI_BURST_CLK        */
 214#endif
 215
 216#if defined(CONFIG_VCT_PLATINUMAVC)
 217        top_set_pin(19, 01);    /* EBI_CS0      */
 218        top_set_pin(18, 01);    /* EBI_CS1      */
 219        top_set_pin(17, 01);    /* EBI_CS2      */
 220        top_set_pin(92, 02);    /* EBI_CS3      */
 221        top_set_pin(93, 02);    /* EBI_CS4      */
 222        top_set_pin(95, 02);    /* EBI_CS6      */
 223        top_set_pin(96, 02);    /* EBI_CS7      top_set_pin(104,03); EBI_GENIO3 */
 224        top_set_pin(20, 01);    /* EBI_ALE      */
 225        top_set_pin(21, 01);    /* EBI_ADDR15   */
 226        top_set_pin(22, 01);    /* EBI_ADDR14   top_set_pin(78,03); EBI_ADDR14 */
 227        top_set_pin(23, 01);    /* EBI_ADDR13   */
 228        top_set_pin(24, 01);    /* EBI_ADDR12   */
 229        top_set_pin(25, 01);    /* EBI_ADDR11   */
 230        top_set_pin(26, 01);    /* EBI_ADDR10   */
 231        top_set_pin(27, 01);    /* EBI_ADDR9    */
 232        top_set_pin(28, 01);    /* EBI_ADDR8    */
 233        top_set_pin(29, 01);    /* EBI_ADDR7    */
 234        top_set_pin(30, 01);    /* EBI_ADDR6    */
 235        top_set_pin(31, 01);    /* EBI_ADDR5    */
 236        top_set_pin(32, 01);    /* EBI_ADDR4    */
 237        top_set_pin(33, 01);    /* EBI_ADDR3    */
 238        top_set_pin(34, 01);    /* EBI_ADDR2    */
 239        top_set_pin(35, 01);    /* EBI_ADDR1    */
 240        top_set_pin(36, 01);    /* EBI_ADDR0    */
 241        top_set_pin(37, 01);    /* EBI_DIR      */
 242        top_set_pin(38, 01);    /* EBI_DAT15    top_set_pin(81,01); EBI_DAT15 */
 243        top_set_pin(39, 01);    /* EBI_DAT14    top_set_pin(82,01); EBI_DAT14 */
 244        top_set_pin(40, 01);    /* EBI_DAT13    top_set_pin(83,01); EBI_DAT13 */
 245        top_set_pin(41, 01);    /* EBI_DAT12    top_set_pin(84,01); EBI_DAT12 */
 246        top_set_pin(42, 01);    /* EBI_DAT11    top_set_pin(85,01); EBI_DAT11 */
 247        top_set_pin(43, 01);    /* EBI_DAT10    top_set_pin(86,01); EBI_DAT10 */
 248        top_set_pin(44, 01);    /* EBI_DAT9     top_set_pin(87,01); EBI_DAT9 */
 249        top_set_pin(45, 01);    /* EBI_DAT8     top_set_pin(88,01); EBI_DAT8 */
 250        top_set_pin(46, 01);    /* EBI_DAT7     */
 251        top_set_pin(47, 01);    /* EBI_DAT6     */
 252        top_set_pin(48, 01);    /* EBI_DAT5     */
 253        top_set_pin(49, 01);    /* EBI_DAT4     */
 254        top_set_pin(50, 01);    /* EBI_DAT3     */
 255        top_set_pin(51, 01);    /* EBI_DAT2     */
 256        top_set_pin(52, 01);    /* EBI_DAT1     */
 257        top_set_pin(53, 01);    /* EBI_DAT0     */
 258        top_set_pin(54, 01);    /* EBI_IORD     */
 259        top_set_pin(55, 01);    /* EBI_IOWR     */
 260        top_set_pin(56, 01);    /* EBI_WE       */
 261        top_set_pin(57, 01);    /* EBI_OE       */
 262        top_set_pin(58, 01);    /* EBI_IORDY    */
 263        top_set_pin(87, 02);    /* EBI_EBI_DMACK*/
 264        top_set_pin(106, 02);   /* EBI_IRQ0     */
 265        top_set_pin(105, 02);   /* EBI_IRQ1     top_set_pin(111,03); EBI_DMARQ */
 266        top_set_pin(101, 02);   /* EBI_IRQ2     */
 267        top_set_pin(102, 02);   /* EBI_IRQ3     */
 268        top_set_pin(15, 01);    /* EBI_GENIO1   top_set_pin(99,03); EBI_GENIO1 */
 269        top_set_pin(16, 01);    /* EBI_GENIO2   top_set_pin(98,03); EBI_GENIO2 */
 270        top_set_pin(99, 02);    /* EBI_GENIO3   top_set_pin(104,03); EBI_GENIO3 */
 271        top_set_pin(100, 02);   /* EBI_GENIO4   top_set_pin(144,02); EBI_GENIO4 */
 272        top_set_pin(103, 02);   /* EBI_GENIO5   top_set_pin(142,02); EBI_GENIO5 */
 273        top_set_pin(104, 02);   /* EBI_BURST_CLK        */
 274#endif
 275
 276        /* I2C: Configure I2C-2 as GPIO to enable soft-i2c */
 277        top_set_pin(0, 2);      /* SCL2 on GPIO 11 */
 278        top_set_pin(1, 2);      /* SDA2 on GPIO 10 */
 279
 280        /* UART pins */
 281#if defined(CONFIG_VCT_PREMIUM) || defined(CONFIG_VCT_PLATINUM)
 282        top_set_pin(141, 1);
 283        top_set_pin(143, 1);
 284#endif
 285#if defined(CONFIG_VCT_PLATINUMAVC)
 286        top_set_pin(107, 1);
 287        top_set_pin(109, 1);
 288#endif
 289}
 290
Hosted by Missing Link Electronics. The original LXR software by the LXR community, this experimental version by lxr@linux.no.