uboot/drivers/mtd/cfi_flash.c
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   1/*
   2 * (C) Copyright 2002-2004
   3 * Brad Kemp, Seranoa Networks, Brad.Kemp@seranoa.com
   4 *
   5 * Copyright (C) 2003 Arabella Software Ltd.
   6 * Yuli Barcohen <yuli@arabellasw.com>
   7 *
   8 * Copyright (C) 2004
   9 * Ed Okerson
  10 *
  11 * Copyright (C) 2006
  12 * Tolunay Orkun <listmember@orkun.us>
  13 *
  14 * See file CREDITS for list of people who contributed to this
  15 * project.
  16 *
  17 * This program is free software; you can redistribute it and/or
  18 * modify it under the terms of the GNU General Public License as
  19 * published by the Free Software Foundation; either version 2 of
  20 * the License, or (at your option) any later version.
  21 *
  22 * This program is distributed in the hope that it will be useful,
  23 * but WITHOUT ANY WARRANTY; without even the implied warranty of
  24 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  25 * GNU General Public License for more details.
  26 *
  27 * You should have received a copy of the GNU General Public License
  28 * along with this program; if not, write to the Free Software
  29 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  30 * MA 02111-1307 USA
  31 *
  32 */
  33
  34/* The DEBUG define must be before common to enable debugging */
  35/* #define DEBUG        */
  36
  37#include <common.h>
  38#include <asm/processor.h>
  39#include <asm/io.h>
  40#include <asm/byteorder.h>
  41#include <environment.h>
  42#include <mtd/cfi_flash.h>
  43#include <watchdog.h>
  44
  45/*
  46 * This file implements a Common Flash Interface (CFI) driver for
  47 * U-Boot.
  48 *
  49 * The width of the port and the width of the chips are determined at
  50 * initialization.  These widths are used to calculate the address for
  51 * access CFI data structures.
  52 *
  53 * References
  54 * JEDEC Standard JESD68 - Common Flash Interface (CFI)
  55 * JEDEC Standard JEP137-A Common Flash Interface (CFI) ID Codes
  56 * Intel Application Note 646 Common Flash Interface (CFI) and Command Sets
  57 * Intel 290667-008 3 Volt Intel StrataFlash Memory datasheet
  58 * AMD CFI Specification, Release 2.0 December 1, 2001
  59 * AMD/Spansion Application Note: Migration from Single-byte to Three-byte
  60 *   Device IDs, Publication Number 25538 Revision A, November 8, 2001
  61 *
  62 * Define CONFIG_SYS_WRITE_SWAPPED_DATA, if you have to swap the Bytes between
  63 * reading and writing ... (yes there is such a Hardware).
  64 */
  65
  66static uint flash_offset_cfi[2] = { FLASH_OFFSET_CFI, FLASH_OFFSET_CFI_ALT };
  67#ifdef CONFIG_FLASH_CFI_MTD
  68static uint flash_verbose = 1;
  69#else
  70#define flash_verbose 1
  71#endif
  72
  73flash_info_t flash_info[CFI_MAX_FLASH_BANKS];   /* FLASH chips info */
  74
  75/*
  76 * Check if chip width is defined. If not, start detecting with 8bit.
  77 */
  78#ifndef CONFIG_SYS_FLASH_CFI_WIDTH
  79#define CONFIG_SYS_FLASH_CFI_WIDTH      FLASH_CFI_8BIT
  80#endif
  81
  82/*
  83 * 0xffff is an undefined value for the configuration register. When
  84 * this value is returned, the configuration register shall not be
  85 * written at all (default mode).
  86 */
  87static u16 cfi_flash_config_reg(int i)
  88{
  89#ifdef CONFIG_SYS_CFI_FLASH_CONFIG_REGS
  90        return ((u16 [])CONFIG_SYS_CFI_FLASH_CONFIG_REGS)[i];
  91#else
  92        return 0xffff;
  93#endif
  94}
  95
  96#if defined(CONFIG_SYS_MAX_FLASH_BANKS_DETECT)
  97int cfi_flash_num_flash_banks = CONFIG_SYS_MAX_FLASH_BANKS_DETECT;
  98#endif
  99
 100static phys_addr_t __cfi_flash_bank_addr(int i)
 101{
 102        return ((phys_addr_t [])CONFIG_SYS_FLASH_BANKS_LIST)[i];
 103}
 104phys_addr_t cfi_flash_bank_addr(int i)
 105        __attribute__((weak, alias("__cfi_flash_bank_addr")));
 106
 107static unsigned long __cfi_flash_bank_size(int i)
 108{
 109#ifdef CONFIG_SYS_FLASH_BANKS_SIZES
 110        return ((unsigned long [])CONFIG_SYS_FLASH_BANKS_SIZES)[i];
 111#else
 112        return 0;
 113#endif
 114}
 115unsigned long cfi_flash_bank_size(int i)
 116        __attribute__((weak, alias("__cfi_flash_bank_size")));
 117
 118static void __flash_write8(u8 value, void *addr)
 119{
 120        __raw_writeb(value, addr);
 121}
 122
 123static void __flash_write16(u16 value, void *addr)
 124{
 125        __raw_writew(value, addr);
 126}
 127
 128static void __flash_write32(u32 value, void *addr)
 129{
 130        __raw_writel(value, addr);
 131}
 132
 133static void __flash_write64(u64 value, void *addr)
 134{
 135        /* No architectures currently implement __raw_writeq() */
 136        *(volatile u64 *)addr = value;
 137}
 138
 139static u8 __flash_read8(void *addr)
 140{
 141        return __raw_readb(addr);
 142}
 143
 144static u16 __flash_read16(void *addr)
 145{
 146        return __raw_readw(addr);
 147}
 148
 149static u32 __flash_read32(void *addr)
 150{
 151        return __raw_readl(addr);
 152}
 153
 154static u64 __flash_read64(void *addr)
 155{
 156        /* No architectures currently implement __raw_readq() */
 157        return *(volatile u64 *)addr;
 158}
 159
 160#ifdef CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS
 161void flash_write8(u8 value, void *addr)__attribute__((weak, alias("__flash_write8")));
 162void flash_write16(u16 value, void *addr)__attribute__((weak, alias("__flash_write16")));
 163void flash_write32(u32 value, void *addr)__attribute__((weak, alias("__flash_write32")));
 164void flash_write64(u64 value, void *addr)__attribute__((weak, alias("__flash_write64")));
 165u8 flash_read8(void *addr)__attribute__((weak, alias("__flash_read8")));
 166u16 flash_read16(void *addr)__attribute__((weak, alias("__flash_read16")));
 167u32 flash_read32(void *addr)__attribute__((weak, alias("__flash_read32")));
 168u64 flash_read64(void *addr)__attribute__((weak, alias("__flash_read64")));
 169#else
 170#define flash_write8    __flash_write8
 171#define flash_write16   __flash_write16
 172#define flash_write32   __flash_write32
 173#define flash_write64   __flash_write64
 174#define flash_read8     __flash_read8
 175#define flash_read16    __flash_read16
 176#define flash_read32    __flash_read32
 177#define flash_read64    __flash_read64
 178#endif
 179
 180/*-----------------------------------------------------------------------
 181 */
 182#if defined(CONFIG_ENV_IS_IN_FLASH) || defined(CONFIG_ENV_ADDR_REDUND) || (CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH_BASE)
 183flash_info_t *flash_get_info(ulong base)
 184{
 185        int i;
 186        flash_info_t *info = NULL;
 187
 188        for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; i++) {
 189                info = & flash_info[i];
 190                if (info->size && info->start[0] <= base &&
 191                    base <= info->start[0] + info->size - 1)
 192                        break;
 193        }
 194
 195        return info;
 196}
 197#endif
 198
 199unsigned long flash_sector_size(flash_info_t *info, flash_sect_t sect)
 200{
 201        if (sect != (info->sector_count - 1))
 202                return info->start[sect + 1] - info->start[sect];
 203        else
 204                return info->start[0] + info->size - info->start[sect];
 205}
 206
 207/*-----------------------------------------------------------------------
 208 * create an address based on the offset and the port width
 209 */
 210static inline void *
 211flash_map (flash_info_t * info, flash_sect_t sect, uint offset)
 212{
 213        unsigned int byte_offset = offset * info->portwidth;
 214
 215        return (void *)(info->start[sect] + byte_offset);
 216}
 217
 218static inline void flash_unmap(flash_info_t *info, flash_sect_t sect,
 219                unsigned int offset, void *addr)
 220{
 221}
 222
 223/*-----------------------------------------------------------------------
 224 * make a proper sized command based on the port and chip widths
 225 */
 226static void flash_make_cmd(flash_info_t *info, u32 cmd, void *cmdbuf)
 227{
 228        int i;
 229        int cword_offset;
 230        int cp_offset;
 231#if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
 232        u32 cmd_le = cpu_to_le32(cmd);
 233#endif
 234        uchar val;
 235        uchar *cp = (uchar *) cmdbuf;
 236
 237        for (i = info->portwidth; i > 0; i--){
 238                cword_offset = (info->portwidth-i)%info->chipwidth;
 239#if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
 240                cp_offset = info->portwidth - i;
 241                val = *((uchar*)&cmd_le + cword_offset);
 242#else
 243                cp_offset = i - 1;
 244                val = *((uchar*)&cmd + sizeof(u32) - cword_offset - 1);
 245#endif
 246                cp[cp_offset] = (cword_offset >= sizeof(u32)) ? 0x00 : val;
 247        }
 248}
 249
 250#ifdef DEBUG
 251/*-----------------------------------------------------------------------
 252 * Debug support
 253 */
 254static void print_longlong (char *str, unsigned long long data)
 255{
 256        int i;
 257        char *cp;
 258
 259        cp = (char *) &data;
 260        for (i = 0; i < 8; i++)
 261                sprintf (&str[i * 2], "%2.2x", *cp++);
 262}
 263
 264static void flash_printqry (struct cfi_qry *qry)
 265{
 266        u8 *p = (u8 *)qry;
 267        int x, y;
 268
 269        for (x = 0; x < sizeof(struct cfi_qry); x += 16) {
 270                debug("%02x : ", x);
 271                for (y = 0; y < 16; y++)
 272                        debug("%2.2x ", p[x + y]);
 273                debug(" ");
 274                for (y = 0; y < 16; y++) {
 275                        unsigned char c = p[x + y];
 276                        if (c >= 0x20 && c <= 0x7e)
 277                                debug("%c", c);
 278                        else
 279                                debug(".");
 280                }
 281                debug("\n");
 282        }
 283}
 284#endif
 285
 286
 287/*-----------------------------------------------------------------------
 288 * read a character at a port width address
 289 */
 290static inline uchar flash_read_uchar (flash_info_t * info, uint offset)
 291{
 292        uchar *cp;
 293        uchar retval;
 294
 295        cp = flash_map (info, 0, offset);
 296#if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
 297        retval = flash_read8(cp);
 298#else
 299        retval = flash_read8(cp + info->portwidth - 1);
 300#endif
 301        flash_unmap (info, 0, offset, cp);
 302        return retval;
 303}
 304
 305/*-----------------------------------------------------------------------
 306 * read a word at a port width address, assume 16bit bus
 307 */
 308static inline ushort flash_read_word (flash_info_t * info, uint offset)
 309{
 310        ushort *addr, retval;
 311
 312        addr = flash_map (info, 0, offset);
 313        retval = flash_read16 (addr);
 314        flash_unmap (info, 0, offset, addr);
 315        return retval;
 316}
 317
 318
 319/*-----------------------------------------------------------------------
 320 * read a long word by picking the least significant byte of each maximum
 321 * port size word. Swap for ppc format.
 322 */
 323static ulong flash_read_long (flash_info_t * info, flash_sect_t sect,
 324                              uint offset)
 325{
 326        uchar *addr;
 327        ulong retval;
 328
 329#ifdef DEBUG
 330        int x;
 331#endif
 332        addr = flash_map (info, sect, offset);
 333
 334#ifdef DEBUG
 335        debug ("long addr is at %p info->portwidth = %d\n", addr,
 336               info->portwidth);
 337        for (x = 0; x < 4 * info->portwidth; x++) {
 338                debug ("addr[%x] = 0x%x\n", x, flash_read8(addr + x));
 339        }
 340#endif
 341#if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
 342        retval = ((flash_read8(addr) << 16) |
 343                  (flash_read8(addr + info->portwidth) << 24) |
 344                  (flash_read8(addr + 2 * info->portwidth)) |
 345                  (flash_read8(addr + 3 * info->portwidth) << 8));
 346#else
 347        retval = ((flash_read8(addr + 2 * info->portwidth - 1) << 24) |
 348                  (flash_read8(addr + info->portwidth - 1) << 16) |
 349                  (flash_read8(addr + 4 * info->portwidth - 1) << 8) |
 350                  (flash_read8(addr + 3 * info->portwidth - 1)));
 351#endif
 352        flash_unmap(info, sect, offset, addr);
 353
 354        return retval;
 355}
 356
 357/*
 358 * Write a proper sized command to the correct address
 359 */
 360void flash_write_cmd (flash_info_t * info, flash_sect_t sect,
 361                      uint offset, u32 cmd)
 362{
 363
 364        void *addr;
 365        cfiword_t cword;
 366
 367        addr = flash_map (info, sect, offset);
 368        flash_make_cmd (info, cmd, &cword);
 369        switch (info->portwidth) {
 370        case FLASH_CFI_8BIT:
 371                debug ("fwc addr %p cmd %x %x 8bit x %d bit\n", addr, cmd,
 372                       cword.c, info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
 373                flash_write8(cword.c, addr);
 374                break;
 375        case FLASH_CFI_16BIT:
 376                debug ("fwc addr %p cmd %x %4.4x 16bit x %d bit\n", addr,
 377                       cmd, cword.w,
 378                       info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
 379                flash_write16(cword.w, addr);
 380                break;
 381        case FLASH_CFI_32BIT:
 382                debug ("fwc addr %p cmd %x %8.8lx 32bit x %d bit\n", addr,
 383                       cmd, cword.l,
 384                       info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
 385                flash_write32(cword.l, addr);
 386                break;
 387        case FLASH_CFI_64BIT:
 388#ifdef DEBUG
 389                {
 390                        char str[20];
 391
 392                        print_longlong (str, cword.ll);
 393
 394                        debug ("fwrite addr %p cmd %x %s 64 bit x %d bit\n",
 395                               addr, cmd, str,
 396                               info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
 397                }
 398#endif
 399                flash_write64(cword.ll, addr);
 400                break;
 401        }
 402
 403        /* Ensure all the instructions are fully finished */
 404        sync();
 405
 406        flash_unmap(info, sect, offset, addr);
 407}
 408
 409static void flash_unlock_seq (flash_info_t * info, flash_sect_t sect)
 410{
 411        flash_write_cmd (info, sect, info->addr_unlock1, AMD_CMD_UNLOCK_START);
 412        flash_write_cmd (info, sect, info->addr_unlock2, AMD_CMD_UNLOCK_ACK);
 413}
 414
 415/*-----------------------------------------------------------------------
 416 */
 417static int flash_isequal (flash_info_t * info, flash_sect_t sect,
 418                          uint offset, uchar cmd)
 419{
 420        void *addr;
 421        cfiword_t cword;
 422        int retval;
 423
 424        addr = flash_map (info, sect, offset);
 425        flash_make_cmd (info, cmd, &cword);
 426
 427        debug ("is= cmd %x(%c) addr %p ", cmd, cmd, addr);
 428        switch (info->portwidth) {
 429        case FLASH_CFI_8BIT:
 430                debug ("is= %x %x\n", flash_read8(addr), cword.c);
 431                retval = (flash_read8(addr) == cword.c);
 432                break;
 433        case FLASH_CFI_16BIT:
 434                debug ("is= %4.4x %4.4x\n", flash_read16(addr), cword.w);
 435                retval = (flash_read16(addr) == cword.w);
 436                break;
 437        case FLASH_CFI_32BIT:
 438                debug ("is= %8.8x %8.8lx\n", flash_read32(addr), cword.l);
 439                retval = (flash_read32(addr) == cword.l);
 440                break;
 441        case FLASH_CFI_64BIT:
 442#ifdef DEBUG
 443                {
 444                        char str1[20];
 445                        char str2[20];
 446
 447                        print_longlong (str1, flash_read64(addr));
 448                        print_longlong (str2, cword.ll);
 449                        debug ("is= %s %s\n", str1, str2);
 450                }
 451#endif
 452                retval = (flash_read64(addr) == cword.ll);
 453                break;
 454        default:
 455                retval = 0;
 456                break;
 457        }
 458        flash_unmap(info, sect, offset, addr);
 459
 460        return retval;
 461}
 462
 463/*-----------------------------------------------------------------------
 464 */
 465static int flash_isset (flash_info_t * info, flash_sect_t sect,
 466                        uint offset, uchar cmd)
 467{
 468        void *addr;
 469        cfiword_t cword;
 470        int retval;
 471
 472        addr = flash_map (info, sect, offset);
 473        flash_make_cmd (info, cmd, &cword);
 474        switch (info->portwidth) {
 475        case FLASH_CFI_8BIT:
 476                retval = ((flash_read8(addr) & cword.c) == cword.c);
 477                break;
 478        case FLASH_CFI_16BIT:
 479                retval = ((flash_read16(addr) & cword.w) == cword.w);
 480                break;
 481        case FLASH_CFI_32BIT:
 482                retval = ((flash_read32(addr) & cword.l) == cword.l);
 483                break;
 484        case FLASH_CFI_64BIT:
 485                retval = ((flash_read64(addr) & cword.ll) == cword.ll);
 486                break;
 487        default:
 488                retval = 0;
 489                break;
 490        }
 491        flash_unmap(info, sect, offset, addr);
 492
 493        return retval;
 494}
 495
 496/*-----------------------------------------------------------------------
 497 */
 498static int flash_toggle (flash_info_t * info, flash_sect_t sect,
 499                         uint offset, uchar cmd)
 500{
 501        void *addr;
 502        cfiword_t cword;
 503        int retval;
 504
 505        addr = flash_map (info, sect, offset);
 506        flash_make_cmd (info, cmd, &cword);
 507        switch (info->portwidth) {
 508        case FLASH_CFI_8BIT:
 509                retval = flash_read8(addr) != flash_read8(addr);
 510                break;
 511        case FLASH_CFI_16BIT:
 512                retval = flash_read16(addr) != flash_read16(addr);
 513                break;
 514        case FLASH_CFI_32BIT:
 515                retval = flash_read32(addr) != flash_read32(addr);
 516                break;
 517        case FLASH_CFI_64BIT:
 518                retval = ( (flash_read32( addr ) != flash_read32( addr )) ||
 519                           (flash_read32(addr+4) != flash_read32(addr+4)) );
 520                break;
 521        default:
 522                retval = 0;
 523                break;
 524        }
 525        flash_unmap(info, sect, offset, addr);
 526
 527        return retval;
 528}
 529
 530/*
 531 * flash_is_busy - check to see if the flash is busy
 532 *
 533 * This routine checks the status of the chip and returns true if the
 534 * chip is busy.
 535 */
 536static int flash_is_busy (flash_info_t * info, flash_sect_t sect)
 537{
 538        int retval;
 539
 540        switch (info->vendor) {
 541        case CFI_CMDSET_INTEL_PROG_REGIONS:
 542        case CFI_CMDSET_INTEL_STANDARD:
 543        case CFI_CMDSET_INTEL_EXTENDED:
 544                retval = !flash_isset (info, sect, 0, FLASH_STATUS_DONE);
 545                break;
 546        case CFI_CMDSET_AMD_STANDARD:
 547        case CFI_CMDSET_AMD_EXTENDED:
 548#ifdef CONFIG_FLASH_CFI_LEGACY
 549        case CFI_CMDSET_AMD_LEGACY:
 550#endif
 551                retval = flash_toggle (info, sect, 0, AMD_STATUS_TOGGLE);
 552                break;
 553        default:
 554                retval = 0;
 555        }
 556        debug ("flash_is_busy: %d\n", retval);
 557        return retval;
 558}
 559
 560/*-----------------------------------------------------------------------
 561 *  wait for XSR.7 to be set. Time out with an error if it does not.
 562 *  This routine does not set the flash to read-array mode.
 563 */
 564static int flash_status_check (flash_info_t * info, flash_sect_t sector,
 565                               ulong tout, char *prompt)
 566{
 567        ulong start;
 568
 569#if CONFIG_SYS_HZ != 1000
 570        if ((ulong)CONFIG_SYS_HZ > 100000)
 571                tout *= (ulong)CONFIG_SYS_HZ / 1000;  /* for a big HZ, avoid overflow */
 572        else
 573                tout = DIV_ROUND_UP(tout * (ulong)CONFIG_SYS_HZ, 1000);
 574#endif
 575
 576        /* Wait for command completion */
 577#ifdef CONFIG_SYS_LOW_RES_TIMER
 578        reset_timer();
 579#endif
 580        start = get_timer (0);
 581        WATCHDOG_RESET();
 582        while (flash_is_busy (info, sector)) {
 583                if (get_timer (start) > tout) {
 584                        printf ("Flash %s timeout at address %lx data %lx\n",
 585                                prompt, info->start[sector],
 586                                flash_read_long (info, sector, 0));
 587                        flash_write_cmd (info, sector, 0, info->cmd_reset);
 588                        udelay(1);
 589                        return ERR_TIMOUT;
 590                }
 591                udelay (1);             /* also triggers watchdog */
 592        }
 593        return ERR_OK;
 594}
 595
 596/*-----------------------------------------------------------------------
 597 * Wait for XSR.7 to be set, if it times out print an error, otherwise
 598 * do a full status check.
 599 *
 600 * This routine sets the flash to read-array mode.
 601 */
 602static int flash_full_status_check (flash_info_t * info, flash_sect_t sector,
 603                                    ulong tout, char *prompt)
 604{
 605        int retcode;
 606
 607        retcode = flash_status_check (info, sector, tout, prompt);
 608        switch (info->vendor) {
 609        case CFI_CMDSET_INTEL_PROG_REGIONS:
 610        case CFI_CMDSET_INTEL_EXTENDED:
 611        case CFI_CMDSET_INTEL_STANDARD:
 612                if ((retcode != ERR_OK)
 613                    && !flash_isequal (info, sector, 0, FLASH_STATUS_DONE)) {
 614                        retcode = ERR_INVAL;
 615                        printf ("Flash %s error at address %lx\n", prompt,
 616                                info->start[sector]);
 617                        if (flash_isset (info, sector, 0, FLASH_STATUS_ECLBS |
 618                                         FLASH_STATUS_PSLBS)) {
 619                                puts ("Command Sequence Error.\n");
 620                        } else if (flash_isset (info, sector, 0,
 621                                                FLASH_STATUS_ECLBS)) {
 622                                puts ("Block Erase Error.\n");
 623                                retcode = ERR_NOT_ERASED;
 624                        } else if (flash_isset (info, sector, 0,
 625                                                FLASH_STATUS_PSLBS)) {
 626                                puts ("Locking Error\n");
 627                        }
 628                        if (flash_isset (info, sector, 0, FLASH_STATUS_DPS)) {
 629                                puts ("Block locked.\n");
 630                                retcode = ERR_PROTECTED;
 631                        }
 632                        if (flash_isset (info, sector, 0, FLASH_STATUS_VPENS))
 633                                puts ("Vpp Low Error.\n");
 634                }
 635                flash_write_cmd (info, sector, 0, info->cmd_reset);
 636                udelay(1);
 637                break;
 638        default:
 639                break;
 640        }
 641        return retcode;
 642}
 643
 644static int use_flash_status_poll(flash_info_t *info)
 645{
 646#ifdef CONFIG_SYS_CFI_FLASH_STATUS_POLL
 647        if (info->vendor == CFI_CMDSET_AMD_EXTENDED ||
 648            info->vendor == CFI_CMDSET_AMD_STANDARD)
 649                return 1;
 650#endif
 651        return 0;
 652}
 653
 654static int flash_status_poll(flash_info_t *info, void *src, void *dst,
 655                             ulong tout, char *prompt)
 656{
 657#ifdef CONFIG_SYS_CFI_FLASH_STATUS_POLL
 658        ulong start;
 659        int ready;
 660
 661#if CONFIG_SYS_HZ != 1000
 662        if ((ulong)CONFIG_SYS_HZ > 100000)
 663                tout *= (ulong)CONFIG_SYS_HZ / 1000;  /* for a big HZ, avoid overflow */
 664        else
 665                tout = DIV_ROUND_UP(tout * (ulong)CONFIG_SYS_HZ, 1000);
 666#endif
 667
 668        /* Wait for command completion */
 669#ifdef CONFIG_SYS_LOW_RES_TIMER
 670        reset_timer();
 671#endif
 672        start = get_timer(0);
 673        WATCHDOG_RESET();
 674        while (1) {
 675                switch (info->portwidth) {
 676                case FLASH_CFI_8BIT:
 677                        ready = flash_read8(dst) == flash_read8(src);
 678                        break;
 679                case FLASH_CFI_16BIT:
 680                        ready = flash_read16(dst) == flash_read16(src);
 681                        break;
 682                case FLASH_CFI_32BIT:
 683                        ready = flash_read32(dst) == flash_read32(src);
 684                        break;
 685                case FLASH_CFI_64BIT:
 686                        ready = flash_read64(dst) == flash_read64(src);
 687                        break;
 688                default:
 689                        ready = 0;
 690                        break;
 691                }
 692                if (ready)
 693                        break;
 694                if (get_timer(start) > tout) {
 695                        printf("Flash %s timeout at address %lx data %lx\n",
 696                               prompt, (ulong)dst, (ulong)flash_read8(dst));
 697                        return ERR_TIMOUT;
 698                }
 699                udelay(1);              /* also triggers watchdog */
 700        }
 701#endif /* CONFIG_SYS_CFI_FLASH_STATUS_POLL */
 702        return ERR_OK;
 703}
 704
 705/*-----------------------------------------------------------------------
 706 */
 707static void flash_add_byte (flash_info_t * info, cfiword_t * cword, uchar c)
 708{
 709#if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
 710        unsigned short  w;
 711        unsigned int    l;
 712        unsigned long long ll;
 713#endif
 714
 715        switch (info->portwidth) {
 716        case FLASH_CFI_8BIT:
 717                cword->c = c;
 718                break;
 719        case FLASH_CFI_16BIT:
 720#if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
 721                w = c;
 722                w <<= 8;
 723                cword->w = (cword->w >> 8) | w;
 724#else
 725                cword->w = (cword->w << 8) | c;
 726#endif
 727                break;
 728        case FLASH_CFI_32BIT:
 729#if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
 730                l = c;
 731                l <<= 24;
 732                cword->l = (cword->l >> 8) | l;
 733#else
 734                cword->l = (cword->l << 8) | c;
 735#endif
 736                break;
 737        case FLASH_CFI_64BIT:
 738#if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
 739                ll = c;
 740                ll <<= 56;
 741                cword->ll = (cword->ll >> 8) | ll;
 742#else
 743                cword->ll = (cword->ll << 8) | c;
 744#endif
 745                break;
 746        }
 747}
 748
 749/*
 750 * Loop through the sector table starting from the previously found sector.
 751 * Searches forwards or backwards, dependent on the passed address.
 752 */
 753static flash_sect_t find_sector (flash_info_t * info, ulong addr)
 754{
 755        static flash_sect_t saved_sector = 0; /* previously found sector */
 756        static flash_info_t *saved_info = 0; /* previously used flash bank */
 757        flash_sect_t sector = saved_sector;
 758
 759        if ((info != saved_info) || (sector >= info->sector_count))
 760                sector = 0;
 761
 762        while ((info->start[sector] < addr)
 763                        && (sector < info->sector_count - 1))
 764                sector++;
 765        while ((info->start[sector] > addr) && (sector > 0))
 766                /*
 767                 * also decrements the sector in case of an overshot
 768                 * in the first loop
 769                 */
 770                sector--;
 771
 772        saved_sector = sector;
 773        saved_info = info;
 774        return sector;
 775}
 776
 777/*-----------------------------------------------------------------------
 778 */
 779static int flash_write_cfiword (flash_info_t * info, ulong dest,
 780                                cfiword_t cword)
 781{
 782        void *dstaddr = (void *)dest;
 783        int flag;
 784        flash_sect_t sect = 0;
 785        char sect_found = 0;
 786
 787        /* Check if Flash is (sufficiently) erased */
 788        switch (info->portwidth) {
 789        case FLASH_CFI_8BIT:
 790                flag = ((flash_read8(dstaddr) & cword.c) == cword.c);
 791                break;
 792        case FLASH_CFI_16BIT:
 793                flag = ((flash_read16(dstaddr) & cword.w) == cword.w);
 794                break;
 795        case FLASH_CFI_32BIT:
 796                flag = ((flash_read32(dstaddr) & cword.l) == cword.l);
 797                break;
 798        case FLASH_CFI_64BIT:
 799                flag = ((flash_read64(dstaddr) & cword.ll) == cword.ll);
 800                break;
 801        default:
 802                flag = 0;
 803                break;
 804        }
 805        if (!flag)
 806                return ERR_NOT_ERASED;
 807
 808        /* Disable interrupts which might cause a timeout here */
 809        flag = disable_interrupts ();
 810
 811        switch (info->vendor) {
 812        case CFI_CMDSET_INTEL_PROG_REGIONS:
 813        case CFI_CMDSET_INTEL_EXTENDED:
 814        case CFI_CMDSET_INTEL_STANDARD:
 815                flash_write_cmd (info, 0, 0, FLASH_CMD_CLEAR_STATUS);
 816                flash_write_cmd (info, 0, 0, FLASH_CMD_WRITE);
 817                break;
 818        case CFI_CMDSET_AMD_EXTENDED:
 819        case CFI_CMDSET_AMD_STANDARD:
 820                sect = find_sector(info, dest);
 821                flash_unlock_seq (info, sect);
 822                flash_write_cmd (info, sect, info->addr_unlock1, AMD_CMD_WRITE);
 823                sect_found = 1;
 824                break;
 825#ifdef CONFIG_FLASH_CFI_LEGACY
 826        case CFI_CMDSET_AMD_LEGACY:
 827                sect = find_sector(info, dest);
 828                flash_unlock_seq (info, 0);
 829                flash_write_cmd (info, 0, info->addr_unlock1, AMD_CMD_WRITE);
 830                sect_found = 1;
 831                break;
 832#endif
 833        }
 834
 835        switch (info->portwidth) {
 836        case FLASH_CFI_8BIT:
 837                flash_write8(cword.c, dstaddr);
 838                break;
 839        case FLASH_CFI_16BIT:
 840                flash_write16(cword.w, dstaddr);
 841                break;
 842        case FLASH_CFI_32BIT:
 843                flash_write32(cword.l, dstaddr);
 844                break;
 845        case FLASH_CFI_64BIT:
 846                flash_write64(cword.ll, dstaddr);
 847                break;
 848        }
 849
 850        /* re-enable interrupts if necessary */
 851        if (flag)
 852                enable_interrupts ();
 853
 854        if (!sect_found)
 855                sect = find_sector (info, dest);
 856
 857        if (use_flash_status_poll(info))
 858                return flash_status_poll(info, &cword, dstaddr,
 859                                         info->write_tout, "write");
 860        else
 861                return flash_full_status_check(info, sect,
 862                                               info->write_tout, "write");
 863}
 864
 865#ifdef CONFIG_SYS_FLASH_USE_BUFFER_WRITE
 866
 867static int flash_write_cfibuffer (flash_info_t * info, ulong dest, uchar * cp,
 868                                  int len)
 869{
 870        flash_sect_t sector;
 871        int cnt;
 872        int retcode;
 873        void *src = cp;
 874        void *dst = (void *)dest;
 875        void *dst2 = dst;
 876        int flag = 1;
 877        uint offset = 0;
 878        unsigned int shift;
 879        uchar write_cmd;
 880
 881        switch (info->portwidth) {
 882        case FLASH_CFI_8BIT:
 883                shift = 0;
 884                break;
 885        case FLASH_CFI_16BIT:
 886                shift = 1;
 887                break;
 888        case FLASH_CFI_32BIT:
 889                shift = 2;
 890                break;
 891        case FLASH_CFI_64BIT:
 892                shift = 3;
 893                break;
 894        default:
 895                retcode = ERR_INVAL;
 896                goto out_unmap;
 897        }
 898
 899        cnt = len >> shift;
 900
 901        while ((cnt-- > 0) && (flag == 1)) {
 902                switch (info->portwidth) {
 903                case FLASH_CFI_8BIT:
 904                        flag = ((flash_read8(dst2) & flash_read8(src)) ==
 905                                flash_read8(src));
 906                        src += 1, dst2 += 1;
 907                        break;
 908                case FLASH_CFI_16BIT:
 909                        flag = ((flash_read16(dst2) & flash_read16(src)) ==
 910                                flash_read16(src));
 911                        src += 2, dst2 += 2;
 912                        break;
 913                case FLASH_CFI_32BIT:
 914                        flag = ((flash_read32(dst2) & flash_read32(src)) ==
 915                                flash_read32(src));
 916                        src += 4, dst2 += 4;
 917                        break;
 918                case FLASH_CFI_64BIT:
 919                        flag = ((flash_read64(dst2) & flash_read64(src)) ==
 920                                flash_read64(src));
 921                        src += 8, dst2 += 8;
 922                        break;
 923                }
 924        }
 925        if (!flag) {
 926                retcode = ERR_NOT_ERASED;
 927                goto out_unmap;
 928        }
 929
 930        src = cp;
 931        sector = find_sector (info, dest);
 932
 933        switch (info->vendor) {
 934        case CFI_CMDSET_INTEL_PROG_REGIONS:
 935        case CFI_CMDSET_INTEL_STANDARD:
 936        case CFI_CMDSET_INTEL_EXTENDED:
 937                write_cmd = (info->vendor == CFI_CMDSET_INTEL_PROG_REGIONS) ?
 938                                        FLASH_CMD_WRITE_BUFFER_PROG : FLASH_CMD_WRITE_TO_BUFFER;
 939                flash_write_cmd (info, sector, 0, FLASH_CMD_CLEAR_STATUS);
 940                flash_write_cmd (info, sector, 0, FLASH_CMD_READ_STATUS);
 941                flash_write_cmd (info, sector, 0, write_cmd);
 942                retcode = flash_status_check (info, sector,
 943                                              info->buffer_write_tout,
 944                                              "write to buffer");
 945                if (retcode == ERR_OK) {
 946                        /* reduce the number of loops by the width of
 947                         * the port */
 948                        cnt = len >> shift;
 949                        flash_write_cmd (info, sector, 0, cnt - 1);
 950                        while (cnt-- > 0) {
 951                                switch (info->portwidth) {
 952                                case FLASH_CFI_8BIT:
 953                                        flash_write8(flash_read8(src), dst);
 954                                        src += 1, dst += 1;
 955                                        break;
 956                                case FLASH_CFI_16BIT:
 957                                        flash_write16(flash_read16(src), dst);
 958                                        src += 2, dst += 2;
 959                                        break;
 960                                case FLASH_CFI_32BIT:
 961                                        flash_write32(flash_read32(src), dst);
 962                                        src += 4, dst += 4;
 963                                        break;
 964                                case FLASH_CFI_64BIT:
 965                                        flash_write64(flash_read64(src), dst);
 966                                        src += 8, dst += 8;
 967                                        break;
 968                                default:
 969                                        retcode = ERR_INVAL;
 970                                        goto out_unmap;
 971                                }
 972                        }
 973                        flash_write_cmd (info, sector, 0,
 974                                         FLASH_CMD_WRITE_BUFFER_CONFIRM);
 975                        retcode = flash_full_status_check (
 976                                info, sector, info->buffer_write_tout,
 977                                "buffer write");
 978                }
 979
 980                break;
 981
 982        case CFI_CMDSET_AMD_STANDARD:
 983        case CFI_CMDSET_AMD_EXTENDED:
 984                flash_unlock_seq(info,0);
 985
 986#ifdef CONFIG_FLASH_SPANSION_S29WS_N
 987                offset = ((unsigned long)dst - info->start[sector]) >> shift;
 988#endif
 989                flash_write_cmd(info, sector, offset, AMD_CMD_WRITE_TO_BUFFER);
 990                cnt = len >> shift;
 991                flash_write_cmd(info, sector, offset, cnt - 1);
 992
 993                switch (info->portwidth) {
 994                case FLASH_CFI_8BIT:
 995                        while (cnt-- > 0) {
 996                                flash_write8(flash_read8(src), dst);
 997                                src += 1, dst += 1;
 998                        }
 999                        break;
1000                case FLASH_CFI_16BIT:
1001                        while (cnt-- > 0) {
1002                                flash_write16(flash_read16(src), dst);
1003                                src += 2, dst += 2;
1004                        }
1005                        break;
1006                case FLASH_CFI_32BIT:
1007                        while (cnt-- > 0) {
1008                                flash_write32(flash_read32(src), dst);
1009                                src += 4, dst += 4;
1010                        }
1011                        break;
1012                case FLASH_CFI_64BIT:
1013                        while (cnt-- > 0) {
1014                                flash_write64(flash_read64(src), dst);
1015                                src += 8, dst += 8;
1016                        }
1017                        break;
1018                default:
1019                        retcode = ERR_INVAL;
1020                        goto out_unmap;
1021                }
1022
1023                flash_write_cmd (info, sector, 0, AMD_CMD_WRITE_BUFFER_CONFIRM);
1024                if (use_flash_status_poll(info))
1025                        retcode = flash_status_poll(info, src - (1 << shift),
1026                                                    dst - (1 << shift),
1027                                                    info->buffer_write_tout,
1028                                                    "buffer write");
1029                else
1030                        retcode = flash_full_status_check(info, sector,
1031                                                          info->buffer_write_tout,
1032                                                          "buffer write");
1033                break;
1034
1035        default:
1036                debug ("Unknown Command Set\n");
1037                retcode = ERR_INVAL;
1038                break;
1039        }
1040
1041out_unmap:
1042        return retcode;
1043}
1044#endif /* CONFIG_SYS_FLASH_USE_BUFFER_WRITE */
1045
1046
1047/*-----------------------------------------------------------------------
1048 */
1049int flash_erase (flash_info_t * info, int s_first, int s_last)
1050{
1051        int rcode = 0;
1052        int prot;
1053        flash_sect_t sect;
1054        int st;
1055
1056        if (info->flash_id != FLASH_MAN_CFI) {
1057                puts ("Can't erase unknown flash type - aborted\n");
1058                return 1;
1059        }
1060        if ((s_first < 0) || (s_first > s_last)) {
1061                puts ("- no sectors to erase\n");
1062                return 1;
1063        }
1064
1065        prot = 0;
1066        for (sect = s_first; sect <= s_last; ++sect) {
1067                if (info->protect[sect]) {
1068                        prot++;
1069                }
1070        }
1071        if (prot) {
1072                printf ("- Warning: %d protected sectors will not be erased!\n",
1073                        prot);
1074        } else if (flash_verbose) {
1075                putc ('\n');
1076        }
1077
1078
1079        for (sect = s_first; sect <= s_last; sect++) {
1080                if (info->protect[sect] == 0) { /* not protected */
1081                        switch (info->vendor) {
1082                        case CFI_CMDSET_INTEL_PROG_REGIONS:
1083                        case CFI_CMDSET_INTEL_STANDARD:
1084                        case CFI_CMDSET_INTEL_EXTENDED:
1085                                flash_write_cmd (info, sect, 0,
1086                                                 FLASH_CMD_CLEAR_STATUS);
1087                                flash_write_cmd (info, sect, 0,
1088                                                 FLASH_CMD_BLOCK_ERASE);
1089                                flash_write_cmd (info, sect, 0,
1090                                                 FLASH_CMD_ERASE_CONFIRM);
1091                                break;
1092                        case CFI_CMDSET_AMD_STANDARD:
1093                        case CFI_CMDSET_AMD_EXTENDED:
1094                                flash_unlock_seq (info, sect);
1095                                flash_write_cmd (info, sect,
1096                                                info->addr_unlock1,
1097                                                AMD_CMD_ERASE_START);
1098                                flash_unlock_seq (info, sect);
1099                                flash_write_cmd (info, sect, 0,
1100                                                 AMD_CMD_ERASE_SECTOR);
1101                                break;
1102#ifdef CONFIG_FLASH_CFI_LEGACY
1103                        case CFI_CMDSET_AMD_LEGACY:
1104                                flash_unlock_seq (info, 0);
1105                                flash_write_cmd (info, 0, info->addr_unlock1,
1106                                                AMD_CMD_ERASE_START);
1107                                flash_unlock_seq (info, 0);
1108                                flash_write_cmd (info, sect, 0,
1109                                                AMD_CMD_ERASE_SECTOR);
1110                                break;
1111#endif
1112                        default:
1113                                debug ("Unkown flash vendor %d\n",
1114                                       info->vendor);
1115                                break;
1116                        }
1117
1118                        if (use_flash_status_poll(info)) {
1119                                cfiword_t cword = (cfiword_t)0xffffffffffffffffULL;
1120                                void *dest;
1121                                dest = flash_map(info, sect, 0);
1122                                st = flash_status_poll(info, &cword, dest,
1123                                                       info->erase_blk_tout, "erase");
1124                                flash_unmap(info, sect, 0, dest);
1125                        } else
1126                                st = flash_full_status_check(info, sect,
1127                                                             info->erase_blk_tout,
1128                                                             "erase");
1129                        if (st)
1130                                rcode = 1;
1131                        else if (flash_verbose)
1132                                putc ('.');
1133                }
1134        }
1135
1136        if (flash_verbose)
1137                puts (" done\n");
1138
1139        return rcode;
1140}
1141
1142#ifdef CONFIG_SYS_FLASH_EMPTY_INFO
1143static int sector_erased(flash_info_t *info, int i)
1144{
1145        int k;
1146        int size;
1147        u32 *flash;
1148
1149        /*
1150         * Check if whole sector is erased
1151         */
1152        size = flash_sector_size(info, i);
1153        flash = (u32 *)info->start[i];
1154        /* divide by 4 for longword access */
1155        size = size >> 2;
1156
1157        for (k = 0; k < size; k++) {
1158                if (flash_read32(flash++) != 0xffffffff)
1159                        return 0;       /* not erased */
1160        }
1161
1162        return 1;                       /* erased */
1163}
1164#endif /* CONFIG_SYS_FLASH_EMPTY_INFO */
1165
1166void flash_print_info (flash_info_t * info)
1167{
1168        int i;
1169
1170        if (info->flash_id != FLASH_MAN_CFI) {
1171                puts ("missing or unknown FLASH type\n");
1172                return;
1173        }
1174
1175        printf ("%s flash (%d x %d)",
1176                info->name,
1177                (info->portwidth << 3), (info->chipwidth << 3));
1178        if (info->size < 1024*1024)
1179                printf ("  Size: %ld kB in %d Sectors\n",
1180                        info->size >> 10, info->sector_count);
1181        else
1182                printf ("  Size: %ld MB in %d Sectors\n",
1183                        info->size >> 20, info->sector_count);
1184        printf ("  ");
1185        switch (info->vendor) {
1186                case CFI_CMDSET_INTEL_PROG_REGIONS:
1187                        printf ("Intel Prog Regions");
1188                        break;
1189                case CFI_CMDSET_INTEL_STANDARD:
1190                        printf ("Intel Standard");
1191                        break;
1192                case CFI_CMDSET_INTEL_EXTENDED:
1193                        printf ("Intel Extended");
1194                        break;
1195                case CFI_CMDSET_AMD_STANDARD:
1196                        printf ("AMD Standard");
1197                        break;
1198                case CFI_CMDSET_AMD_EXTENDED:
1199                        printf ("AMD Extended");
1200                        break;
1201#ifdef CONFIG_FLASH_CFI_LEGACY
1202                case CFI_CMDSET_AMD_LEGACY:
1203                        printf ("AMD Legacy");
1204                        break;
1205#endif
1206                default:
1207                        printf ("Unknown (%d)", info->vendor);
1208                        break;
1209        }
1210        printf (" command set, Manufacturer ID: 0x%02X, Device ID: 0x",
1211                info->manufacturer_id);
1212        printf (info->chipwidth == FLASH_CFI_16BIT ? "%04X" : "%02X",
1213                info->device_id);
1214        if ((info->device_id & 0xff) == 0x7E) {
1215                printf(info->chipwidth == FLASH_CFI_16BIT ? "%04X" : "%02X",
1216                info->device_id2);
1217        }
1218        printf ("\n  Erase timeout: %ld ms, write timeout: %ld ms\n",
1219                info->erase_blk_tout,
1220                info->write_tout);
1221        if (info->buffer_size > 1) {
1222                printf ("  Buffer write timeout: %ld ms, "
1223                        "buffer size: %d bytes\n",
1224                info->buffer_write_tout,
1225                info->buffer_size);
1226        }
1227
1228        puts ("\n  Sector Start Addresses:");
1229        for (i = 0; i < info->sector_count; ++i) {
1230                if (ctrlc())
1231                        break;
1232                if ((i % 5) == 0)
1233                        putc('\n');
1234#ifdef CONFIG_SYS_FLASH_EMPTY_INFO
1235                /* print empty and read-only info */
1236                printf ("  %08lX %c %s ",
1237                        info->start[i],
1238                        sector_erased(info, i) ? 'E' : ' ',
1239                        info->protect[i] ? "RO" : "  ");
1240#else   /* ! CONFIG_SYS_FLASH_EMPTY_INFO */
1241                printf ("  %08lX   %s ",
1242                        info->start[i],
1243                        info->protect[i] ? "RO" : "  ");
1244#endif
1245        }
1246        putc ('\n');
1247        return;
1248}
1249
1250/*-----------------------------------------------------------------------
1251 * This is used in a few places in write_buf() to show programming
1252 * progress.  Making it a function is nasty because it needs to do side
1253 * effect updates to digit and dots.  Repeated code is nasty too, so
1254 * we define it once here.
1255 */
1256#ifdef CONFIG_FLASH_SHOW_PROGRESS
1257#define FLASH_SHOW_PROGRESS(scale, dots, digit, dots_sub) \
1258        if (flash_verbose) { \
1259                dots -= dots_sub; \
1260                if ((scale > 0) && (dots <= 0)) { \
1261                        if ((digit % 5) == 0) \
1262                                printf ("%d", digit / 5); \
1263                        else \
1264                                putc ('.'); \
1265                        digit--; \
1266                        dots += scale; \
1267                } \
1268        }
1269#else
1270#define FLASH_SHOW_PROGRESS(scale, dots, digit, dots_sub)
1271#endif
1272
1273/*-----------------------------------------------------------------------
1274 * Copy memory to flash, returns:
1275 * 0 - OK
1276 * 1 - write timeout
1277 * 2 - Flash not erased
1278 */
1279int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt)
1280{
1281        ulong wp;
1282        uchar *p;
1283        int aln;
1284        cfiword_t cword;
1285        int i, rc;
1286#ifdef CONFIG_SYS_FLASH_USE_BUFFER_WRITE
1287        int buffered_size;
1288#endif
1289#ifdef CONFIG_FLASH_SHOW_PROGRESS
1290        int digit = CONFIG_FLASH_SHOW_PROGRESS;
1291        int scale = 0;
1292        int dots  = 0;
1293
1294        /*
1295         * Suppress if there are fewer than CONFIG_FLASH_SHOW_PROGRESS writes.
1296         */
1297        if (cnt >= CONFIG_FLASH_SHOW_PROGRESS) {
1298                scale = (int)((cnt + CONFIG_FLASH_SHOW_PROGRESS - 1) /
1299                        CONFIG_FLASH_SHOW_PROGRESS);
1300        }
1301#endif
1302
1303        /* get lower aligned address */
1304        wp = (addr & ~(info->portwidth - 1));
1305
1306        /* handle unaligned start */
1307        if ((aln = addr - wp) != 0) {
1308                cword.l = 0;
1309                p = (uchar *)wp;
1310                for (i = 0; i < aln; ++i)
1311                        flash_add_byte (info, &cword, flash_read8(p + i));
1312
1313                for (; (i < info->portwidth) && (cnt > 0); i++) {
1314                        flash_add_byte (info, &cword, *src++);
1315                        cnt--;
1316                }
1317                for (; (cnt == 0) && (i < info->portwidth); ++i)
1318                        flash_add_byte (info, &cword, flash_read8(p + i));
1319
1320                rc = flash_write_cfiword (info, wp, cword);
1321                if (rc != 0)
1322                        return rc;
1323
1324                wp += i;
1325                FLASH_SHOW_PROGRESS(scale, dots, digit, i);
1326        }
1327
1328        /* handle the aligned part */
1329#ifdef CONFIG_SYS_FLASH_USE_BUFFER_WRITE
1330        buffered_size = (info->portwidth / info->chipwidth);
1331        buffered_size *= info->buffer_size;
1332        while (cnt >= info->portwidth) {
1333                /* prohibit buffer write when buffer_size is 1 */
1334                if (info->buffer_size == 1) {
1335                        cword.l = 0;
1336                        for (i = 0; i < info->portwidth; i++)
1337                                flash_add_byte (info, &cword, *src++);
1338                        if ((rc = flash_write_cfiword (info, wp, cword)) != 0)
1339                                return rc;
1340                        wp += info->portwidth;
1341                        cnt -= info->portwidth;
1342                        continue;
1343                }
1344
1345                /* write buffer until next buffered_size aligned boundary */
1346                i = buffered_size - (wp % buffered_size);
1347                if (i > cnt)
1348                        i = cnt;
1349                if ((rc = flash_write_cfibuffer (info, wp, src, i)) != ERR_OK)
1350                        return rc;
1351                i -= i & (info->portwidth - 1);
1352                wp += i;
1353                src += i;
1354                cnt -= i;
1355                FLASH_SHOW_PROGRESS(scale, dots, digit, i);
1356        }
1357#else
1358        while (cnt >= info->portwidth) {
1359                cword.l = 0;
1360                for (i = 0; i < info->portwidth; i++) {
1361                        flash_add_byte (info, &cword, *src++);
1362                }
1363                if ((rc = flash_write_cfiword (info, wp, cword)) != 0)
1364                        return rc;
1365                wp += info->portwidth;
1366                cnt -= info->portwidth;
1367                FLASH_SHOW_PROGRESS(scale, dots, digit, info->portwidth);
1368        }
1369#endif /* CONFIG_SYS_FLASH_USE_BUFFER_WRITE */
1370
1371        if (cnt == 0) {
1372                return (0);
1373        }
1374
1375        /*
1376         * handle unaligned tail bytes
1377         */
1378        cword.l = 0;
1379        p = (uchar *)wp;
1380        for (i = 0; (i < info->portwidth) && (cnt > 0); ++i) {
1381                flash_add_byte (info, &cword, *src++);
1382                --cnt;
1383        }
1384        for (; i < info->portwidth; ++i)
1385                flash_add_byte (info, &cword, flash_read8(p + i));
1386
1387        return flash_write_cfiword (info, wp, cword);
1388}
1389
1390/*-----------------------------------------------------------------------
1391 */
1392#ifdef CONFIG_SYS_FLASH_PROTECTION
1393
1394int flash_real_protect (flash_info_t * info, long sector, int prot)
1395{
1396        int retcode = 0;
1397
1398        switch (info->vendor) {
1399                case CFI_CMDSET_INTEL_PROG_REGIONS:
1400                case CFI_CMDSET_INTEL_STANDARD:
1401                case CFI_CMDSET_INTEL_EXTENDED:
1402                        /*
1403                         * see errata called
1404                         * "Numonyx Axcell P33/P30 Specification Update" :)
1405                         */
1406                        flash_write_cmd (info, sector, 0, FLASH_CMD_READ_ID);
1407                        if (!flash_isequal (info, sector, FLASH_OFFSET_PROTECT,
1408                                            prot)) {
1409                                /*
1410                                 * cmd must come before FLASH_CMD_PROTECT + 20us
1411                                 * Disable interrupts which might cause a timeout here.
1412                                 */
1413                                int flag = disable_interrupts ();
1414                                unsigned short cmd;
1415
1416                                if (prot)
1417                                        cmd = FLASH_CMD_PROTECT_SET;
1418                                else
1419                                        cmd = FLASH_CMD_PROTECT_CLEAR;
1420
1421                                flash_write_cmd (info, sector, 0,
1422                                                  FLASH_CMD_PROTECT);
1423                                flash_write_cmd (info, sector, 0, cmd);
1424                                /* re-enable interrupts if necessary */
1425                                if (flag)
1426                                        enable_interrupts ();
1427                        }
1428                        break;
1429                case CFI_CMDSET_AMD_EXTENDED:
1430                case CFI_CMDSET_AMD_STANDARD:
1431                        /* U-Boot only checks the first byte */
1432                        if (info->manufacturer_id == (uchar)ATM_MANUFACT) {
1433                                if (prot) {
1434                                        flash_unlock_seq (info, 0);
1435                                        flash_write_cmd (info, 0,
1436                                                        info->addr_unlock1,
1437                                                        ATM_CMD_SOFTLOCK_START);
1438                                        flash_unlock_seq (info, 0);
1439                                        flash_write_cmd (info, sector, 0,
1440                                                        ATM_CMD_LOCK_SECT);
1441                                } else {
1442                                        flash_write_cmd (info, 0,
1443                                                        info->addr_unlock1,
1444                                                        AMD_CMD_UNLOCK_START);
1445                                        if (info->device_id == ATM_ID_BV6416)
1446                                                flash_write_cmd (info, sector,
1447                                                        0, ATM_CMD_UNLOCK_SECT);
1448                                }
1449                        }
1450                        break;
1451#ifdef CONFIG_FLASH_CFI_LEGACY
1452                case CFI_CMDSET_AMD_LEGACY:
1453                        flash_write_cmd (info, sector, 0, FLASH_CMD_CLEAR_STATUS);
1454                        flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT);
1455                        if (prot)
1456                                flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT_SET);
1457                        else
1458                                flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT_CLEAR);
1459#endif
1460        };
1461
1462        /*
1463         * Flash needs to be in status register read mode for
1464         * flash_full_status_check() to work correctly
1465         */
1466        flash_write_cmd(info, sector, 0, FLASH_CMD_READ_STATUS);
1467        if ((retcode =
1468             flash_full_status_check (info, sector, info->erase_blk_tout,
1469                                      prot ? "protect" : "unprotect")) == 0) {
1470
1471                info->protect[sector] = prot;
1472
1473                /*
1474                 * On some of Intel's flash chips (marked via legacy_unlock)
1475                 * unprotect unprotects all locking.
1476                 */
1477                if ((prot == 0) && (info->legacy_unlock)) {
1478                        flash_sect_t i;
1479
1480                        for (i = 0; i < info->sector_count; i++) {
1481                                if (info->protect[i])
1482                                        flash_real_protect (info, i, 1);
1483                        }
1484                }
1485        }
1486        return retcode;
1487}
1488
1489/*-----------------------------------------------------------------------
1490 * flash_read_user_serial - read the OneTimeProgramming cells
1491 */
1492void flash_read_user_serial (flash_info_t * info, void *buffer, int offset,
1493                             int len)
1494{
1495        uchar *src;
1496        uchar *dst;
1497
1498        dst = buffer;
1499        src = flash_map (info, 0, FLASH_OFFSET_USER_PROTECTION);
1500        flash_write_cmd (info, 0, 0, FLASH_CMD_READ_ID);
1501        memcpy (dst, src + offset, len);
1502        flash_write_cmd (info, 0, 0, info->cmd_reset);
1503        udelay(1);
1504        flash_unmap(info, 0, FLASH_OFFSET_USER_PROTECTION, src);
1505}
1506
1507/*
1508 * flash_read_factory_serial - read the device Id from the protection area
1509 */
1510void flash_read_factory_serial (flash_info_t * info, void *buffer, int offset,
1511                                int len)
1512{
1513        uchar *src;
1514
1515        src = flash_map (info, 0, FLASH_OFFSET_INTEL_PROTECTION);
1516        flash_write_cmd (info, 0, 0, FLASH_CMD_READ_ID);
1517        memcpy (buffer, src + offset, len);
1518        flash_write_cmd (info, 0, 0, info->cmd_reset);
1519        udelay(1);
1520        flash_unmap(info, 0, FLASH_OFFSET_INTEL_PROTECTION, src);
1521}
1522
1523#endif /* CONFIG_SYS_FLASH_PROTECTION */
1524
1525/*-----------------------------------------------------------------------
1526 * Reverse the order of the erase regions in the CFI QRY structure.
1527 * This is needed for chips that are either a) correctly detected as
1528 * top-boot, or b) buggy.
1529 */
1530static void cfi_reverse_geometry(struct cfi_qry *qry)
1531{
1532        unsigned int i, j;
1533        u32 tmp;
1534
1535        for (i = 0, j = qry->num_erase_regions - 1; i < j; i++, j--) {
1536                tmp = qry->erase_region_info[i];
1537                qry->erase_region_info[i] = qry->erase_region_info[j];
1538                qry->erase_region_info[j] = tmp;
1539        }
1540}
1541
1542/*-----------------------------------------------------------------------
1543 * read jedec ids from device and set corresponding fields in info struct
1544 *
1545 * Note: assume cfi->vendor, cfi->portwidth and cfi->chipwidth are correct
1546 *
1547 */
1548static void cmdset_intel_read_jedec_ids(flash_info_t *info)
1549{
1550        flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
1551        udelay(1);
1552        flash_write_cmd(info, 0, 0, FLASH_CMD_READ_ID);
1553        udelay(1000); /* some flash are slow to respond */
1554        info->manufacturer_id = flash_read_uchar (info,
1555                                        FLASH_OFFSET_MANUFACTURER_ID);
1556        info->device_id = (info->chipwidth == FLASH_CFI_16BIT) ?
1557                        flash_read_word (info, FLASH_OFFSET_DEVICE_ID) :
1558                        flash_read_uchar (info, FLASH_OFFSET_DEVICE_ID);
1559        flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
1560}
1561
1562static int cmdset_intel_init(flash_info_t *info, struct cfi_qry *qry)
1563{
1564        info->cmd_reset = FLASH_CMD_RESET;
1565
1566        cmdset_intel_read_jedec_ids(info);
1567        flash_write_cmd(info, 0, info->cfi_offset, FLASH_CMD_CFI);
1568
1569#ifdef CONFIG_SYS_FLASH_PROTECTION
1570        /* read legacy lock/unlock bit from intel flash */
1571        if (info->ext_addr) {
1572                info->legacy_unlock = flash_read_uchar (info,
1573                                info->ext_addr + 5) & 0x08;
1574        }
1575#endif
1576
1577        return 0;
1578}
1579
1580static void cmdset_amd_read_jedec_ids(flash_info_t *info)
1581{
1582        ushort bankId = 0;
1583        uchar  manuId;
1584
1585        flash_write_cmd(info, 0, 0, AMD_CMD_RESET);
1586        flash_unlock_seq(info, 0);
1587        flash_write_cmd(info, 0, info->addr_unlock1, FLASH_CMD_READ_ID);
1588        udelay(1000); /* some flash are slow to respond */
1589
1590        manuId = flash_read_uchar (info, FLASH_OFFSET_MANUFACTURER_ID);
1591        /* JEDEC JEP106Z specifies ID codes up to bank 7 */
1592        while (manuId == FLASH_CONTINUATION_CODE && bankId < 0x800) {
1593                bankId += 0x100;
1594                manuId = flash_read_uchar (info,
1595                        bankId | FLASH_OFFSET_MANUFACTURER_ID);
1596        }
1597        info->manufacturer_id = manuId;
1598
1599        switch (info->chipwidth){
1600        case FLASH_CFI_8BIT:
1601                info->device_id = flash_read_uchar (info,
1602                                                FLASH_OFFSET_DEVICE_ID);
1603                if (info->device_id == 0x7E) {
1604                        /* AMD 3-byte (expanded) device ids */
1605                        info->device_id2 = flash_read_uchar (info,
1606                                                FLASH_OFFSET_DEVICE_ID2);
1607                        info->device_id2 <<= 8;
1608                        info->device_id2 |= flash_read_uchar (info,
1609                                                FLASH_OFFSET_DEVICE_ID3);
1610                }
1611                break;
1612        case FLASH_CFI_16BIT:
1613                info->device_id = flash_read_word (info,
1614                                                FLASH_OFFSET_DEVICE_ID);
1615                if ((info->device_id & 0xff) == 0x7E) {
1616                        /* AMD 3-byte (expanded) device ids */
1617                        info->device_id2 = flash_read_uchar (info,
1618                                                FLASH_OFFSET_DEVICE_ID2);
1619                        info->device_id2 <<= 8;
1620                        info->device_id2 |= flash_read_uchar (info,
1621                                                FLASH_OFFSET_DEVICE_ID3);
1622                }
1623                break;
1624        default:
1625                break;
1626        }
1627        flash_write_cmd(info, 0, 0, AMD_CMD_RESET);
1628        udelay(1);
1629}
1630
1631static int cmdset_amd_init(flash_info_t *info, struct cfi_qry *qry)
1632{
1633        info->cmd_reset = AMD_CMD_RESET;
1634
1635        cmdset_amd_read_jedec_ids(info);
1636        flash_write_cmd(info, 0, info->cfi_offset, FLASH_CMD_CFI);
1637
1638        return 0;
1639}
1640
1641#ifdef CONFIG_FLASH_CFI_LEGACY
1642static void flash_read_jedec_ids (flash_info_t * info)
1643{
1644        info->manufacturer_id = 0;
1645        info->device_id       = 0;
1646        info->device_id2      = 0;
1647
1648        switch (info->vendor) {
1649        case CFI_CMDSET_INTEL_PROG_REGIONS:
1650        case CFI_CMDSET_INTEL_STANDARD:
1651        case CFI_CMDSET_INTEL_EXTENDED:
1652                cmdset_intel_read_jedec_ids(info);
1653                break;
1654        case CFI_CMDSET_AMD_STANDARD:
1655        case CFI_CMDSET_AMD_EXTENDED:
1656                cmdset_amd_read_jedec_ids(info);
1657                break;
1658        default:
1659                break;
1660        }
1661}
1662
1663/*-----------------------------------------------------------------------
1664 * Call board code to request info about non-CFI flash.
1665 * board_flash_get_legacy needs to fill in at least:
1666 * info->portwidth, info->chipwidth and info->interface for Jedec probing.
1667 */
1668static int flash_detect_legacy(phys_addr_t base, int banknum)
1669{
1670        flash_info_t *info = &flash_info[banknum];
1671
1672        if (board_flash_get_legacy(base, banknum, info)) {
1673                /* board code may have filled info completely. If not, we
1674                   use JEDEC ID probing. */
1675                if (!info->vendor) {
1676                        int modes[] = {
1677                                CFI_CMDSET_AMD_STANDARD,
1678                                CFI_CMDSET_INTEL_STANDARD
1679                        };
1680                        int i;
1681
1682                        for (i = 0; i < sizeof(modes) / sizeof(modes[0]); i++) {
1683                                info->vendor = modes[i];
1684                                info->start[0] =
1685                                        (ulong)map_physmem(base,
1686                                                           info->portwidth,
1687                                                           MAP_NOCACHE);
1688                                if (info->portwidth == FLASH_CFI_8BIT
1689                                        && info->interface == FLASH_CFI_X8X16) {
1690                                        info->addr_unlock1 = 0x2AAA;
1691                                        info->addr_unlock2 = 0x5555;
1692                                } else {
1693                                        info->addr_unlock1 = 0x5555;
1694                                        info->addr_unlock2 = 0x2AAA;
1695                                }
1696                                flash_read_jedec_ids(info);
1697                                debug("JEDEC PROBE: ID %x %x %x\n",
1698                                                info->manufacturer_id,
1699                                                info->device_id,
1700                                                info->device_id2);
1701                                if (jedec_flash_match(info, info->start[0]))
1702                                        break;
1703                                else
1704                                        unmap_physmem((void *)info->start[0],
1705                                                      MAP_NOCACHE);
1706                        }
1707                }
1708
1709                switch(info->vendor) {
1710                case CFI_CMDSET_INTEL_PROG_REGIONS:
1711                case CFI_CMDSET_INTEL_STANDARD:
1712                case CFI_CMDSET_INTEL_EXTENDED:
1713                        info->cmd_reset = FLASH_CMD_RESET;
1714                        break;
1715                case CFI_CMDSET_AMD_STANDARD:
1716                case CFI_CMDSET_AMD_EXTENDED:
1717                case CFI_CMDSET_AMD_LEGACY:
1718                        info->cmd_reset = AMD_CMD_RESET;
1719                        break;
1720                }
1721                info->flash_id = FLASH_MAN_CFI;
1722                return 1;
1723        }
1724        return 0; /* use CFI */
1725}
1726#else
1727static inline int flash_detect_legacy(phys_addr_t base, int banknum)
1728{
1729        return 0; /* use CFI */
1730}
1731#endif
1732
1733/*-----------------------------------------------------------------------
1734 * detect if flash is compatible with the Common Flash Interface (CFI)
1735 * http://www.jedec.org/download/search/jesd68.pdf
1736 */
1737static void flash_read_cfi (flash_info_t *info, void *buf,
1738                unsigned int start, size_t len)
1739{
1740        u8 *p = buf;
1741        unsigned int i;
1742
1743        for (i = 0; i < len; i++)
1744                p[i] = flash_read_uchar(info, start + i);
1745}
1746
1747void __flash_cmd_reset(flash_info_t *info)
1748{
1749        /*
1750         * We do not yet know what kind of commandset to use, so we issue
1751         * the reset command in both Intel and AMD variants, in the hope
1752         * that AMD flash roms ignore the Intel command.
1753         */
1754        flash_write_cmd(info, 0, 0, AMD_CMD_RESET);
1755        udelay(1);
1756        flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
1757}
1758void flash_cmd_reset(flash_info_t *info)
1759        __attribute__((weak,alias("__flash_cmd_reset")));
1760
1761static int __flash_detect_cfi (flash_info_t * info, struct cfi_qry *qry)
1762{
1763        int cfi_offset;
1764
1765        /* Issue FLASH reset command */
1766        flash_cmd_reset(info);
1767
1768        for (cfi_offset=0;
1769             cfi_offset < sizeof(flash_offset_cfi) / sizeof(uint);
1770             cfi_offset++) {
1771                flash_write_cmd (info, 0, flash_offset_cfi[cfi_offset],
1772                                 FLASH_CMD_CFI);
1773                if (flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP, 'Q')
1774                    && flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP + 1, 'R')
1775                    && flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP + 2, 'Y')) {
1776                        flash_read_cfi(info, qry, FLASH_OFFSET_CFI_RESP,
1777                                        sizeof(struct cfi_qry));
1778                        info->interface = le16_to_cpu(qry->interface_desc);
1779
1780                        info->cfi_offset = flash_offset_cfi[cfi_offset];
1781                        debug ("device interface is %d\n",
1782                               info->interface);
1783                        debug ("found port %d chip %d ",
1784                               info->portwidth, info->chipwidth);
1785                        debug ("port %d bits chip %d bits\n",
1786                               info->portwidth << CFI_FLASH_SHIFT_WIDTH,
1787                               info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
1788
1789                        /* calculate command offsets as in the Linux driver */
1790                        info->addr_unlock1 = 0x555;
1791                        info->addr_unlock2 = 0x2aa;
1792
1793                        /*
1794                         * modify the unlock address if we are
1795                         * in compatibility mode
1796                         */
1797                        if (    /* x8/x16 in x8 mode */
1798                                ((info->chipwidth == FLASH_CFI_BY8) &&
1799                                        (info->interface == FLASH_CFI_X8X16)) ||
1800                                /* x16/x32 in x16 mode */
1801                                ((info->chipwidth == FLASH_CFI_BY16) &&
1802                                        (info->interface == FLASH_CFI_X16X32)))
1803                        {
1804                                info->addr_unlock1 = 0xaaa;
1805                                info->addr_unlock2 = 0x555;
1806                        }
1807
1808                        info->name = "CFI conformant";
1809                        return 1;
1810                }
1811        }
1812
1813        return 0;
1814}
1815
1816static int flash_detect_cfi (flash_info_t * info, struct cfi_qry *qry)
1817{
1818        debug ("flash detect cfi\n");
1819
1820        for (info->portwidth = CONFIG_SYS_FLASH_CFI_WIDTH;
1821             info->portwidth <= FLASH_CFI_64BIT; info->portwidth <<= 1) {
1822                for (info->chipwidth = FLASH_CFI_BY8;
1823                     info->chipwidth <= info->portwidth;
1824                     info->chipwidth <<= 1)
1825                        if (__flash_detect_cfi(info, qry))
1826                                return 1;
1827        }
1828        debug ("not found\n");
1829        return 0;
1830}
1831
1832/*
1833 * Manufacturer-specific quirks. Add workarounds for geometry
1834 * reversal, etc. here.
1835 */
1836static void flash_fixup_amd(flash_info_t *info, struct cfi_qry *qry)
1837{
1838        /* check if flash geometry needs reversal */
1839        if (qry->num_erase_regions > 1) {
1840                /* reverse geometry if top boot part */
1841                if (info->cfi_version < 0x3131) {
1842                        /* CFI < 1.1, try to guess from device id */
1843                        if ((info->device_id & 0x80) != 0)
1844                                cfi_reverse_geometry(qry);
1845                } else if (flash_read_uchar(info, info->ext_addr + 0xf) == 3) {
1846                        /* CFI >= 1.1, deduct from top/bottom flag */
1847                        /* note: ext_addr is valid since cfi_version > 0 */
1848                        cfi_reverse_geometry(qry);
1849                }
1850        }
1851}
1852
1853static void flash_fixup_atmel(flash_info_t *info, struct cfi_qry *qry)
1854{
1855        int reverse_geometry = 0;
1856
1857        /* Check the "top boot" bit in the PRI */
1858        if (info->ext_addr && !(flash_read_uchar(info, info->ext_addr + 6) & 1))
1859                reverse_geometry = 1;
1860
1861        /* AT49BV6416(T) list the erase regions in the wrong order.
1862         * However, the device ID is identical with the non-broken
1863         * AT49BV642D they differ in the high byte.
1864         */
1865        if (info->device_id == 0xd6 || info->device_id == 0xd2)
1866                reverse_geometry = !reverse_geometry;
1867
1868        if (reverse_geometry)
1869                cfi_reverse_geometry(qry);
1870}
1871
1872static void flash_fixup_stm(flash_info_t *info, struct cfi_qry *qry)
1873{
1874        /* check if flash geometry needs reversal */
1875        if (qry->num_erase_regions > 1) {
1876                /* reverse geometry if top boot part */
1877                if (info->cfi_version < 0x3131) {
1878                        /* CFI < 1.1, guess by device id */
1879                        if (info->device_id == 0x22CA || /* M29W320DT */
1880                            info->device_id == 0x2256 || /* M29W320ET */
1881                            info->device_id == 0x22D7) { /* M29W800DT */
1882                                cfi_reverse_geometry(qry);
1883                        }
1884                } else if (flash_read_uchar(info, info->ext_addr + 0xf) == 3) {
1885                        /* CFI >= 1.1, deduct from top/bottom flag */
1886                        /* note: ext_addr is valid since cfi_version > 0 */
1887                        cfi_reverse_geometry(qry);
1888                }
1889        }
1890}
1891
1892/*
1893 * The following code cannot be run from FLASH!
1894 *
1895 */
1896ulong flash_get_size (phys_addr_t base, int banknum)
1897{
1898        flash_info_t *info = &flash_info[banknum];
1899        int i, j;
1900        flash_sect_t sect_cnt;
1901        phys_addr_t sector;
1902        unsigned long tmp;
1903        int size_ratio;
1904        uchar num_erase_regions;
1905        int erase_region_size;
1906        int erase_region_count;
1907        struct cfi_qry qry;
1908        unsigned long max_size;
1909
1910        memset(&qry, 0, sizeof(qry));
1911
1912        info->ext_addr = 0;
1913        info->cfi_version = 0;
1914#ifdef CONFIG_SYS_FLASH_PROTECTION
1915        info->legacy_unlock = 0;
1916#endif
1917
1918        info->start[0] = (ulong)map_physmem(base, info->portwidth, MAP_NOCACHE);
1919
1920        if (flash_detect_cfi (info, &qry)) {
1921                info->vendor = le16_to_cpu(qry.p_id);
1922                info->ext_addr = le16_to_cpu(qry.p_adr);
1923                num_erase_regions = qry.num_erase_regions;
1924
1925                if (info->ext_addr) {
1926                        info->cfi_version = (ushort) flash_read_uchar (info,
1927                                                info->ext_addr + 3) << 8;
1928                        info->cfi_version |= (ushort) flash_read_uchar (info,
1929                                                info->ext_addr + 4);
1930                }
1931
1932#ifdef DEBUG
1933                flash_printqry (&qry);
1934#endif
1935
1936                switch (info->vendor) {
1937                case CFI_CMDSET_INTEL_PROG_REGIONS:
1938                case CFI_CMDSET_INTEL_STANDARD:
1939                case CFI_CMDSET_INTEL_EXTENDED:
1940                        cmdset_intel_init(info, &qry);
1941                        break;
1942                case CFI_CMDSET_AMD_STANDARD:
1943                case CFI_CMDSET_AMD_EXTENDED:
1944                        cmdset_amd_init(info, &qry);
1945                        break;
1946                default:
1947                        printf("CFI: Unknown command set 0x%x\n",
1948                                        info->vendor);
1949                        /*
1950                         * Unfortunately, this means we don't know how
1951                         * to get the chip back to Read mode. Might
1952                         * as well try an Intel-style reset...
1953                         */
1954                        flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
1955                        return 0;
1956                }
1957
1958                /* Do manufacturer-specific fixups */
1959                switch (info->manufacturer_id) {
1960                case 0x0001: /* AMD */
1961                case 0x0037: /* AMIC */
1962                        flash_fixup_amd(info, &qry);
1963                        break;
1964                case 0x001f:
1965                        flash_fixup_atmel(info, &qry);
1966                        break;
1967                case 0x0020:
1968                        flash_fixup_stm(info, &qry);
1969                        break;
1970                }
1971
1972                debug ("manufacturer is %d\n", info->vendor);
1973                debug ("manufacturer id is 0x%x\n", info->manufacturer_id);
1974                debug ("device id is 0x%x\n", info->device_id);
1975                debug ("device id2 is 0x%x\n", info->device_id2);
1976                debug ("cfi version is 0x%04x\n", info->cfi_version);
1977
1978                size_ratio = info->portwidth / info->chipwidth;
1979                /* if the chip is x8/x16 reduce the ratio by half */
1980                if ((info->interface == FLASH_CFI_X8X16)
1981                    && (info->chipwidth == FLASH_CFI_BY8)) {
1982                        size_ratio >>= 1;
1983                }
1984                debug ("size_ratio %d port %d bits chip %d bits\n",
1985                       size_ratio, info->portwidth << CFI_FLASH_SHIFT_WIDTH,
1986                       info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
1987                info->size = 1 << qry.dev_size;
1988                /* multiply the size by the number of chips */
1989                info->size *= size_ratio;
1990                max_size = cfi_flash_bank_size(banknum);
1991                if (max_size && (info->size > max_size)) {
1992                        debug("[truncated from %ldMiB]", info->size >> 20);
1993                        info->size = max_size;
1994                }
1995                debug ("found %d erase regions\n", num_erase_regions);
1996                sect_cnt = 0;
1997                sector = base;
1998                for (i = 0; i < num_erase_regions; i++) {
1999                        if (i > NUM_ERASE_REGIONS) {
2000                                printf ("%d erase regions found, only %d used\n",
2001                                        num_erase_regions, NUM_ERASE_REGIONS);
2002                                break;
2003                        }
2004
2005                        tmp = le32_to_cpu(qry.erase_region_info[i]);
2006                        debug("erase region %u: 0x%08lx\n", i, tmp);
2007
2008                        erase_region_count = (tmp & 0xffff) + 1;
2009                        tmp >>= 16;
2010                        erase_region_size =
2011                                (tmp & 0xffff) ? ((tmp & 0xffff) * 256) : 128;
2012                        debug ("erase_region_count = %d erase_region_size = %d\n",
2013                                erase_region_count, erase_region_size);
2014                        for (j = 0; j < erase_region_count; j++) {
2015                                if (sector - base >= info->size)
2016                                        break;
2017                                if (sect_cnt >= CONFIG_SYS_MAX_FLASH_SECT) {
2018                                        printf("ERROR: too many flash sectors\n");
2019                                        break;
2020                                }
2021                                info->start[sect_cnt] =
2022                                        (ulong)map_physmem(sector,
2023                                                           info->portwidth,
2024                                                           MAP_NOCACHE);
2025                                sector += (erase_region_size * size_ratio);
2026
2027                                /*
2028                                 * Only read protection status from
2029                                 * supported devices (intel...)
2030                                 */
2031                                switch (info->vendor) {
2032                                case CFI_CMDSET_INTEL_PROG_REGIONS:
2033                                case CFI_CMDSET_INTEL_EXTENDED:
2034                                case CFI_CMDSET_INTEL_STANDARD:
2035                                        /*
2036                                         * Set flash to read-id mode. Otherwise
2037                                         * reading protected status is not
2038                                         * guaranteed.
2039                                         */
2040                                        flash_write_cmd(info, sect_cnt, 0,
2041                                                        FLASH_CMD_READ_ID);
2042                                        info->protect[sect_cnt] =
2043                                                flash_isset (info, sect_cnt,
2044                                                             FLASH_OFFSET_PROTECT,
2045                                                             FLASH_STATUS_PROTECT);
2046                                        break;
2047                                default:
2048                                        /* default: not protected */
2049                                        info->protect[sect_cnt] = 0;
2050                                }
2051
2052                                sect_cnt++;
2053                        }
2054                }
2055
2056                info->sector_count = sect_cnt;
2057                info->buffer_size = 1 << le16_to_cpu(qry.max_buf_write_size);
2058                tmp = 1 << qry.block_erase_timeout_typ;
2059                info->erase_blk_tout = tmp *
2060                        (1 << qry.block_erase_timeout_max);
2061                tmp = (1 << qry.buf_write_timeout_typ) *
2062                        (1 << qry.buf_write_timeout_max);
2063
2064                /* round up when converting to ms */
2065                info->buffer_write_tout = (tmp + 999) / 1000;
2066                tmp = (1 << qry.word_write_timeout_typ) *
2067                        (1 << qry.word_write_timeout_max);
2068                /* round up when converting to ms */
2069                info->write_tout = (tmp + 999) / 1000;
2070                info->flash_id = FLASH_MAN_CFI;
2071                if ((info->interface == FLASH_CFI_X8X16) &&
2072                    (info->chipwidth == FLASH_CFI_BY8)) {
2073                        /* XXX - Need to test on x8/x16 in parallel. */
2074                        info->portwidth >>= 1;
2075                }
2076
2077                flash_write_cmd (info, 0, 0, info->cmd_reset);
2078        }
2079
2080        return (info->size);
2081}
2082
2083#ifdef CONFIG_FLASH_CFI_MTD
2084void flash_set_verbose(uint v)
2085{
2086        flash_verbose = v;
2087}
2088#endif
2089
2090static void cfi_flash_set_config_reg(u32 base, u16 val)
2091{
2092#ifdef CONFIG_SYS_CFI_FLASH_CONFIG_REGS
2093        /*
2094         * Only set this config register if really defined
2095         * to a valid value (0xffff is invalid)
2096         */
2097        if (val == 0xffff)
2098                return;
2099
2100        /*
2101         * Set configuration register. Data is "encrypted" in the 16 lower
2102         * address bits.
2103         */
2104        flash_write16(FLASH_CMD_SETUP, (void *)(base + (val << 1)));
2105        flash_write16(FLASH_CMD_SET_CR_CONFIRM, (void *)(base + (val << 1)));
2106
2107        /*
2108         * Finally issue reset-command to bring device back to
2109         * read-array mode
2110         */
2111        flash_write16(FLASH_CMD_RESET, (void *)base);
2112#endif
2113}
2114
2115/*-----------------------------------------------------------------------
2116 */
2117
2118void flash_protect_default(void)
2119{
2120#if defined(CONFIG_SYS_FLASH_AUTOPROTECT_LIST)
2121        int i;
2122        struct apl_s {
2123                ulong start;
2124                ulong size;
2125        } apl[] = CONFIG_SYS_FLASH_AUTOPROTECT_LIST;
2126#endif
2127
2128        /* Monitor protection ON by default */
2129#if (CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH_BASE) && \
2130        (!defined(CONFIG_MONITOR_IS_IN_RAM))
2131        flash_protect(FLAG_PROTECT_SET,
2132                       CONFIG_SYS_MONITOR_BASE,
2133                       CONFIG_SYS_MONITOR_BASE + monitor_flash_len  - 1,
2134                       flash_get_info(CONFIG_SYS_MONITOR_BASE));
2135#endif
2136
2137        /* Environment protection ON by default */
2138#ifdef CONFIG_ENV_IS_IN_FLASH
2139        flash_protect(FLAG_PROTECT_SET,
2140                       CONFIG_ENV_ADDR,
2141                       CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE - 1,
2142                       flash_get_info(CONFIG_ENV_ADDR));
2143#endif
2144
2145        /* Redundant environment protection ON by default */
2146#ifdef CONFIG_ENV_ADDR_REDUND
2147        flash_protect(FLAG_PROTECT_SET,
2148                       CONFIG_ENV_ADDR_REDUND,
2149                       CONFIG_ENV_ADDR_REDUND + CONFIG_ENV_SECT_SIZE - 1,
2150                       flash_get_info(CONFIG_ENV_ADDR_REDUND));
2151#endif
2152
2153#if defined(CONFIG_SYS_FLASH_AUTOPROTECT_LIST)
2154        for (i = 0; i < (sizeof(apl) / sizeof(struct apl_s)); i++) {
2155                debug("autoprotecting from %08lx to %08lx\n",
2156                      apl[i].start, apl[i].start + apl[i].size - 1);
2157                flash_protect(FLAG_PROTECT_SET,
2158                               apl[i].start,
2159                               apl[i].start + apl[i].size - 1,
2160                               flash_get_info(apl[i].start));
2161        }
2162#endif
2163}
2164
2165unsigned long flash_init (void)
2166{
2167        unsigned long size = 0;
2168        int i;
2169
2170#ifdef CONFIG_SYS_FLASH_PROTECTION
2171        /* read environment from EEPROM */
2172        char s[64];
2173        getenv_f("unlock", s, sizeof(s));
2174#endif
2175
2176        /* Init: no FLASHes known */
2177        for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; ++i) {
2178                flash_info[i].flash_id = FLASH_UNKNOWN;
2179
2180                /* Optionally write flash configuration register */
2181                cfi_flash_set_config_reg(cfi_flash_bank_addr(i),
2182                                         cfi_flash_config_reg(i));
2183
2184                if (!flash_detect_legacy(cfi_flash_bank_addr(i), i))
2185                        flash_get_size(cfi_flash_bank_addr(i), i);
2186                size += flash_info[i].size;
2187                if (flash_info[i].flash_id == FLASH_UNKNOWN) {
2188#ifndef CONFIG_SYS_FLASH_QUIET_TEST
2189                        printf ("## Unknown flash on Bank %d "
2190                                "- Size = 0x%08lx = %ld MB\n",
2191                                i+1, flash_info[i].size,
2192                                flash_info[i].size >> 20);
2193#endif /* CONFIG_SYS_FLASH_QUIET_TEST */
2194                }
2195#ifdef CONFIG_SYS_FLASH_PROTECTION
2196                else if ((s != NULL) && (strcmp(s, "yes") == 0)) {
2197                        /*
2198                         * Only the U-Boot image and it's environment
2199                         * is protected, all other sectors are
2200                         * unprotected (unlocked) if flash hardware
2201                         * protection is used (CONFIG_SYS_FLASH_PROTECTION)
2202                         * and the environment variable "unlock" is
2203                         * set to "yes".
2204                         */
2205                        if (flash_info[i].legacy_unlock) {
2206                                int k;
2207
2208                                /*
2209                                 * Disable legacy_unlock temporarily,
2210                                 * since flash_real_protect would
2211                                 * relock all other sectors again
2212                                 * otherwise.
2213                                 */
2214                                flash_info[i].legacy_unlock = 0;
2215
2216                                /*
2217                                 * Legacy unlocking (e.g. Intel J3) ->
2218                                 * unlock only one sector. This will
2219                                 * unlock all sectors.
2220                                 */
2221                                flash_real_protect (&flash_info[i], 0, 0);
2222
2223                                flash_info[i].legacy_unlock = 1;
2224
2225                                /*
2226                                 * Manually mark other sectors as
2227                                 * unlocked (unprotected)
2228                                 */
2229                                for (k = 1; k < flash_info[i].sector_count; k++)
2230                                        flash_info[i].protect[k] = 0;
2231                        } else {
2232                                /*
2233                                 * No legancy unlocking -> unlock all sectors
2234                                 */
2235                                flash_protect (FLAG_PROTECT_CLEAR,
2236                                               flash_info[i].start[0],
2237                                               flash_info[i].start[0]
2238                                               + flash_info[i].size - 1,
2239                                               &flash_info[i]);
2240                        }
2241                }
2242#endif /* CONFIG_SYS_FLASH_PROTECTION */
2243        }
2244
2245        flash_protect_default();
2246#ifdef CONFIG_FLASH_CFI_MTD
2247        cfi_mtd_init();
2248#endif
2249
2250        return (size);
2251}
2252