LXR uboot/drivers/net/phy/mv88e61xx.h

   1/*
   2 * (C) Copyright 2009
   3 * Marvell Semiconductor <www.marvell.com>
   4 * Prafulla Wadaskar <prafulla@marvell.com>
   5 *
   6 * See file CREDITS for list of people who contributed to this
   7 * project.
   8 *
   9 * This program is free software; you can redistribute it and/or
  10 * modify it under the terms of the GNU General Public License as
  11 * published by the Free Software Foundation; either version 2 of
  12 * the License, or (at your option) any later version.
  13 *
  14 * This program is distributed in the hope that it will be useful,
  15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  17 * GNU General Public License for more details.
  18 *
  19 * You should have received a copy of the GNU General Public License
  20 * along with this program; if not, write to the Free Software
  21 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
  22 * MA 02110-1301 USA
  23 */
  24
  25#ifndef _MV88E61XX_H
  26#define _MV88E61XX_H
  27
  28#include <miiphy.h>
  29
  30#define MV88E61XX_CPU_PORT              0x5
  31#define MV88E61XX_MAX_PORTS_NUM         0x6
  32
  33#define MV88E61XX_PHY_TIMEOUT           100000
  34
  35#define MV88E61XX_PRT_STS_REG           0x1
  36#define MV88E61XX_PRT_CTRL_REG          0x4
  37#define MV88E61XX_PRT_VMAP_REG          0x6
  38#define MV88E61XX_PRT_VID_REG           0x7
  39
  40#define MV88E61XX_PRT_OFST              0x10
  41#define MV88E61XX_PHY_CMD               0x18
  42#define MV88E61XX_PHY_DATA              0x19
  43#define MV88E61XX_RGMII_TIMECTRL_REG    0x1A
  44#define MV88E61XX_GLB2REG_DEVADR        0x1C
  45
  46#define MV88E61XX_BUSY_OFST             15
  47#define MV88E61XX_MODE_OFST             12
  48#define MV88E61XX_OP_OFST                       10
  49#define MV88E61XX_ADDR_OFST             5
  50
  51#ifdef CONFIG_MV88E61XX_MULTICHIP_ADRMODE
  52static int mv88e61xx_busychk_multic(char *name, u32 devaddr);
  53static void mv88e61xx_wr_phy(char *name, u32 phy_adr, u32 reg_ofs, u16 data);
  54static void mv88e61xx_rd_phy(char *name, u32 phy_adr, u32 reg_ofs, u16 * data);
  55#define WR_PHY mv88e61xx_wr_phy
  56#define RD_PHY mv88e61xx_rd_phy
  57#else
  58#define WR_PHY miiphy_write
  59#define RD_PHY miiphy_read
  60#endif /* CONFIG_MV88E61XX_MULTICHIP_ADRMODE */
  61
  62#endif /* _MV88E61XX_H */
  63