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21#include <common.h>
22#include <watchdog.h>
23
24#include <asm/io.h>
25#include <asm/arch/clk.h>
26#include <asm/arch/hardware.h>
27
28#include "atmel_usart.h"
29
30DECLARE_GLOBAL_DATA_PTR;
31
32void serial_setbrg(void)
33{
34 atmel_usart3_t *usart = (atmel_usart3_t *)CONFIG_USART_BASE;
35 unsigned long divisor;
36 unsigned long usart_hz;
37
38
39
40
41
42
43 usart_hz = get_usart_clk_rate(CONFIG_USART_ID);
44 divisor = (usart_hz / 16 + gd->baudrate / 2) / gd->baudrate;
45 writel(USART3_BF(CD, divisor), &usart->brgr);
46}
47
48int serial_init(void)
49{
50 atmel_usart3_t *usart = (atmel_usart3_t *)CONFIG_USART_BASE;
51
52 writel(USART3_BIT(RSTRX) | USART3_BIT(RSTTX), &usart->cr);
53
54 serial_setbrg();
55
56 writel(USART3_BIT(RXEN) | USART3_BIT(TXEN), &usart->cr);
57 writel((USART3_BF(USART_MODE, USART3_USART_MODE_NORMAL)
58 | USART3_BF(USCLKS, USART3_USCLKS_MCK)
59 | USART3_BF(CHRL, USART3_CHRL_8)
60 | USART3_BF(PAR, USART3_PAR_NONE)
61 | USART3_BF(NBSTOP, USART3_NBSTOP_1)),
62 &usart->mr);
63
64 return 0;
65}
66
67void serial_putc(char c)
68{
69 atmel_usart3_t *usart = (atmel_usart3_t *)CONFIG_USART_BASE;
70
71 if (c == '\n')
72 serial_putc('\r');
73
74 while (!(readl(&usart->csr) & USART3_BIT(TXRDY)));
75 writel(c, &usart->thr);
76}
77
78void serial_puts(const char *s)
79{
80 while (*s)
81 serial_putc(*s++);
82}
83
84int serial_getc(void)
85{
86 atmel_usart3_t *usart = (atmel_usart3_t *)CONFIG_USART_BASE;
87
88 while (!(readl(&usart->csr) & USART3_BIT(RXRDY)))
89 WATCHDOG_RESET();
90 return readl(&usart->rhr);
91}
92
93int serial_tstc(void)
94{
95 atmel_usart3_t *usart = (atmel_usart3_t *)CONFIG_USART_BASE;
96 return (readl(&usart->csr) & USART3_BIT(RXRDY)) != 0;
97}
98