LXR uboot/include/configs/TB5200.h

   1/*
   2 * (C) Copyright 2003-2006
   3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
   4 *
   5 * (C) Copyright 2004-2006
   6 * Martin Krause, TQ-Systems GmbH, martin.krause@tqs.de
   7 *
   8 * See file CREDITS for list of people who contributed to this
   9 * project.
  10 *
  11 * This program is free software; you can redistribute it and/or
  12 * modify it under the terms of the GNU General Public License as
  13 * published by the Free Software Foundation; either version 2 of
  14 * the License, or (at your option) any later version.
  15 *
  16 * This program is distributed in the hope that it will be useful,
  17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
  18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  19 * GNU General Public License for more details.
  20 *
  21 * You should have received a copy of the GNU General Public License
  22 * along with this program; if not, write to the Free Software
  23 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  24 * MA 02111-1307 USA
  25 */
  26
  27#ifndef __CONFIG_H
  28#define __CONFIG_H
  29
  30/*
  31 * High Level Configuration Options
  32 * (easy to change)
  33 */
  34
  35#define CONFIG_MPC5xxx          1       /* This is an MPC5xxx CPU */
  36#define CONFIG_MPC5200          1       /* (more precisely an MPC5200 CPU) */
  37#define CONFIG_TQM5200          1       /* ... on TQM5200 module */
  38#define CONFIG_TB5200           1       /* ... on a TB5200 base board */
  39
  40/*
  41 * Valid values for CONFIG_SYS_TEXT_BASE are:
  42 * 0xFC000000   boot low (standard configuration with room for
  43 *              max 64 MByte Flash ROM)
  44 * 0xFFF00000   boot high (for a backup copy of U-Boot)
  45 * 0x00100000   boot from RAM (for testing only)
  46 */
  47#ifndef CONFIG_SYS_TEXT_BASE
  48#define CONFIG_SYS_TEXT_BASE    0xFC000000
  49#endif
  50
  51#define CONFIG_SYS_MPC5XXX_CLKIN        33000000 /* ... running at 33.000000MHz */
  52
  53#define CONFIG_HIGH_BATS        1       /* High BATs supported */
  54
  55/*
  56 * Serial console configuration
  57 */
  58#define CONFIG_PSC_CONSOLE      1       /* default console is on PSC1 */
  59#define CONFIG_SERIAL_MULTI     1       /* support multiple consoles */
  60#define CONFIG_PSC_CONSOLE2     6       /* second console is on PSC6 */
  61#define CONFIG_BAUDRATE         115200  /* ... at 115200 bps */
  62#define CONFIG_SYS_BAUDRATE_TABLE       { 9600, 19200, 38400, 57600, 115200, 230400 }
  63
  64/*
  65 * Video console
  66 */
  67#if 1
  68#define CONFIG_VIDEO
  69#define CONFIG_VIDEO_SM501
  70#define CONFIG_VIDEO_SM501_32BPP
  71#define CONFIG_CFB_CONSOLE
  72#define CONFIG_VIDEO_LOGO
  73#define CONFIG_VGA_AS_SINGLE_DEVICE
  74#define CONFIG_CONSOLE_EXTRA_INFO
  75#define CONFIG_VIDEO_SW_CURSOR
  76#define CONFIG_SPLASH_SCREEN
  77#define CONFIG_SYS_CONSOLE_IS_IN_ENV
  78#endif
  79
  80/* Partitions */
  81#define CONFIG_MAC_PARTITION
  82#define CONFIG_DOS_PARTITION
  83#define CONFIG_ISO_PARTITION
  84
  85/* USB */
  86#define CONFIG_USB_OHCI
  87#define CONFIG_USB_STORAGE
  88
  89/* POST support */
  90#define CONFIG_POST             (CONFIG_SYS_POST_MEMORY   | \
  91                                 CONFIG_SYS_POST_CPU       | \
  92                                 CONFIG_SYS_POST_I2C)
  93
  94#ifdef CONFIG_POST
  95/* preserve space for the post_word at end of on-chip SRAM */
  96#define MPC5XXX_SRAM_POST_SIZE MPC5XXX_SRAM_SIZE-4
  97#endif
  98
  99
 100/*
 101 * BOOTP options
 102 */
 103#define CONFIG_BOOTP_BOOTFILESIZE
 104#define CONFIG_BOOTP_BOOTPATH
 105#define CONFIG_BOOTP_GATEWAY
 106#define CONFIG_BOOTP_HOSTNAME
 107
 108
 109/*
 110 * Command line configuration.
 111 */
 112#include <config_cmd_default.h>
 113
 114#define CONFIG_CMD_ASKENV
 115#define CONFIG_CMD_DATE
 116#define CONFIG_CMD_DHCP
 117#define CONFIG_CMD_ECHO
 118#define CONFIG_CMD_EEPROM
 119#define CONFIG_CMD_EXT2
 120#define CONFIG_CMD_FAT
 121#define CONFIG_CMD_I2C
 122#define CONFIG_CMD_IDE
 123#define CONFIG_CMD_JFFS2
 124#define CONFIG_CMD_MII
 125#define CONFIG_CMD_NFS
 126#define CONFIG_CMD_PING
 127#define CONFIG_CMD_REGINFO
 128#define CONFIG_CMD_SNTP
 129#define CONFIG_CMD_BSP
 130#define CONFIG_CMD_USB
 131
 132#ifdef CONFIG_VIDEO
 133#define CONFIG_CMD_BMP
 134#endif
 135
 136#ifdef CONFIG_POST
 137#define CONFIG_CMD_DIAG
 138#endif
 139
 140
 141#define CONFIG_TIMESTAMP                /* display image timestamps */
 142
 143#if (CONFIG_SYS_TEXT_BASE == 0xFC000000)                /* Boot low */
 144#   define CONFIG_SYS_LOWBOOT           1
 145#endif
 146
 147/*
 148 * Autobooting
 149 */
 150#define CONFIG_BOOTDELAY        5       /* autoboot after 5 seconds */
 151
 152#define CONFIG_PREBOOT  "echo;" \
 153        "echo Type \\\"run flash_nfs\\\" to mount root filesystem over NFS;" \
 154        "echo"
 155
 156#undef  CONFIG_BOOTARGS
 157
 158#if defined(CONFIG_TQM5200_B)
 159#define CONFIG_EXTRA_ENV_SETTINGS                                       \
 160        "netdev=eth0\0"                                                 \
 161        "rootpath=/opt/eldk/ppc_6xx\0"                                  \
 162        "ramargs=setenv bootargs root=/dev/ram rw\0"                    \
 163        "nfsargs=setenv bootargs root=/dev/nfs rw "                     \
 164                "nfsroot=${serverip}:${rootpath}\0"                     \
 165        "addip=setenv bootargs ${bootargs} "                            \
 166                "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}"      \
 167                ":${hostname}:${netdev}:off panic=1\0"                  \
 168        "flash_self=run ramargs addip;"                                 \
 169                "bootm ${kernel_addr} ${ramdisk_addr}\0"                \
 170        "flash_nfs=run nfsargs addip;"                                  \
 171                "bootm ${kernel_addr}\0"                                \
 172        "net_nfs=tftp 200000 ${bootfile};run nfsargs addip;bootm\0"     \
 173        "bootfile=/tftpboot/tqm5200/uImage\0"                           \
 174        "load=tftp 200000 ${u-boot}\0"                                  \
 175        "u-boot=/tftpboot/tqm5200/u-boot.bin\0"                         \
 176        "update=protect off FC000000 FC07FFFF;"                         \
 177                "erase FC000000 FC07FFFF;"                              \
 178                "cp.b 200000 FC000000 ${filesize};"                     \
 179                "protect on FC000000 FC07FFFF\0"                        \
 180        ""
 181#else
 182#define CONFIG_EXTRA_ENV_SETTINGS                                       \
 183        "netdev=eth0\0"                                                 \
 184        "rootpath=/opt/eldk/ppc_6xx\0"                                  \
 185        "ramargs=setenv bootargs root=/dev/ram rw\0"                    \
 186        "nfsargs=setenv bootargs root=/dev/nfs rw "                     \
 187                "nfsroot=${serverip}:${rootpath}\0"                     \
 188        "addip=setenv bootargs ${bootargs} "                            \
 189                "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}"      \
 190                ":${hostname}:${netdev}:off panic=1\0"                  \
 191        "flash_self=run ramargs addip;"                                 \
 192                "bootm ${kernel_addr} ${ramdisk_addr}\0"                \
 193        "flash_nfs=run nfsargs addip;"                                  \
 194                "bootm ${kernel_addr}\0"                                \
 195        "net_nfs=tftp 200000 ${bootfile};run nfsargs addip;bootm\0"     \
 196        "bootfile=/tftpboot/tqm5200/uImage\0"                           \
 197        "load=tftp 200000 $(u-boot)\0"                                  \
 198        "u-boot=/tftpboot/tqm5200/u-boot.bin\0"                         \
 199        "update=protect off FC000000 FC05FFFF;"                         \
 200                "erase FC000000 FC05FFFF;"                              \
 201                "cp.b 200000 FC000000 ${filesize};"                     \
 202                "protect on FC000000 FC05FFFF\0"                        \
 203        ""
 204#endif /* CONFIG_TQM5200_B */
 205
 206#define CONFIG_BOOTCOMMAND      "run net_nfs"
 207
 208/*
 209 * IPB Bus clocking configuration.
 210 */
 211#define CONFIG_SYS_IPBCLK_EQUALS_XLBCLK         /* define for 133MHz speed */
 212
 213#if defined(CONFIG_SYS_IPBCLK_EQUALS_XLBCLK)
 214/*
 215 * PCI Bus clocking configuration
 216 *
 217 * Actually a PCI Clock of 66 MHz is only set (in cpu_init.c) if
 218 * CONFIG_SYS_IPBCLK_EQUALS_XLBCLK is defined. This is because a PCI Clock
 219 * of 66 MHz yet hasn't been tested with a IPB Bus Clock of 66 MHz.
 220 */
 221#define CONFIG_SYS_PCICLK_EQUALS_IPBCLK_DIV2            /* define for 66MHz speed */
 222#endif
 223
 224/*
 225 * I2C configuration
 226 */
 227#define CONFIG_HARD_I2C         1       /* I2C with hardware support */
 228#define CONFIG_SYS_I2C_MODULE           2       /* Select I2C module #2 */
 229
 230/*
 231 * I2C clock frequency
 232 *
 233 * Please notice, that the resulting clock frequency could differ from the
 234 * configured value. This is because the I2C clock is derived from system
 235 * clock over a frequency divider with only a few divider values. U-boot
 236 * calculates the best approximation for CONFIG_SYS_I2C_SPEED. However the calculated
 237 * approximation allways lies below the configured value, never above.
 238 */
 239#define CONFIG_SYS_I2C_SPEED            100000 /* 100 kHz */
 240#define CONFIG_SYS_I2C_SLAVE            0x7F
 241
 242/*
 243 * EEPROM configuration for onboard EEPROM M24C32 (M24C64 should work
 244 * also). For other EEPROMs configuration should be verified. On Mini-FAP the
 245 * EEPROM (24C64) is on the same I2C address (but on other I2C bus), so the
 246 * same configuration could be used.
 247 */
 248#define CONFIG_SYS_I2C_EEPROM_ADDR              0x50    /* 1010000x */
 249#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN          2
 250#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS       5       /* =32 Bytes per write */
 251#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS   20
 252
 253/* List of I2C addresses to be verified by POST */
 254#undef CONFIG_SYS_POST_I2C_ADDRS
 255#define CONFIG_SYS_POST_I2C_ADDRS       {CONFIG_SYS_I2C_EEPROM_ADDR,    \
 256                                         CONFIG_SYS_I2C_RTC_ADDR,       \
 257                                         CONFIG_SYS_I2C_SLAVE}
 258
 259/*
 260 * Flash configuration
 261 */
 262#define CONFIG_SYS_FLASH_BASE           CONFIG_SYS_TEXT_BASE /* 0xFC000000 */
 263
 264/* use CFI flash driver */
 265#define CONFIG_SYS_FLASH_CFI            1       /* Flash is CFI conformant */
 266#define CONFIG_FLASH_CFI_DRIVER 1       /* Use the common driver */
 267#define CONFIG_SYS_FLASH_BANKS_LIST     { CONFIG_SYS_BOOTCS_START }
 268#define CONFIG_SYS_FLASH_EMPTY_INFO
 269#define CONFIG_SYS_FLASH_SIZE           0x04000000 /* 64 MByte */
 270#define CONFIG_SYS_MAX_FLASH_SECT       512     /* max num of sects on one chip */
 271#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE       1
 272
 273#if !defined(CONFIG_SYS_LOWBOOT)
 274#define CONFIG_ENV_ADDR         (CONFIG_SYS_FLASH_BASE + 0x00760000 + 0x00800000)
 275#else   /* CONFIG_SYS_LOWBOOT */
 276#if defined(CONFIG_TQM5200_B)
 277#define CONFIG_ENV_ADDR         (CONFIG_SYS_FLASH_BASE + 0x00080000)
 278#else
 279#define CONFIG_ENV_ADDR         (CONFIG_SYS_FLASH_BASE + 0x00060000)
 280#endif /* CONFIG_TQM5200_B */
 281#endif  /* CONFIG_SYS_LOWBOOT */
 282#define CONFIG_SYS_MAX_FLASH_BANKS      1       /* max num of flash banks
 283                                           (= chip selects) */
 284
 285/* Dynamic MTD partition support */
 286#define CONFIG_CMD_MTDPARTS
 287#define CONFIG_MTD_DEVICE               /* needed for mtdparts commands */
 288#define CONFIG_FLASH_CFI_MTD
 289#define MTDIDS_DEFAULT          "nor0=TQM5200-0"
 290#if defined(CONFIG_TQM5200_B)
 291#define MTDPARTS_DEFAULT        "mtdparts=TQM5200-0:768k(firmware),"    \
 292                                                "1280k(kernel),"        \
 293                                                "2m(initrd),"           \
 294                                                "4m(small-fs),"         \
 295                                                "16m(big-fs),"          \
 296                                                "8m(misc)"
 297#else
 298#define MTDPARTS_DEFAULT        "mtdparts=TQM5200-0:640k(firmware),"    \
 299                                                "1408k(kernel),"        \
 300                                                "2m(initrd),"           \
 301                                                "4m(small-fs),"         \
 302                                                "16m(big-fs),"          \
 303                                                "8m(misc)"
 304#endif /* CONFIG_TQM5200_B */
 305
 306/*
 307 * Environment settings
 308 */
 309#define CONFIG_ENV_IS_IN_FLASH  1
 310#define CONFIG_ENV_SIZE         0x10000
 311#if defined(CONFIG_TQM5200_B)
 312#define CONFIG_ENV_SECT_SIZE    0x40000
 313#else
 314#define CONFIG_ENV_SECT_SIZE    0x20000
 315#define CONFIG_ENV_ADDR_REDUND  (CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE)
 316#define CONFIG_ENV_SIZE_REDUND  (CONFIG_ENV_SIZE)
 317#endif /* CONFIG_TQM5200_B */
 318
 319/*
 320 * Memory map
 321 */
 322#define CONFIG_SYS_MBAR         0xF0000000
 323#define CONFIG_SYS_SDRAM_BASE           0x00000000
 324#define CONFIG_SYS_DEFAULT_MBAR 0x80000000
 325
 326/* Use ON-Chip SRAM until RAM will be available */
 327#define CONFIG_SYS_INIT_RAM_ADDR        MPC5XXX_SRAM
 328#ifdef CONFIG_POST
 329/* preserve space for the post_word at end of on-chip SRAM */
 330#define CONFIG_SYS_INIT_RAM_SIZE        MPC5XXX_SRAM_POST_SIZE
 331#else
 332#define CONFIG_SYS_INIT_RAM_SIZE        MPC5XXX_SRAM_SIZE
 333#endif
 334
 335
 336#define CONFIG_SYS_GBL_DATA_OFFSET      (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
 337#define CONFIG_SYS_INIT_SP_OFFSET       CONFIG_SYS_GBL_DATA_OFFSET
 338
 339#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
 340#if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
 341#   define CONFIG_SYS_RAMBOOT           1
 342#endif
 343
 344#if defined(CONFIG_TQM5200_B)
 345#define CONFIG_SYS_MONITOR_LEN          (512 << 10)     /* Reserve 512 kB for Monitor   */
 346#else
 347#define CONFIG_SYS_MONITOR_LEN          (384 << 10)     /* Reserve 384 kB for Monitor   */
 348#endif /* CONFIG_TQM5200_B */
 349#define CONFIG_SYS_MALLOC_LEN           (1024 << 10)    /* Reserve 1024 kB for malloc() */
 350#define CONFIG_SYS_BOOTMAPSZ            (8 << 20)       /* Initial Memory map for Linux */
 351
 352/*
 353 * Ethernet configuration
 354 */
 355#define CONFIG_MPC5xxx_FEC      1
 356#define CONFIG_MPC5xxx_FEC_MII100
 357/*
 358 * Define CONFIG_MPC5xxx_FEC_MII10 to force FEC at 10Mb
 359 */
 360/* #define CONFIG_MPC5xxx_FEC_MII10 */
 361#define CONFIG_PHY_ADDR         0x00
 362
 363/*
 364 * GPIO configuration
 365 *
 366 * use pin gpio_wkup_6 as second SDRAM chip select (mem_cs1):
 367 *      Bit 0 (mask: 0x80000000): 1
 368 * use ALT CAN position: Bits 2-3 (mask: 0x30000000):
 369 *      00 -> No Alternatives, CAN1/2 on PSC2 according to PSC2 setting.
 370 *      01 -> CAN1 on I2C1, CAN2 on Tmr0/1.
 371 *            Use for REV200 STK52XX boards. Do not use with REV100 modules
 372 *            (because, there I2C1 is used as I2C bus)
 373 * use PSC1 as UART: Bits 28-31 (mask: 0x00000007): 0100
 374 * use PSC2 as CAN: Bits 25:27 (mask: 0x00000030)
 375 *      000 -> All PSC2 pins are GIOPs
 376 *      001 -> CAN1/2 on PSC2 pins
 377 *             Use for REV100 STK52xx boards
 378 * use PSC3: Bits 20:23 (mask: 0x00000300):
 379 *      0001 -> USB2
 380 *      0000 -> GPIO
 381 * use PSC6:
 382 *   on STK52xx:
 383 *      use as UART. Pins PSC6_0 to PSC6_3 are used.
 384 *      Bits 9:11 (mask: 0x00700000):
 385 *         101 -> PSC6 : Extended POST test is not available
 386 *   on MINI-FAP and TQM5200_IB:
 387 *      use PSC6_0 to PSC6_3 as GPIO: Bits 9:11 (mask: 0x00700000):
 388 *         000 -> PSC6 could not be used as UART, CODEC or IrDA
 389 *   GPIO on PSC6_3 is used in post_hotkeys_pressed() to enable extended POST
 390 *   tests.
 391 */
 392#define CONFIG_SYS_GPS_PORT_CONFIG      0x81500114
 393
 394/*
 395 * RTC configuration
 396 */
 397#define CONFIG_RTC_M41T11       1
 398#define CONFIG_SYS_I2C_RTC_ADDR 0x68
 399#define CONFIG_SYS_M41T11_BASE_YEAR     1900    /* because Linux uses the same base
 400                                           year */
 401
 402/*
 403 * Miscellaneous configurable options
 404 */
 405#define CONFIG_SYS_LONGHELP                     /* undef to save memory     */
 406#define CONFIG_SYS_PROMPT               "=> "   /* Monitor Command Prompt   */
 407#define CONFIG_CMDLINE_EDITING  1       /* add command line history */
 408#if defined(CONFIG_CMD_KGDB)
 409#define CONFIG_SYS_CBSIZE               1024    /* Console I/O Buffer Size  */
 410#else
 411#define CONFIG_SYS_CBSIZE               256     /* Console I/O Buffer Size  */
 412#endif
 413#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
 414#define CONFIG_SYS_MAXARGS              16      /* max number of command args   */
 415#define CONFIG_SYS_BARGSIZE             CONFIG_SYS_CBSIZE       /* Boot Argument Buffer Size    */
 416
 417#define CONFIG_SYS_CACHELINE_SIZE       32      /* For MPC5xxx CPUs */
 418#if defined(CONFIG_CMD_KGDB)
 419#  define CONFIG_SYS_CACHELINE_SHIFT    5       /* log base 2 of the above value */
 420#endif
 421
 422/* Enable an alternate, more extensive memory test */
 423#define CONFIG_SYS_ALT_MEMTEST
 424
 425#define CONFIG_SYS_MEMTEST_START        0x00100000      /* memtest works on */
 426#define CONFIG_SYS_MEMTEST_END          0x00f00000      /* 1 ... 15 MB in DRAM  */
 427
 428#define CONFIG_SYS_LOAD_ADDR            0x100000        /* default load address */
 429
 430#define CONFIG_SYS_HZ                   1000    /* decrementer freq: 1 ms ticks */
 431
 432/*
 433 * Enable loopw command.
 434 */
 435#define CONFIG_LOOPW
 436
 437/*
 438 * Various low-level settings
 439 */
 440#define CONFIG_SYS_HID0_INIT            HID0_ICE | HID0_ICFI
 441#define CONFIG_SYS_HID0_FINAL           HID0_ICE
 442
 443#define CONFIG_SYS_BOOTCS_START CONFIG_SYS_FLASH_BASE
 444#define CONFIG_SYS_BOOTCS_SIZE          CONFIG_SYS_FLASH_SIZE
 445#ifdef CONFIG_SYS_PCICLK_EQUALS_IPBCLK_DIV2
 446#define CONFIG_SYS_BOOTCS_CFG           0x0008DF30 /* for pci_clk  = 66 MHz */
 447#else
 448#define CONFIG_SYS_BOOTCS_CFG           0x0004DF30 /* for pci_clk = 33 MHz */
 449#endif
 450#define CONFIG_SYS_CS0_START            CONFIG_SYS_FLASH_BASE
 451#define CONFIG_SYS_CS0_SIZE             CONFIG_SYS_FLASH_SIZE
 452
 453#define CONFIG_LAST_STAGE_INIT
 454
 455/*
 456 * SRAM - Do not map below 2 GB in address space, because this area is used
 457 * for SDRAM autosizing.
 458 */
 459#define CONFIG_SYS_CS2_START            0xE5000000
 460#define CONFIG_SYS_CS2_SIZE             0x100000        /* 1 MByte */
 461#define CONFIG_SYS_CS2_CFG              0x0004D930
 462
 463/*
 464 * Grafic controller - Do not map below 2 GB in address space, because this
 465 * area is used for SDRAM autosizing.
 466 */
 467#define SM501_FB_BASE           0xE0000000
 468#define CONFIG_SYS_CS1_START            (SM501_FB_BASE)
 469#define CONFIG_SYS_CS1_SIZE             0x4000000       /* 64 MByte */
 470#define CONFIG_SYS_CS1_CFG              0x8F48FF70
 471#define SM501_MMIO_BASE         CONFIG_SYS_CS1_START + 0x03E00000
 472
 473#define CONFIG_SYS_CS_BURST             0x00000000
 474#define CONFIG_SYS_CS_DEADCYCLE 0x33333311      /* 1 dead cycle for flash and SM501 */
 475
 476#define CONFIG_SYS_RESET_ADDRESS        0xff000000
 477
 478/*-----------------------------------------------------------------------
 479 * USB stuff
 480 *-----------------------------------------------------------------------
 481 */
 482#define CONFIG_USB_CLOCK        0x0001BBBB
 483#define CONFIG_USB_CONFIG       0x00001000
 484
 485/*-----------------------------------------------------------------------
 486 * IDE/ATA stuff Supports IDE harddisk
 487 *-----------------------------------------------------------------------
 488 */
 489
 490#undef  CONFIG_IDE_8xx_PCCARD           /* Use IDE with PC Card Adapter */
 491
 492#undef  CONFIG_IDE_8xx_DIRECT           /* Direct IDE    not supported  */
 493#undef  CONFIG_IDE_LED                  /* LED   for ide not supported  */
 494
 495#define CONFIG_IDE_RESET                /* reset for ide supported      */
 496#define CONFIG_IDE_PREINIT
 497
 498#define CONFIG_SYS_IDE_MAXBUS           1       /* max. 1 IDE bus               */
 499#define CONFIG_SYS_IDE_MAXDEVICE        2       /* max. 2 drives per IDE bus    */
 500
 501#define CONFIG_SYS_ATA_IDE0_OFFSET      0x0000
 502
 503#define CONFIG_SYS_ATA_BASE_ADDR        MPC5XXX_ATA
 504
 505/* Offset for data I/O                  */
 506#define CONFIG_SYS_ATA_DATA_OFFSET      (0x0060)
 507
 508/* Offset for normal register accesses  */
 509#define CONFIG_SYS_ATA_REG_OFFSET       (CONFIG_SYS_ATA_DATA_OFFSET)
 510
 511/* Offset for alternate registers       */
 512#define CONFIG_SYS_ATA_ALT_OFFSET       (0x005C)
 513
 514/* Interval between registers                                                */
 515#define CONFIG_SYS_ATA_STRIDE           4
 516
 517#endif /* __CONFIG_H */
 518