LXR uboot/arch/powerpc/cpu/mpc5xx/start.S

   1/*
   2 *  Copyright (C) 1998  Dan Malek <dmalek@jlc.net>
   3 *  Copyright (C) 1999  Magnus Damm <kieraypc01.p.y.kie.era.ericsson.se>
   4 *  Copyright (C) 2000, 2001, 2002 Wolfgang Denk <wd@denx.de>
   5 *  Copyright (C) 2003  Martin Winistoerfer, martinwinistoerfer@gmx.ch.
   6 *
   7 * See file CREDITS for list of people who contributed to this
   8 * project.
   9 *
  10 * This program is free software; you can redistribute it and/or
  11 * modify it under the terms of the GNU General Public License as
  12 * published by the Free Software Foundation; either version 2 of
  13 * the License, or (at your option) any later version.
  14 *
  15 * This program is distributed in the hope that it will be useful,
  16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
  17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  18 * GNU General Public License for more details.
  19 *
  20 * You should have received a copy of the GNU General Public License
  21 * along with this program; if not, write to the Free Software
  22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  23 * MA 02111-1307 USA
  24 */
  25
  26/*
  27 * File:                start.S
  28 *
  29 * Discription:         startup code
  30 *
  31 */
  32
  33#include <asm-offsets.h>
  34#include <config.h>
  35#include <mpc5xx.h>
  36#include <version.h>
  37
  38#define CONFIG_5xx 1            /* needed for Linux kernel header files */
  39#define _LINUX_CONFIG_H 1       /* avoid reading Linux autoconf.h file  */
  40
  41#include <ppc_asm.tmpl>
  42#include <ppc_defs.h>
  43
  44#include <linux/config.h>
  45#include <asm/processor.h>
  46#include <asm/u-boot.h>
  47
  48/* We don't have a MMU.
  49*/
  50#undef  MSR_KERNEL
  51#define MSR_KERNEL ( MSR_ME | MSR_RI )          /* Machine Check and Recoverable Interr. */
  52
  53/*
  54 * Set up GOT: Global Offset Table
  55 *
  56 * Use r12 to access the GOT
  57 */
  58        START_GOT
  59        GOT_ENTRY(_GOT2_TABLE_)
  60        GOT_ENTRY(_FIXUP_TABLE_)
  61
  62        GOT_ENTRY(_start)
  63        GOT_ENTRY(_start_of_vectors)
  64        GOT_ENTRY(_end_of_vectors)
  65        GOT_ENTRY(transfer_to_handler)
  66
  67        GOT_ENTRY(__init_end)
  68        GOT_ENTRY(__bss_end__)
  69        GOT_ENTRY(__bss_start)
  70        END_GOT
  71
  72/*
  73 * r3 - 1st arg to board_init(): IMMP pointer
  74 * r4 - 2nd arg to board_init(): boot flag
  75 */
  76        .text
  77        .long   0x27051956                      /* U-Boot Magic Number */
  78        .globl  version_string
  79version_string:
  80        .ascii U_BOOT_VERSION_STRING, "\0"
  81
  82        . = EXC_OFF_SYS_RESET
  83        .globl  _start
  84_start:
  85        mfspr   r3, 638
  86        li      r4, CONFIG_SYS_ISB                      /* Set ISB bit */
  87        or      r3, r3, r4
  88        mtspr   638, r3
  89
  90        /* Initialize machine status; enable machine check interrupt            */
  91        /*----------------------------------------------------------------------*/
  92        li      r3, MSR_KERNEL                  /* Set ME, RI flags */
  93        mtmsr   r3
  94        mtspr   SRR1, r3                        /* Make SRR1 match MSR */
  95
  96        /* Initialize debug port registers                                      */
  97        /*----------------------------------------------------------------------*/
  98        xor     r0, r0, r0                      /* Clear R0 */
  99        mtspr   LCTRL1, r0                      /* Initialize debug port regs */
 100        mtspr   LCTRL2, r0
 101        mtspr   COUNTA, r0
 102        mtspr   COUNTB, r0
 103
 104#if defined(CONFIG_PATI)
 105        /* the external flash access on PATI fails if programming the PLL to 40MHz.
 106         * Copy the PLL programming code to the internal RAM and execute it
 107         *----------------------------------------------------------------------*/
 108        lis     r3, CONFIG_SYS_MONITOR_BASE@h
 109        ori     r3, r3, CONFIG_SYS_MONITOR_BASE@l
 110        addi    r3, r3, pll_prog_code_start - _start + EXC_OFF_SYS_RESET
 111
 112        lis     r4, CONFIG_SYS_INIT_RAM_ADDR@h
 113        ori     r4, r4, CONFIG_SYS_INIT_RAM_ADDR@l
 114        mtlr    r4
 115        addis   r5,0,0x0
 116        ori     r5,r5,((pll_prog_code_end - pll_prog_code_start) >>2)
 117        mtctr   r5
 118        addi    r3, r3, -4
 119        addi    r4, r4, -4
 1200:
 121        lwzu    r0,4(r3)
 122        stwu    r0,4(r4)
 123        bdnz    0b                /* copy loop */
 124        blrl
 125#endif
 126
 127        /*
 128         * Calculate absolute address in FLASH and jump there
 129         *----------------------------------------------------------------------*/
 130
 131        lis     r3, CONFIG_SYS_MONITOR_BASE@h
 132        ori     r3, r3, CONFIG_SYS_MONITOR_BASE@l
 133        addi    r3, r3, in_flash - _start + EXC_OFF_SYS_RESET
 134        mtlr    r3
 135        blr
 136
 137in_flash:
 138
 139        /* Initialize some SPRs that are hard to access from C                  */
 140        /*----------------------------------------------------------------------*/
 141
 142        lis     r3, CONFIG_SYS_IMMR@h                   /* Pass IMMR as arg1 to C routine */
 143        lis     r2, CONFIG_SYS_INIT_SP_ADDR@h
 144        ori     r1, r2, CONFIG_SYS_INIT_SP_ADDR@l       /* Set up the stack in internal SRAM */
 145        /* Note: R0 is still 0 here */
 146        stwu    r0, -4(r1)                      /* Clear final stack frame so that      */
 147        stwu    r0, -4(r1)                      /* stack backtraces terminate cleanly   */
 148
 149        /*
 150         * Disable serialized ifetch and show cycles
 151         * (i.e. set processor to normal mode) for maximum
 152         * performance.
 153         */
 154
 155        li      r2, 0x0007
 156        mtspr   ICTRL, r2
 157
 158        /* Set up debug mode entry */
 159
 160        lis     r2, CONFIG_SYS_DER@h
 161        ori     r2, r2, CONFIG_SYS_DER@l
 162        mtspr   DER, r2
 163
 164        /* Let the C-code set up the rest                                       */
 165        /*                                                                      */
 166        /* Be careful to keep code relocatable !                                */
 167        /*----------------------------------------------------------------------*/
 168
 169        GET_GOT                 /* initialize GOT access                        */
 170
 171        /* r3: IMMR */
 172        bl      cpu_init_f      /* run low-level CPU init code     (from Flash) */
 173
 174        bl      board_init_f    /* run 1st part of board init code (from Flash) */
 175
 176        /* NOTREACHED - board_init_f() does not return */
 177
 178
 179        .globl  _start_of_vectors
 180_start_of_vectors:
 181
 182/* Machine check */
 183        STD_EXCEPTION(0x200, MachineCheck, MachineCheckException)
 184
 185/* Data Storage exception.  "Never" generated on the 860. */
 186        STD_EXCEPTION(0x300, DataStorage, UnknownException)
 187
 188/* Instruction Storage exception.  "Never" generated on the 860. */
 189        STD_EXCEPTION(0x400, InstStorage, UnknownException)
 190
 191/* External Interrupt exception. */
 192        STD_EXCEPTION(0x500, ExtInterrupt, external_interrupt)
 193
 194/* Alignment exception. */
 195        . = 0x600
 196Alignment:
 197        EXCEPTION_PROLOG(SRR0, SRR1)
 198        mfspr   r4,DAR
 199        stw     r4,_DAR(r21)
 200        mfspr   r5,DSISR
 201        stw     r5,_DSISR(r21)
 202        addi    r3,r1,STACK_FRAME_OVERHEAD
 203        EXC_XFER_TEMPLATE(Alignment, AlignmentException, MSR_KERNEL, COPY_EE)
 204
 205/* Program check exception */
 206        . = 0x700
 207ProgramCheck:
 208        EXCEPTION_PROLOG(SRR0, SRR1)
 209        addi    r3,r1,STACK_FRAME_OVERHEAD
 210        EXC_XFER_TEMPLATE(ProgramCheck, ProgramCheckException,
 211                MSR_KERNEL, COPY_EE)
 212
 213        /* FPU on MPC5xx available. We will use it later.
 214        */
 215        STD_EXCEPTION(0x800, FPUnavailable, UnknownException)
 216
 217        /* I guess we could implement decrementer, and may have
 218         * to someday for timekeeping.
 219         */
 220        STD_EXCEPTION(0x900, Decrementer, timer_interrupt)
 221        STD_EXCEPTION(0xa00, Trap_0a, UnknownException)
 222        STD_EXCEPTION(0xb00, Trap_0b, UnknownException)
 223        STD_EXCEPTION(0xc00, SystemCall, UnknownException)
 224        STD_EXCEPTION(0xd00, SingleStep, UnknownException)
 225
 226        STD_EXCEPTION(0xe00, Trap_0e, UnknownException)
 227        STD_EXCEPTION(0xf00, Trap_0f, UnknownException)
 228
 229        /* On the MPC8xx, this is a software emulation interrupt.  It occurs
 230         * for all unimplemented and illegal instructions.
 231         */
 232        STD_EXCEPTION(0x1000, SoftEmu, SoftEmuException)
 233        STD_EXCEPTION(0x1100, InstructionTLBMiss, UnknownException)
 234        STD_EXCEPTION(0x1200, DataTLBMiss, UnknownException)
 235        STD_EXCEPTION(0x1300, InstructionTLBError, UnknownException)
 236        STD_EXCEPTION(0x1400, DataTLBError, UnknownException)
 237
 238        STD_EXCEPTION(0x1500, Reserved5, UnknownException)
 239        STD_EXCEPTION(0x1600, Reserved6, UnknownException)
 240        STD_EXCEPTION(0x1700, Reserved7, UnknownException)
 241        STD_EXCEPTION(0x1800, Reserved8, UnknownException)
 242        STD_EXCEPTION(0x1900, Reserved9, UnknownException)
 243        STD_EXCEPTION(0x1a00, ReservedA, UnknownException)
 244        STD_EXCEPTION(0x1b00, ReservedB, UnknownException)
 245
 246        STD_EXCEPTION(0x1c00, DataBreakpoint, UnknownException)
 247        STD_EXCEPTION(0x1d00, InstructionBreakpoint, DebugException)
 248        STD_EXCEPTION(0x1e00, PeripheralBreakpoint, UnknownException)
 249        STD_EXCEPTION(0x1f00, DevPortBreakpoint, UnknownException)
 250
 251
 252        .globl  _end_of_vectors
 253_end_of_vectors:
 254
 255
 256        . = 0x2000
 257
 258/*
 259 * This code finishes saving the registers to the exception frame
 260 * and jumps to the appropriate handler for the exception.
 261 * Register r21 is pointer into trap frame, r1 has new stack pointer.
 262 */
 263        .globl  transfer_to_handler
 264transfer_to_handler:
 265        stw     r22,_NIP(r21)
 266        lis     r22,MSR_POW@h
 267        andc    r23,r23,r22
 268        stw     r23,_MSR(r21)
 269        SAVE_GPR(7, r21)
 270        SAVE_4GPRS(8, r21)
 271        SAVE_8GPRS(12, r21)
 272        SAVE_8GPRS(24, r21)
 273        mflr    r23
 274        andi.   r24,r23,0x3f00          /* get vector offset */
 275        stw     r24,TRAP(r21)
 276        li      r22,0
 277        stw     r22,RESULT(r21)
 278        mtspr   SPRG2,r22               /* r1 is now kernel sp */
 279        lwz     r24,0(r23)              /* virtual address of handler */
 280        lwz     r23,4(r23)              /* where to go when done */
 281        mtspr   SRR0,r24
 282        mtspr   SRR1,r20
 283        mtlr    r23
 284        SYNC
 285        rfi                             /* jump to handler, enable MMU */
 286
 287int_return:
 288        mfmsr   r28                     /* Disable interrupts */
 289        li      r4,0
 290        ori     r4,r4,MSR_EE
 291        andc    r28,r28,r4
 292        SYNC                            /* Some chip revs need this... */
 293        mtmsr   r28
 294        SYNC
 295        lwz     r2,_CTR(r1)
 296        lwz     r0,_LINK(r1)
 297        mtctr   r2
 298        mtlr    r0
 299        lwz     r2,_XER(r1)
 300        lwz     r0,_CCR(r1)
 301        mtspr   XER,r2
 302        mtcrf   0xFF,r0
 303        REST_10GPRS(3, r1)
 304        REST_10GPRS(13, r1)
 305        REST_8GPRS(23, r1)
 306        REST_GPR(31, r1)
 307        lwz     r2,_NIP(r1)             /* Restore environment */
 308        lwz     r0,_MSR(r1)
 309        mtspr   SRR0,r2
 310        mtspr   SRR1,r0
 311        lwz     r0,GPR0(r1)
 312        lwz     r2,GPR2(r1)
 313        lwz     r1,GPR1(r1)
 314        SYNC
 315        rfi
 316
 317
 318/*
 319 * unsigned int get_immr (unsigned int mask)
 320 *
 321 * return (mask ? (IMMR & mask) : IMMR);
 322 */
 323        .globl  get_immr
 324get_immr:
 325        mr      r4,r3           /* save mask */
 326        mfspr   r3, IMMR        /* IMMR */
 327        cmpwi   0,r4,0          /* mask != 0 ? */
 328        beq     4f
 329        and     r3,r3,r4        /* IMMR & mask */
 3304:
 331        blr
 332
 333        .globl get_pvr
 334get_pvr:
 335        mfspr   r3, PVR
 336        blr
 337
 338
 339/*------------------------------------------------------------------------------*/
 340
 341/*
 342 * void relocate_code (addr_sp, gd, addr_moni)
 343 *
 344 * This "function" does not return, instead it continues in RAM
 345 * after relocating the monitor code.
 346 *
 347 * r3 = dest
 348 * r4 = src
 349 * r5 = length in bytes
 350 * r6 = cachelinesize
 351 */
 352        .globl  relocate_code
 353relocate_code:
 354        mr      r1,  r3         /* Set new stack pointer in SRAM        */
 355        mr      r9,  r4         /* Save copy of global data pointer in SRAM */
 356        mr      r10, r5         /* Save copy of monitor destination Address in SRAM */
 357
 358        GET_GOT
 359        mr      r3,  r5                         /* Destination Address  */
 360        lis     r4, CONFIG_SYS_MONITOR_BASE@h           /* Source      Address  */
 361        ori     r4, r4, CONFIG_SYS_MONITOR_BASE@l
 362        lwz     r5, GOT(__init_end)
 363        sub     r5, r5, r4
 364
 365        /*
 366         * Fix GOT pointer:
 367         *
 368         * New GOT-PTR = (old GOT-PTR - CONFIG_SYS_MONITOR_BASE) + Destination Address
 369         *
 370         * Offset:
 371         */
 372        sub     r15, r10, r4
 373
 374        /* First our own GOT */
 375        add     r12, r12, r15
 376        /* the the one used by the C code */
 377        add     r30, r30, r15
 378
 379        /*
 380         * Now relocate code
 381         */
 382
 383        cmplw   cr1,r3,r4
 384        addi    r0,r5,3
 385        srwi.   r0,r0,2
 386        beq     cr1,4f          /* In place copy is not necessary       */
 387        beq     4f              /* Protect against 0 count              */
 388        mtctr   r0
 389        bge     cr1,2f
 390
 391        la      r8,-4(r4)
 392        la      r7,-4(r3)
 3931:      lwzu    r0,4(r8)
 394        stwu    r0,4(r7)
 395        bdnz    1b
 396        b       4f
 397
 3982:      slwi    r0,r0,2
 399        add     r8,r4,r0
 400        add     r7,r3,r0
 4013:      lwzu    r0,-4(r8)
 402        stwu    r0,-4(r7)
 403        bdnz    3b
 404
 4054:      sync
 406        isync
 407
 408/*
 409 * We are done. Do not return, instead branch to second part of board
 410 * initialization, now running from RAM.
 411 */
 412
 413        addi    r0, r10, in_ram - _start + EXC_OFF_SYS_RESET
 414        mtlr    r0
 415        blr
 416
 417in_ram:
 418
 419        /*
 420         * Relocation Function, r12 point to got2+0x8000
 421         *
 422         * Adjust got2 pointers, no need to check for 0, this code
 423         * already puts a few entries in the table.
 424         */
 425        li      r0,__got2_entries@sectoff@l
 426        la      r3,GOT(_GOT2_TABLE_)
 427        lwz     r11,GOT(_GOT2_TABLE_)
 428        mtctr   r0
 429        sub     r11,r3,r11
 430        addi    r3,r3,-4
 4311:      lwzu    r0,4(r3)
 432        cmpwi   r0,0
 433        beq-    2f
 434        add     r0,r0,r11
 435        stw     r0,0(r3)
 4362:      bdnz    1b
 437
 438        /*
 439         * Now adjust the fixups and the pointers to the fixups
 440         * in case we need to move ourselves again.
 441         */
 442        li      r0,__fixup_entries@sectoff@l
 443        lwz     r3,GOT(_FIXUP_TABLE_)
 444        cmpwi   r0,0
 445        mtctr   r0
 446        addi    r3,r3,-4
 447        beq     4f
 4483:      lwzu    r4,4(r3)
 449        lwzux   r0,r4,r11
 450        cmpwi   r0,0
 451        add     r0,r0,r11
 452        stw     r4,0(r3)
 453        beq-    5f
 454        stw     r0,0(r4)
 4555:      bdnz    3b
 4564:
 457clear_bss:
 458        /*
 459         * Now clear BSS segment
 460         */
 461        lwz     r3,GOT(__bss_start)
 462        lwz     r4,GOT(__bss_end__)
 463        cmplw   0, r3, r4
 464        beq     6f
 465
 466        li      r0, 0
 4675:
 468        stw     r0, 0(r3)
 469        addi    r3, r3, 4
 470        cmplw   0, r3, r4
 471        bne     5b
 4726:
 473
 474        mr      r3, r9          /* Global Data pointer          */
 475        mr      r4, r10         /* Destination Address          */
 476        bl      board_init_r
 477
 478        /*
 479         * Copy exception vector code to low memory
 480         *
 481         * r3: dest_addr
 482         * r7: source address, r8: end address, r9: target address
 483         */
 484        .globl  trap_init
 485trap_init:
 486        mflr    r4                      /* save link register           */
 487        GET_GOT
 488        lwz     r7, GOT(_start)
 489        lwz     r8, GOT(_end_of_vectors)
 490
 491        li      r9, 0x100               /* reset vector always at 0x100 */
 492
 493        cmplw   0, r7, r8
 494        bgelr                           /* return if r7>=r8 - just in case */
 4951:
 496        lwz     r0, 0(r7)
 497        stw     r0, 0(r9)
 498        addi    r7, r7, 4
 499        addi    r9, r9, 4
 500        cmplw   0, r7, r8
 501        bne     1b
 502
 503        /*
 504         * relocate `hdlr' and `int_return' entries
 505         */
 506        li      r7, .L_MachineCheck - _start + EXC_OFF_SYS_RESET
 507        li      r8, Alignment - _start + EXC_OFF_SYS_RESET
 5082:
 509        bl      trap_reloc
 510        addi    r7, r7, 0x100           /* next exception vector        */
 511        cmplw   0, r7, r8
 512        blt     2b
 513
 514        li      r7, .L_Alignment - _start + EXC_OFF_SYS_RESET
 515        bl      trap_reloc
 516
 517        li      r7, .L_ProgramCheck - _start + EXC_OFF_SYS_RESET
 518        bl      trap_reloc
 519
 520        li      r7, .L_FPUnavailable - _start + EXC_OFF_SYS_RESET
 521        li      r8, SystemCall - _start + EXC_OFF_SYS_RESET
 5223:
 523        bl      trap_reloc
 524        addi    r7, r7, 0x100           /* next exception vector        */
 525        cmplw   0, r7, r8
 526        blt     3b
 527
 528        li      r7, .L_SingleStep - _start + EXC_OFF_SYS_RESET
 529        li      r8, _end_of_vectors - _start + EXC_OFF_SYS_RESET
 5304:
 531        bl      trap_reloc
 532        addi    r7, r7, 0x100           /* next exception vector        */
 533        cmplw   0, r7, r8
 534        blt     4b
 535
 536        mtlr    r4                      /* restore link register        */
 537        blr
 538
 539#if defined(CONFIG_PATI)
 540/* Program the PLL */
 541pll_prog_code_start:
 542        lis     r4, (CONFIG_SYS_IMMR + 0x002fc384)@h
 543        ori     r4, r4, (CONFIG_SYS_IMMR + 0x002fc384)@l
 544        lis     r3, (0x55ccaa33)@h
 545        ori     r3, r3, (0x55ccaa33)@l
 546        stw     r3, 0(r4)
 547        lis     r4, (CONFIG_SYS_IMMR + 0x002fc284)@h
 548        ori     r4, r4, (CONFIG_SYS_IMMR + 0x002fc284)@l
 549        lis     r3, CONFIG_SYS_PLPRCR@h
 550        ori     r3, r3, CONFIG_SYS_PLPRCR@l
 551        stw     r3, 0(r4)
 552        addis   r3,0,0x0
 553        ori     r3,r3,0xA000
 554        mtctr   r3
 555..spinlp:
 556  bdnz    ..spinlp                /* spin loop */
 557        blr
 558pll_prog_code_end:
 559        nop
 560        blr
 561#endif
 562