LXR uboot/board/davinci/dm365evm/dm365evm.c

   1/*
   2 * Copyright (C) 2009 Texas Instruments Incorporated
   3 *
   4 * This program is free software; you can redistribute it and/or modify
   5 * it under the terms of the GNU General Public License as published by
   6 * the Free Software Foundation; either version 2 of the License, or
   7 * (at your option) any later version.
   8 *
   9 * This program is distributed in the hope that it will be useful,
  10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  12 * GNU General Public License for more details.
  13 *
  14 * You should have received a copy of the GNU General Public License
  15 * along with this program; if not, write to the Free Software
  16 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  17 */
  18
  19#include <common.h>
  20#include <nand.h>
  21#include <asm/io.h>
  22#include <asm/arch/hardware.h>
  23#include <asm/arch/emif_defs.h>
  24#include <asm/arch/nand_defs.h>
  25#include <asm/arch/gpio.h>
  26#include <netdev.h>
  27#include <asm/arch/davinci_misc.h>
  28#ifdef CONFIG_DAVINCI_MMC
  29#include <mmc.h>
  30#include <asm/arch/sdmmc_defs.h>
  31#endif
  32
  33DECLARE_GLOBAL_DATA_PTR;
  34
  35int board_init(void)
  36{
  37        gd->bd->bi_arch_number = MACH_TYPE_DAVINCI_DM365_EVM;
  38        gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100;
  39
  40        return 0;
  41}
  42
  43#ifdef CONFIG_DRIVER_TI_EMAC
  44int board_eth_init(bd_t *bis)
  45{
  46        uint8_t eeprom_enetaddr[6];
  47        int i;
  48        struct davinci_gpio *gpio1_base =
  49                        (struct davinci_gpio *)DAVINCI_GPIO_BANK01;
  50
  51        /* Configure PINMUX 3 to enable EMAC pins */
  52        writel((readl(PINMUX3) | 0x1affff), PINMUX3);
  53
  54        /* Configure GPIO20 as output */
  55        writel((readl(&gpio1_base->dir) & ~(1 << 20)), &gpio1_base->dir);
  56
  57        /* Toggle GPIO 20 */
  58        for (i = 0; i < 20; i++) {
  59                /* GPIO 20 low */
  60                writel((readl(&gpio1_base->out_data) & ~(1 << 20)),
  61                                                &gpio1_base->out_data);
  62
  63                udelay(1000);
  64
  65                /* GPIO 20 high */
  66                writel((readl(&gpio1_base->out_data) | (1 << 20)),
  67                                                &gpio1_base->out_data);
  68        }
  69
  70        /* Configure I2C pins so that EEPROM can be read */
  71        writel((readl(PINMUX3) | 0x01400000), PINMUX3);
  72
  73        /* Read Ethernet MAC address from EEPROM */
  74        if (dvevm_read_mac_address(eeprom_enetaddr))
  75                davinci_sync_env_enetaddr(eeprom_enetaddr);
  76
  77        davinci_emac_initialize();
  78
  79        return 0;
  80}
  81#endif
  82
  83#ifdef CONFIG_NAND_DAVINCI
  84static void nand_dm365evm_select_chip(struct mtd_info *mtd, int chip)
  85{
  86        struct nand_chip        *this = mtd->priv;
  87        unsigned long           wbase = (unsigned long) this->IO_ADDR_W;
  88        unsigned long           rbase = (unsigned long) this->IO_ADDR_R;
  89
  90        if (chip == 1) {
  91                __set_bit(14, &wbase);
  92                __set_bit(14, &rbase);
  93        } else {
  94                __clear_bit(14, &wbase);
  95                __clear_bit(14, &rbase);
  96        }
  97        this->IO_ADDR_W = (void *)wbase;
  98        this->IO_ADDR_R = (void *)rbase;
  99}
 100
 101int board_nand_init(struct nand_chip *nand)
 102{
 103        davinci_nand_init(nand);
 104        nand->select_chip = nand_dm365evm_select_chip;
 105        return 0;
 106}
 107#endif
 108
 109#ifdef CONFIG_DAVINCI_MMC
 110static struct davinci_mmc mmc_sd0 = {
 111        .reg_base       = (struct davinci_mmc_regs *)DAVINCI_MMC_SD0_BASE,
 112        .input_clk      = 121500000,
 113        .host_caps      = MMC_MODE_4BIT,
 114        .voltages       = MMC_VDD_32_33 | MMC_VDD_33_34,
 115        .version        = MMC_CTLR_VERSION_2,
 116};
 117
 118#ifdef CONFIG_DAVINCI_MMC_SD1
 119static struct davinci_mmc mmc_sd1 = {
 120        .reg_base       = (struct davinci_mmc_regs *)DAVINCI_MMC_SD1_BASE,
 121        .input_clk      = 121500000,
 122        .host_caps      = MMC_MODE_4BIT,
 123        .voltages       = MMC_VDD_32_33 | MMC_VDD_33_34,
 124        .version        = MMC_CTLR_VERSION_2,
 125};
 126#endif
 127
 128int board_mmc_init(bd_t *bis)
 129{
 130        int err;
 131
 132        /* Add slot-0 to mmc subsystem */
 133        err = davinci_mmc_init(bis, &mmc_sd0);
 134        if (err)
 135                return err;
 136
 137#ifdef CONFIG_DAVINCI_MMC_SD1
 138#define PUPDCTL1                0x01c4007c
 139        /* PINMUX(4)-DAT0-3/CMD;  PINMUX(0)-CLK */
 140        writel((readl(PINMUX4) | 0x55400000), PINMUX4);
 141        writel((readl(PINMUX0) | 0x00010000), PINMUX0);
 142
 143        /* Configure MMC/SD pins as pullup */
 144        writel((readl(PUPDCTL1) & ~0x07c0), PUPDCTL1);
 145
 146        /* Add slot-1 to mmc subsystem */
 147        err = davinci_mmc_init(bis, &mmc_sd1);
 148#endif
 149
 150        return err;
 151}
 152#endif
 153