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28#ifndef __CONFIG_H
29#define __CONFIG_H
30
31
32
33
34
35
36#define CONFIG_405EP 1
37#define CONFIG_4xx 1
38#define CONFIG_G2000 1
39
40#define CONFIG_SYS_TEXT_BASE 0xFFFC0000
41
42#define CONFIG_BOARD_EARLY_INIT_F 1
43#define CONFIG_MISC_INIT_R 1
44
45#define CONFIG_SYS_CLK_FREQ 33333333
46
47#if 0
48#define CONFIG_BAUDRATE 115200
49#else
50#define CONFIG_BAUDRATE 9600
51#endif
52
53#define CONFIG_PREBOOT
54
55#undef CONFIG_BOOTARGS
56
57#define CONFIG_EXTRA_ENV_SETTINGS \
58 "nfsargs=setenv bootargs root=/dev/nfs rw " \
59 "nfsroot=${serverip}:${rootpath}\0" \
60 "ramargs=setenv bootargs root=/dev/ram rw\0" \
61 "addip=setenv bootargs ${bootargs} " \
62 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \
63 ":${hostname}:${netdev}:off\0" \
64 "addmisc=setenv bootargs ${bootargs} " \
65 "console=ttyS0,${baudrate} " \
66 "panic=1\0" \
67 "flash_nfs=run nfsargs addip addmisc;" \
68 "bootm ${kernel_addr}\0" \
69 "flash_self=run ramargs addip addmisc;" \
70 "bootm ${kernel_addr} ${ramdisk_addr}\0" \
71 "net_nfs=tftp 200000 ${bootfile};" \
72 "run nfsargs addip addmisc;bootm\0" \
73 "rootpath=/opt/eldk/ppc_4xx\0" \
74 "bootfile=/tftpboot/g2000/pImage\0" \
75 "kernel_addr=ff800000\0" \
76 "ramdisk_addr=ff900000\0" \
77 "pciconfighost=yes\0" \
78 ""
79#define CONFIG_BOOTCOMMAND "run net_nfs"
80
81#define CONFIG_SYS_LOADS_BAUD_CHANGE 1
82
83
84#define CONFIG_PPC4xx_EMAC
85#define CONFIG_MII 1
86#define CONFIG_PHY_ADDR 0
87#define CONFIG_PHY1_ADDR 1
88
89#if 0
90#define CONFIG_PHY_CLK_FREQ EMAC_STACR_CLK_66MHZ
91#endif
92
93
94
95
96
97#define CONFIG_BOOTP_BOOTFILESIZE
98#define CONFIG_BOOTP_BOOTPATH
99#define CONFIG_BOOTP_GATEWAY
100#define CONFIG_BOOTP_HOSTNAME
101
102
103
104
105
106#include <config_cmd_default.h>
107
108#define CONFIG_CMD_DHCP
109#define CONFIG_CMD_PCI
110#define CONFIG_CMD_IRQ
111#define CONFIG_CMD_ELF
112#define CONFIG_CMD_DATE
113#define CONFIG_CMD_I2C
114#define CONFIG_CMD_MII
115#define CONFIG_CMD_PING
116#define CONFIG_CMD_BSP
117#define CONFIG_CMD_EEPROM
118
119
120#undef CONFIG_WATCHDOG
121
122#if 0
123#define CONFIG_SDRAM_BANK0 1
124#endif
125
126
127
128
129#define CONFIG_SYS_LONGHELP
130#define CONFIG_SYS_PROMPT "=> "
131
132#undef CONFIG_SYS_HUSH_PARSER
133
134#if defined(CONFIG_CMD_KGDB)
135#define CONFIG_SYS_CBSIZE 1024
136#else
137#define CONFIG_SYS_CBSIZE 256
138#endif
139#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
140#define CONFIG_SYS_MAXARGS 16
141#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
142
143#define CONFIG_SYS_DEVICE_NULLDEV 1
144
145#define CONFIG_SYS_CONSOLE_INFO_QUIET 1
146
147#define CONFIG_AUTO_COMPLETE 1
148
149#define CONFIG_SYS_MEMTEST_START 0x0400000
150#define CONFIG_SYS_MEMTEST_END 0x0C00000
151
152#define CONFIG_CONS_INDEX 1
153#define CONFIG_SYS_NS16550
154#define CONFIG_SYS_NS16550_SERIAL
155#define CONFIG_SYS_NS16550_REG_SIZE 1
156#define CONFIG_SYS_NS16550_CLK get_serial_clock()
157
158#undef CONFIG_SYS_EXT_SERIAL_CLOCK
159#define CONFIG_SYS_BASE_BAUD 691200
160
161
162#define CONFIG_SYS_BAUDRATE_TABLE \
163 { 300, 600, 1200, 2400, 4800, 9600, 19200, 38400, \
164 57600, 115200, 230400, 460800, 921600 }
165
166#define CONFIG_SYS_LOAD_ADDR 0x100000
167#define CONFIG_SYS_EXTBDINFO 1
168
169#define CONFIG_SYS_HZ 1000
170
171#define CONFIG_ZERO_BOOTDELAY_CHECK
172#define CONFIG_BOOTDELAY 3
173
174#define CONFIG_VERSION_VARIABLE 1
175
176#define CONFIG_SYS_RX_ETH_BUFFER 16
177
178
179
180
181#define CONFIG_ETHADDR 00:11:0B:00:00:01
182#define CONFIG_HAS_ETH1
183#define CONFIG_ETH1ADDR 00:11:0B:00:00:02
184#define CONFIG_IPADDR 10.48.8.178
185#define CONFIG_IP1ADDR 10.48.8.188
186#define CONFIG_NETMASK 255.255.255.128
187#define CONFIG_SERVERIP 10.48.8.138
188
189
190
191
192
193#define CONFIG_RTC_DS1337
194#define CONFIG_SYS_I2C_RTC_ADDR 0x68
195
196#if 0
197
198
199
200
201#define CONFIG_SYS_MAX_NAND_DEVICE 1
202
203#define CONFIG_SYS_NAND_CE (0x80000000 >> 1)
204#define CONFIG_SYS_NAND_CLE (0x80000000 >> 2)
205#define CONFIG_SYS_NAND_ALE (0x80000000 >> 3)
206#define CONFIG_SYS_NAND_RDY (0x80000000 >> 4)
207
208#endif
209
210
211
212
213
214#define PCI_HOST_ADAPTER 0
215#define PCI_HOST_FORCE 1
216#define PCI_HOST_AUTO 2
217
218#define CONFIG_PCI
219#define CONFIG_PCI_HOST PCI_HOST_HOST
220#define CONFIG_PCI_PNP
221
222
223#define CONFIG_PCI_SCAN_SHOW
224
225#define CONFIG_PCI_CONFIG_HOST_BRIDGE 1
226
227#define CONFIG_SYS_PCI_SUBSYS_VENDORID 0x12FE
228#define CONFIG_SYS_PCI_SUBSYS_DEVICEID 0x0405
229#define CONFIG_SYS_PCI_CLASSCODE 0x0b20
230#define CONFIG_SYS_PCI_PTM1LA 0x00000000
231#define CONFIG_SYS_PCI_PTM1MS 0xfc000001
232#define CONFIG_SYS_PCI_PTM1PCI 0x00000000
233#define CONFIG_SYS_PCI_PTM2LA 0xffc00000
234#define CONFIG_SYS_PCI_PTM2MS 0xffc00001
235#define CONFIG_SYS_PCI_PTM2PCI 0x04000000
236
237
238
239
240
241
242#define CONFIG_SYS_BOOTMAPSZ (8 << 20)
243
244
245
246
247#if 0
248#define CONFIG_SYS_FLASH_CFI 1
249#define CONFIG_SYS_MAX_FLASH_SECT 128
250#define CONFIG_SYS_MAX_FLASH_BANKS 2
251#undef CONFIG_SYS_FLASH_PROTECTION
252#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1
253#define CONFIG_SYS_FLASH_BASE 0xFE000000
254#define CONFIG_SYS_FLASH_INCREMENT 0x01000000
255#else
256#define CONFIG_SYS_FLASH_CFI 1
257#define CONFIG_SYS_MAX_FLASH_SECT 128
258#define CONFIG_SYS_MAX_FLASH_BANKS 1
259#undef CONFIG_SYS_FLASH_PROTECTION
260#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1
261#define CONFIG_SYS_FLASH_BASE 0xFF800000
262#define CONFIG_SYS_FLASH_INCREMENT 0x01000000
263#endif
264
265#define CONFIG_SYS_FLASH_EMPTY_INFO
266
267#define CONFIG_SYS_JFFS2_FIRST_BANK 0
268#define CONFIG_SYS_JFFS2_NUM_BANKS 1
269
270
271
272
273
274
275#define CONFIG_SYS_SDRAM_BASE 0x00000000
276#define CONFIG_SYS_MONITOR_BASE 0xFFFC0000
277#define CONFIG_SYS_MONITOR_LEN (256 * 1024)
278#define CONFIG_SYS_MALLOC_LEN (256 * 1024)
279
280
281
282
283#if 1
284#define CONFIG_ENV_IS_IN_EEPROM 1
285#define CONFIG_ENV_OFFSET 0x100
286#define CONFIG_ENV_SIZE 0x700
287
288
289#else
290
291#define CONFIG_ENV_IS_IN_FLASH 1
292#define CONFIG_ENV_ADDR 0xFFFA0000
293#define CONFIG_ENV_SECT_SIZE 0x20000
294
295#endif
296
297
298
299
300#define CONFIG_HARD_I2C
301#define CONFIG_PPC4XX_I2C
302#define CONFIG_SYS_I2C_SPEED 400000
303#define CONFIG_SYS_I2C_SLAVE 0x7F
304
305#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50
306
307#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
308
309#define CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW 0x07
310#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 4
311
312
313#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10
314
315
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317
318
319
320#define CONFIG_SYS_EBC_PB0AP 0x92015480
321#define CONFIG_SYS_EBC_PB0CR 0xFF87A000
322
323
324
325
326#define CONFIG_SYS_EBC_PB1AP 0x00000000
327#define CONFIG_SYS_EBC_PB1CR 0x00000000
328
329
330#define CONFIG_SYS_EBC_PB2AP 0x00000000
331#define CONFIG_SYS_EBC_PB2CR 0x00000000
332
333
334#define CONFIG_SYS_EBC_PB3AP 0x92015480
335#define CONFIG_SYS_EBC_PB3CR 0xF40B8000
336
337
338#define CONFIG_SYS_EBC_PB4AP 0x00000000
339#define CONFIG_SYS_EBC_PB4CR 0x00000000
340
341#define CONFIG_SYS_NAND_BASE 0xF4000000
342
343
344
345
346
347#define CONFIG_SYS_TEMP_STACK_OCM 1
348
349
350#define CONFIG_SYS_OCM_DATA_ADDR 0xF8000000
351#define CONFIG_SYS_OCM_DATA_SIZE 0x1000
352#define CONFIG_SYS_INIT_RAM_ADDR CONFIG_SYS_OCM_DATA_ADDR
353#define CONFIG_SYS_INIT_RAM_SIZE CONFIG_SYS_OCM_DATA_SIZE
354
355#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
356#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
357
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370
371
372#define CONFIG_SYS_GPIO0_OSRL 0x40005555
373#define CONFIG_SYS_GPIO0_OSRH 0x40000110
374#define CONFIG_SYS_GPIO0_ISR1L 0x00000000
375#define CONFIG_SYS_GPIO0_ISR1H 0x15555445
376#define CONFIG_SYS_GPIO0_TSRL 0x00000000
377#define CONFIG_SYS_GPIO0_TSRH 0x00000000
378#define CONFIG_SYS_GPIO0_TCR 0xF7FF8014
379
380
381
382
383
384#if 1
385#define PLLMR0_DEFAULT PLLMR0_266_66_33_33
386#define PLLMR1_DEFAULT PLLMR1_266_66_33_33
387#endif
388#if 0
389#define PLLMR0_DEFAULT PLLMR0_266_133_66_33
390#define PLLMR1_DEFAULT PLLMR1_266_133_66_33
391#endif
392#if 0
393#define PLLMR0_DEFAULT PLLMR0_200_100_50_33
394#define PLLMR1_DEFAULT PLLMR1_200_100_50_33
395#endif
396#if 0
397#define PLLMR0_DEFAULT PLLMR0_133_66_66_33
398#define PLLMR1_DEFAULT PLLMR1_133_66_66_33
399#endif
400
401#endif
402