1/* 2 * (C) Copyright 2001 3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de. 4 * 5 * See file CREDITS for list of people who contributed to this 6 * project. 7 * 8 * This program is free software; you can redistribute it and/or 9 * modify it under the terms of the GNU General Public License as 10 * published by the Free Software Foundation; either version 2 of 11 * the License, or (at your option) any later version. 12 * 13 * This program is distributed in the hope that it will be useful, 14 * but WITHOUT ANY WARRANTY; without even the implied warranty of 15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 16 * GNU General Public License for more details. 17 * 18 * You should have received a copy of the GNU General Public License 19 * along with this program; if not, write to the Free Software 20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 21 * MA 02111-1307 USA 22 */ 23 24/* 25 * board/config.h - configuration options, board specific 26 */ 27 28#ifndef __CONFIG_H 29#define __CONFIG_H 30 31/*********************************************************** 32 * High Level Configuration Options 33 * (easy to change) 34 ***********************************************************/ 35#define CONFIG_405GP 1 /* This is a PPC405 CPU */ 36#define CONFIG_4xx 1 /* ...member of PPC4xx family */ 37#define CONFIG_PIP405 1 /* ...on a PIP405 board */ 38 39#define CONFIG_SYS_TEXT_BASE 0xFFF80000 40 41/*********************************************************** 42 * Clock 43 ***********************************************************/ 44#define CONFIG_SYS_CLK_FREQ 33000000 /* external frequency to pll */ 45 46 47/* 48 * BOOTP options 49 */ 50#define CONFIG_BOOTP_BOOTFILESIZE 51#define CONFIG_BOOTP_BOOTPATH 52#define CONFIG_BOOTP_GATEWAY 53#define CONFIG_BOOTP_HOSTNAME 54 55 56/* 57 * Command line configuration. 58 */ 59#include <config_cmd_default.h> 60 61#define CONFIG_CMD_IDE 62#define CONFIG_CMD_DHCP 63#define CONFIG_CMD_PCI 64#define CONFIG_CMD_CACHE 65#define CONFIG_CMD_IRQ 66#define CONFIG_CMD_EEPROM 67#define CONFIG_CMD_I2C 68#define CONFIG_CMD_REGINFO 69#define CONFIG_CMD_FDC 70#define CONFIG_CMD_SCSI 71#define CONFIG_CMD_FAT 72#define CONFIG_CMD_DATE 73#define CONFIG_CMD_ELF 74#define CONFIG_CMD_USB 75#define CONFIG_CMD_MII 76#define CONFIG_CMD_SDRAM 77#define CONFIG_CMD_PING 78#define CONFIG_CMD_SAVES 79#define CONFIG_CMD_BSP 80 81#define CONFIG_SYS_HUSH_PARSER 82/************************************************************** 83 * I2C Stuff: 84 * the PIP405 is equiped with an Atmel 24C128/256 EEPROM at address 85 * 0x53. 86 * Caution: on the same bus is the SPD (Serial Presens Detect 87 * EEPROM of the SDRAM 88 * The Atmel EEPROM uses 16Bit addressing. 89 ***************************************************************/ 90#define CONFIG_HARD_I2C /* I2c with hardware support */ 91#define CONFIG_PPC4XX_I2C /* use PPC4xx driver */ 92#define CONFIG_SYS_I2C_SPEED 50000 /* I2C speed and slave address */ 93#define CONFIG_SYS_I2C_SLAVE 0x7F 94 95#define CONFIG_SYS_I2C_EEPROM_ADDR 0x53 96#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2 97#define CONFIG_ENV_IS_IN_EEPROM 1 /* use EEPROM for environment vars */ 98#define CONFIG_ENV_OFFSET 0x000 /* environment starts at the beginning of the EEPROM */ 99#define CONFIG_ENV_SIZE 0x800 /* 2 kBytes may be used for env vars */ 100 101#undef CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW 102#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 6 /* The Atmel 24C128/256 has */ 103 /* 64 byte page write mode using*/ 104 /* last 6 bits of the address */ 105#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10 /* and takes up to 10 msec */ 106 107 108/*************************************************************** 109 * Definitions for Serial Presence Detect EEPROM address 110 * (to get SDRAM settings) 111 ***************************************************************/ 112#define SPD_EEPROM_ADDRESS 0x50 113 114#define CONFIG_BOARD_EARLY_INIT_F 115#define CONFIG_BOARD_EARLY_INIT_R 116 117/************************************************************** 118 * Environment definitions 119 **************************************************************/ 120#define CONFIG_BAUDRATE 9600 /* STD Baudrate */ 121 122 123#define CONFIG_BOOTDELAY 5 124/* autoboot (do NOT change this set environment variable "bootdelay" to -1 instead) */ 125/* #define CONFIG_BOOT_RETRY_TIME -10 /XXX* feature is available but not enabled */ 126#define CONFIG_ZERO_BOOTDELAY_CHECK /* check console even if bootdelay = 0 */ 127 128 129#define CONFIG_BOOTCOMMAND "diskboot 400000 0:1; bootm" /* autoboot command */ 130#define CONFIG_BOOTARGS "console=ttyS0,9600 root=/dev/hda5" /* boot arguments */ 131 132#define CONFIG_IPADDR 10.0.0.100 133#define CONFIG_SERVERIP 10.0.0.1 134#define CONFIG_PREBOOT 135/*************************************************************** 136 * defines if the console is stored in the environment 137 ***************************************************************/ 138#define CONFIG_SYS_CONSOLE_IS_IN_ENV /* stdin, stdout and stderr are in evironment */ 139/*************************************************************** 140 * defines if an overwrite_console function exists 141 *************************************************************/ 142#define CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE 143#define CONFIG_SYS_CONSOLE_INFO_QUIET 144/*************************************************************** 145 * defines if the overwrite_console should be stored in the 146 * environment 147 **************************************************************/ 148#undef CONFIG_SYS_CONSOLE_ENV_OVERWRITE 149 150/************************************************************** 151 * loads config 152 *************************************************************/ 153#define CONFIG_LOADS_ECHO 1 /* echo on for serial download */ 154#define CONFIG_SYS_LOADS_BAUD_CHANGE 1 /* allow baudrate change */ 155 156#define CONFIG_MISC_INIT_R 157/*********************************************************** 158 * Miscellaneous configurable options 159 **********************************************************/ 160#define CONFIG_SYS_LONGHELP /* undef to save memory */ 161#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */ 162#if defined(CONFIG_CMD_KGDB) 163#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ 164#else 165#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ 166#endif 167#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */ 168#define CONFIG_SYS_MAXARGS 16 /* max number of command args */ 169#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ 170 171#define CONFIG_SYS_MEMTEST_START 0x0100000 /* memtest works on */ 172#define CONFIG_SYS_MEMTEST_END 0x0C00000 /* 1 ... 12 MB in DRAM */ 173 174#define CONFIG_CONS_INDEX 1 /* Use UART0 */ 175#define CONFIG_SYS_NS16550 176#define CONFIG_SYS_NS16550_SERIAL 177#define CONFIG_SYS_NS16550_REG_SIZE 1 178#define CONFIG_SYS_NS16550_CLK get_serial_clock() 179 180#undef CONFIG_SYS_EXT_SERIAL_CLOCK /* no external serial clock used */ 181#define CONFIG_SYS_BASE_BAUD 691200 182 183/* The following table includes the supported baudrates */ 184#define CONFIG_SYS_BAUDRATE_TABLE \ 185 { 300, 600, 1200, 2400, 4800, 9600, 19200, 38400, \ 186 57600, 115200, 230400, 460800, 921600 } 187 188#define CONFIG_SYS_LOAD_ADDR 0x400000 /* default load address */ 189#define CONFIG_SYS_EXTBDINFO 1 /* To use extended board_into (bd_t) */ 190 191#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */ 192 193/*----------------------------------------------------------------------- 194 * PCI stuff 195 *----------------------------------------------------------------------- 196 */ 197#define PCI_HOST_ADAPTER 0 /* configure ar pci adapter */ 198#define PCI_HOST_FORCE 1 /* configure as pci host */ 199#define PCI_HOST_AUTO 2 /* detected via arbiter enable */ 200 201#define CONFIG_PCI /* include pci support */ 202#define CONFIG_PCI_HOST PCI_HOST_FORCE /* configure as pci-host */ 203#define CONFIG_PCI_PNP /* pci plug-and-play */ 204 /* resource configuration */ 205#define CONFIG_SYS_PCI_SUBSYS_VENDORID 0x0000 /* PCI Vendor ID: to-do!!! */ 206#define CONFIG_SYS_PCI_SUBSYS_DEVICEID 0x0000 /* PCI Device ID: to-do!!! */ 207#define CONFIG_SYS_PCI_PTM1LA 0x00000000 /* point to sdram */ 208#define CONFIG_SYS_PCI_PTM1MS 0x80000001 /* 2GB, enable hard-wired to 1 */ 209#define CONFIG_SYS_PCI_PTM1PCI 0x00000000 /* Host: use this pci address */ 210#define CONFIG_SYS_PCI_PTM2LA 0x00000000 /* disabled */ 211#define CONFIG_SYS_PCI_PTM2MS 0x00000000 /* disabled */ 212#define CONFIG_SYS_PCI_PTM2PCI 0x00000000 /* Host: use this pci address */ 213 214/*----------------------------------------------------------------------- 215 * Start addresses for the final memory configuration 216 * (Set up by the startup code) 217 * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0 218 */ 219#define CONFIG_SYS_SDRAM_BASE 0x00000000 220#define CONFIG_SYS_FLASH_BASE 0xFFF80000 221#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE 222#define CONFIG_SYS_MONITOR_LEN (512 * 1024) /* Reserve 512 kB for Monitor */ 223#define CONFIG_SYS_MALLOC_LEN (1024 * 1024) /* Reserve 1024 kB for malloc() */ 224 225/* 226 * For booting Linux, the board info and command line data 227 * have to be in the first 8 MB of memory, since this is 228 * the maximum mapped by the Linux kernel during initialization. 229 */ 230#define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */ 231/*----------------------------------------------------------------------- 232 * FLASH organization 233 */ 234#define CONFIG_SYS_UPDATE_FLASH_SIZE 235#define CONFIG_SYS_FLASH_PROTECTION 236#define CONFIG_SYS_FLASH_EMPTY_INFO 237 238#define CONFIG_SYS_FLASH_CFI 239#define CONFIG_FLASH_CFI_DRIVER 240 241#define CONFIG_FLASH_SHOW_PROGRESS 45 242 243#define CONFIG_SYS_MAX_FLASH_BANKS 1 244#define CONFIG_SYS_MAX_FLASH_SECT 256 245 246/* 247 * Init Memory Controller: 248 */ 249#define FLASH_MAX_SIZE 0x00800000 /* 8MByte max */ 250#define FLASH_BASE_PRELIM 0xFF800000 /* open the flash CS */ 251/* Size: 0=1MB, 1=2MB, 2=4MB, 3=8MB, 4=16MB, 5=32MB, 6=64MB, 7=128MB */ 252#define FLASH_SIZE_PRELIM 3 /* maximal flash FLASH size bank #0 */ 253 254#define CONFIG_BOARD_EARLY_INIT_F 255 256/* Configuration Port location */ 257#define CONFIG_PORT_ADDR 0xF4000000 258#define MULTI_PURPOSE_SOCKET_ADDR 0xF8000000 259 260 261/*----------------------------------------------------------------------- 262 * Definitions for initial stack pointer and data area (in On Chip SRAM) 263 */ 264#define CONFIG_SYS_TEMP_STACK_OCM 1 265#define CONFIG_SYS_OCM_DATA_ADDR 0xF0000000 266#define CONFIG_SYS_OCM_DATA_SIZE 0x1000 267#define CONFIG_SYS_INIT_RAM_ADDR CONFIG_SYS_OCM_DATA_ADDR /* inside of On Chip SRAM */ 268#define CONFIG_SYS_INIT_RAM_SIZE CONFIG_SYS_OCM_DATA_SIZE /* Size of On Chip SRAM */ 269#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) 270#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET 271 272/*********************************************************************** 273 * External peripheral base address 274 ***********************************************************************/ 275#define CONFIG_SYS_ISA_IO_BASE_ADDRESS 0xE8000000 276 277/*********************************************************************** 278 * Last Stage Init 279 ***********************************************************************/ 280#define CONFIG_LAST_STAGE_INIT 281/************************************************************ 282 * Ethernet Stuff 283 ***********************************************************/ 284#define CONFIG_PPC4xx_EMAC 285#define CONFIG_MII 1 /* MII PHY management */ 286#define CONFIG_PHY_ADDR 1 /* PHY address */ 287/************************************************************ 288 * RTC 289 ***********************************************************/ 290#define CONFIG_RTC_MC146818 291#undef CONFIG_WATCHDOG /* watchdog disabled */ 292 293/************************************************************ 294 * IDE/ATA stuff 295 ************************************************************/ 296#define CONFIG_SYS_IDE_MAXBUS 2 /* max. 2 IDE busses */ 297#define CONFIG_SYS_IDE_MAXDEVICE (CONFIG_SYS_IDE_MAXBUS*2) /* max. 2 drives per IDE bus */ 298 299#define CONFIG_SYS_ATA_BASE_ADDR CONFIG_SYS_ISA_IO_BASE_ADDRESS /* base address */ 300#define CONFIG_SYS_ATA_IDE0_OFFSET 0x01F0 /* ide0 offste */ 301#define CONFIG_SYS_ATA_IDE1_OFFSET 0x0170 /* ide1 offset */ 302#define CONFIG_SYS_ATA_DATA_OFFSET 0 /* data reg offset */ 303#define CONFIG_SYS_ATA_REG_OFFSET 0 /* reg offset */ 304#define CONFIG_SYS_ATA_ALT_OFFSET 0x200 /* alternate register offset */ 305 306#undef CONFIG_IDE_8xx_DIRECT /* no pcmcia interface required */ 307#undef CONFIG_IDE_LED /* no led for ide supported */ 308#define CONFIG_IDE_RESET /* reset for ide supported... */ 309#define CONFIG_IDE_RESET_ROUTINE /* with a special reset function */ 310#define CONFIG_SUPPORT_VFAT 311 312/************************************************************ 313 * ATAPI support (experimental) 314 ************************************************************/ 315#define CONFIG_ATAPI /* enable ATAPI Support */ 316 317/************************************************************ 318 * SCSI support (experimental) only SYM53C8xx supported 319 ************************************************************/ 320#define CONFIG_SCSI_SYM53C8XX 321#define CONFIG_SYS_SCSI_MAX_LUN 8 /* number of supported LUNs */ 322#define CONFIG_SYS_SCSI_MAX_SCSI_ID 7 /* maximum SCSI ID (0..6) */ 323#define CONFIG_SYS_SCSI_MAX_DEVICE CONFIG_SYS_SCSI_MAX_SCSI_ID * CONFIG_SYS_SCSI_MAX_LUN /* maximum Target devices */ 324#define CONFIG_SYS_SCSI_SPIN_UP_TIME 2 325 326/************************************************************ 327 * Disk-On-Chip configuration 328 ************************************************************/ 329#define CONFIG_SYS_MAX_DOC_DEVICE 1 /* Max number of DOC devices */ 330#define CONFIG_SYS_DOC_SHORT_TIMEOUT 331#define CONFIG_SYS_DOC_SUPPORT_2000 332#define CONFIG_SYS_DOC_SUPPORT_MILLENNIUM 333 334/************************************************************ 335 * DISK Partition support 336 ************************************************************/ 337#define CONFIG_DOS_PARTITION 338#define CONFIG_MAC_PARTITION 339#define CONFIG_ISO_PARTITION /* Experimental */ 340 341/************************************************************ 342 * Keyboard support 343 ************************************************************/ 344#define CONFIG_ISA_KEYBOARD 345 346/************************************************************ 347 * Video support 348 ************************************************************/ 349#define CONFIG_VIDEO /*To enable video controller support */ 350#define CONFIG_VIDEO_CT69000 351#define CONFIG_CFB_CONSOLE 352#define CONFIG_VIDEO_LOGO 353#define CONFIG_CONSOLE_EXTRA_INFO 354#define CONFIG_VGA_AS_SINGLE_DEVICE 355#define CONFIG_VIDEO_SW_CURSOR 356#define CONFIG_VIDEO_ONBOARD /* Video controller is on-board */ 357 358/************************************************************ 359 * USB support 360 ************************************************************/ 361#define CONFIG_USB_UHCI 362#define CONFIG_USB_KEYBOARD 363#define CONFIG_USB_STORAGE 364 365/* Enable needed helper functions */ 366#define CONFIG_SYS_STDIO_DEREGISTER /* needs stdio_deregister */ 367 368/************************************************************ 369 * Debug support 370 ************************************************************/ 371#if defined(CONFIG_CMD_KGDB) 372#define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ 373#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ 374#endif 375 376/************************************************************ 377 * support BZIP2 compression 378 ************************************************************/ 379#define CONFIG_BZIP2 1 380 381/************************************************************ 382 * Ident 383 ************************************************************/ 384#define VERSION_TAG "released" 385#define CONFIG_ISO_STRING "MEV-10066-001" 386#define CONFIG_IDENT_STRING "\n(c) 2002 by MPL AG Switzerland, " CONFIG_ISO_STRING " " VERSION_TAG 387 388 389#endif /* __CONFIG_H */ 390