1/* 2 * (C) Copyright 2003 3 * Texas Instruments. 4 * Kshitij Gupta <kshitij@ti.com> 5 * Configuation settings for the TI OMAP Innovator board. 6 * 7 * (C) Copyright 2004 8 * ARM Ltd. 9 * Philippe Robin, <philippe.robin@arm.com> 10 * Configuration for Versatile PB. 11 * 12 * See file CREDITS for list of people who contributed to this 13 * project. 14 * 15 * This program is free software; you can redistribute it and/or 16 * modify it under the terms of the GNU General Public License as 17 * published by the Free Software Foundation; either version 2 of 18 * the License, or (at your option) any later version. 19 * 20 * This program is distributed in the hope that it will be useful, 21 * but WITHOUT ANY WARRANTY; without even the implied warranty of 22 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 23 * GNU General Public License for more details. 24 * 25 * You should have received a copy of the GNU General Public License 26 * along with this program; if not, write to the Free Software 27 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 28 * MA 02111-1307 USA 29 */ 30 31#ifndef __CONFIG_H 32#define __CONFIG_H 33 34/* 35 * High Level Configuration Options 36 * (easy to change) 37 */ 38#define CONFIG_ARM926EJS 1 /* This is an arm926ejs CPU core */ 39#define CONFIG_VERSATILE 1 /* in Versatile Platform Board */ 40#define CONFIG_ARCH_VERSATILE 1 /* Specifically, a Versatile */ 41 42#define CONFIG_SYS_MEMTEST_START 0x100000 43#define CONFIG_SYS_MEMTEST_END 0x10000000 44#define CONFIG_SYS_HZ (1000000 / 256) 45#define CONFIG_SYS_TIMERBASE 0x101E2000 /* Timer 0 and 1 base */ 46 47#define CONFIG_SYS_TIMER_INTERVAL 10000 48#define CONFIG_SYS_TIMER_RELOAD (CONFIG_SYS_TIMER_INTERVAL >> 4) 49#define CONFIG_SYS_TIMER_CTRL 0x84 /* Enable, Clock / 16 */ 50 51/* 52 * control registers 53 */ 54#define VERSATILE_SCTL_BASE 0x101E0000 /* System controller */ 55 56/* 57 * System controller bit assignment 58 */ 59#define VERSATILE_REFCLK 0 60#define VERSATILE_TIMCLK 1 61 62#define VERSATILE_TIMER1_EnSel 15 63#define VERSATILE_TIMER2_EnSel 17 64#define VERSATILE_TIMER3_EnSel 19 65#define VERSATILE_TIMER4_EnSel 21 66 67#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ 68#define CONFIG_SETUP_MEMORY_TAGS 1 69#define CONFIG_MISC_INIT_R 1 70/* 71 * Size of malloc() pool 72 */ 73#define CONFIG_ENV_SIZE 8192 74#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128 * 1024) 75 76/* 77 * Hardware drivers 78 */ 79 80#define CONFIG_SMC91111 81#define CONFIG_SMC_USE_32_BIT 82#define CONFIG_SMC91111_BASE 0x10010000 83#undef CONFIG_SMC91111_EXT_PHY 84 85/* 86 * NS16550 Configuration 87 */ 88#define CONFIG_PL011_SERIAL 89#define CONFIG_PL011_CLOCK 24000000 90#define CONFIG_PL01x_PORTS \ 91 {(void *)CONFIG_SYS_SERIAL0, \ 92 (void *)CONFIG_SYS_SERIAL1 } 93#define CONFIG_CONS_INDEX 0 94 95#define CONFIG_BAUDRATE 38400 96#define CONFIG_SYS_SERIAL0 0x101F1000 97#define CONFIG_SYS_SERIAL1 0x101F2000 98 99/* 100 * Command line configuration. 101 */ 102#define CONFIG_CMD_BDI 103#define CONFIG_CMD_DHCP 104#define CONFIG_CMD_FLASH 105#define CONFIG_CMD_IMI 106#define CONFIG_CMD_MEMORY 107#define CONFIG_CMD_NET 108#define CONFIG_CMD_PING 109#define CONFIG_CMD_SAVEENV 110 111/* 112 * BOOTP options 113 */ 114#define CONFIG_BOOTP_BOOTPATH 115#define CONFIG_BOOTP_GATEWAY 116#define CONFIG_BOOTP_HOSTNAME 117#define CONFIG_BOOTP_SUBNETMASK 118 119#define CONFIG_BOOTDELAY 2 120#define CONFIG_BOOTARGS "root=/dev/nfs mem=128M ip=dhcp "\ 121 "netdev=25,0,0xf1010000,0xf1010010,eth0" 122 123/* 124 * Static configuration when assigning fixed address 125 */ 126#define CONFIG_BOOTFILE "/tftpboot/uImage" /* file to load */ 127 128/* 129 * Miscellaneous configurable options 130 */ 131#define CONFIG_SYS_LONGHELP /* undef to save memory */ 132#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ 133/* Monitor Command Prompt */ 134#ifdef CONFIG_ARCH_VERSATILE_AB 135# define CONFIG_SYS_PROMPT "VersatileAB # " 136#else 137# define CONFIG_SYS_PROMPT "VersatilePB # " 138#endif 139/* Print Buffer Size */ 140#define CONFIG_SYS_PBSIZE \ 141 (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) 142#define CONFIG_SYS_MAXARGS 16 /* max number of command args */ 143#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ 144 145#define CONFIG_SYS_LOAD_ADDR 0x7fc0 /* default load address */ 146 147/*----------------------------------------------------------------------- 148 * Stack sizes 149 * 150 * The stack sizes are set up in start.S using the settings below 151 */ 152#define CONFIG_STACKSIZE (128 * 1024) /* regular stack */ 153#ifdef CONFIG_USE_IRQ 154#define CONFIG_STACKSIZE_IRQ (4 * 1024) /* IRQ stack */ 155#define CONFIG_STACKSIZE_FIQ (4 * 1024) /* FIQ stack */ 156#endif 157 158/*----------------------------------------------------------------------- 159 * Physical Memory Map 160 */ 161#define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */ 162#define PHYS_SDRAM_1 0x00000000 /* SDRAM Bank #1 */ 163#define PHYS_SDRAM_1_SIZE 0x08000000 /* 128 MB */ 164#define PHYS_FLASH_SIZE 0x04000000 /* 64MB */ 165 166#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 167#define CONFIG_SYS_INIT_RAM_ADDR 0x00800000 168#define CONFIG_SYS_INIT_RAM_SIZE 0x000FFFFF 169#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - \ 170 GENERATED_GBL_DATA_SIZE) 171#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \ 172 CONFIG_SYS_GBL_DATA_OFFSET) 173 174#define CONFIG_BOARD_EARLY_INIT_F 175 176/*----------------------------------------------------------------------- 177 * FLASH and environment organization 178 */ 179#ifdef CONFIG_ARCH_VERSATILE_QEMU 180#define CONFIG_SYS_TEXT_BASE 0x10000 181#define CONFIG_SYS_NO_FLASH 182#define CONFIG_ENV_IS_NOWHERE 183#define CONFIG_SYS_MONITOR_LEN 0x80000 184#else 185#define CONFIG_SYS_TEXT_BASE 0x01000000 186/* 187 * Use the CFI flash driver for ease of use 188 */ 189#define CONFIG_SYS_FLASH_CFI 190#define CONFIG_FLASH_CFI_DRIVER 191#define CONFIG_ENV_IS_IN_FLASH 1 192/* 193 * System control register 194 */ 195#define VERSATILE_SYS_BASE 0x10000000 196#define VERSATILE_SYS_FLASH_OFFSET 0x4C 197#define VERSATILE_FLASHCTRL \ 198 (VERSATILE_SYS_BASE + VERSATILE_SYS_FLASH_OFFSET) 199/* Enable writing to flash */ 200#define VERSATILE_FLASHPROG_FLVPPEN (1 << 0) 201 202/* timeout values are in ticks */ 203#define CONFIG_SYS_FLASH_ERASE_TOUT (2 * CONFIG_SYS_HZ) /* Erase Timeout */ 204#define CONFIG_SYS_FLASH_WRITE_TOUT (2 * CONFIG_SYS_HZ) /* Write Timeout */ 205 206/* 207 * Note that CONFIG_SYS_MAX_FLASH_SECT allows for a parameter block 208 * i.e. 209 * the bottom "sector" (bottom boot), or top "sector" 210 * (top boot), is a seperate erase region divided into 211 * 4 (equal) smaller sectors. This, notionally, allows 212 * quicker erase/rewrire of the most frequently changed 213 * area...... 214 * CONFIG_SYS_MAX_FLASH_SECT is padded up to a multiple of 4 215 */ 216 217#ifdef CONFIG_ARCH_VERSATILE_AB 218#define FLASH_SECTOR_SIZE 0x00020000 /* 128 KB sectors */ 219#define CONFIG_ENV_SECT_SIZE (2 * FLASH_SECTOR_SIZE) 220#define CONFIG_SYS_MAX_FLASH_SECT (520) 221#endif 222 223#ifdef CONFIG_ARCH_VERSATILE_PB /* Versatile PB is default */ 224#define FLASH_SECTOR_SIZE 0x00040000 /* 256 KB sectors */ 225#define CONFIG_ENV_SECT_SIZE FLASH_SECTOR_SIZE 226#define CONFIG_SYS_MAX_FLASH_SECT (260) 227#endif 228 229#define CONFIG_SYS_FLASH_BASE 0x34000000 230#define CONFIG_SYS_MAX_FLASH_BANKS 1 231 232#define CONFIG_SYS_MONITOR_LEN (4 * CONFIG_ENV_SECT_SIZE) 233 234/* The ARM Boot Monitor is shipped in the lowest sector of flash */ 235 236#define FLASH_TOP (CONFIG_SYS_FLASH_BASE + PHYS_FLASH_SIZE) 237#define CONFIG_ENV_ADDR (FLASH_TOP - CONFIG_ENV_SECT_SIZE) 238#define CONFIG_ENV_OFFSET (CONFIG_ENV_ADDR - CONFIG_SYS_FLASH_BASE) 239#define CONFIG_SYS_MONITOR_BASE (CONFIG_ENV_ADDR - CONFIG_SYS_MONITOR_LEN) 240 241#define CONFIG_SYS_FLASH_PROTECTION /* The devices have real protection */ 242#define CONFIG_SYS_FLASH_EMPTY_INFO /* flinfo indicates empty blocks */ 243 244#endif 245 246#endif /* __CONFIG_H */ 247