LXR uboot/arch/arm/cpu/armv7/exynos/power.c

   1/*
   2 * Copyright (C) 2012 Samsung Electronics
   3 * Donghwa Lee <dh09.lee@samsung.com>
   4 *
   5 * See file CREDITS for list of people who contributed to this
   6 * project.
   7 *
   8 * This program is free software; you can redistribute it and/or
   9 * modify it under the terms of the GNU General Public License as
  10 * published by the Free Software Foundation; either version 2 of
  11 * the License, or (at your option) any later version.
  12 *
  13 * This program is distributed in the hope that it will be useful,
  14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16 * GNU General Public License for more details.
  17 *
  18 * You should have received a copy of the GNU General Public License
  19 * along with this program; if not, write to the Free Software
  20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  21 * MA 02111-1307 USA
  22 */
  23
  24#include <common.h>
  25#include <asm/io.h>
  26#include <asm/arch/power.h>
  27
  28static void exynos4_mipi_phy_control(unsigned int dev_index,
  29                                        unsigned int enable)
  30{
  31        struct exynos4_power *pmu =
  32            (struct exynos4_power *)samsung_get_base_power();
  33        unsigned int addr, cfg = 0;
  34
  35        if (dev_index == 0)
  36                addr = (unsigned int)&pmu->mipi_phy0_control;
  37        else
  38                addr = (unsigned int)&pmu->mipi_phy1_control;
  39
  40
  41        cfg = readl(addr);
  42        if (enable)
  43                cfg |= (EXYNOS_MIPI_PHY_MRESETN | EXYNOS_MIPI_PHY_ENABLE);
  44        else
  45                cfg &= ~(EXYNOS_MIPI_PHY_MRESETN | EXYNOS_MIPI_PHY_ENABLE);
  46
  47        writel(cfg, addr);
  48}
  49
  50void set_mipi_phy_ctrl(unsigned int dev_index, unsigned int enable)
  51{
  52        if (cpu_is_exynos4())
  53                exynos4_mipi_phy_control(dev_index, enable);
  54}
  55
  56void exynos5_set_usbhost_phy_ctrl(unsigned int enable)
  57{
  58        struct exynos5_power *power =
  59                (struct exynos5_power *)samsung_get_base_power();
  60
  61        if (enable) {
  62                /* Enabling USBHOST_PHY */
  63                setbits_le32(&power->usbhost_phy_control,
  64                                POWER_USB_HOST_PHY_CTRL_EN);
  65        } else {
  66                /* Disabling USBHOST_PHY */
  67                clrbits_le32(&power->usbhost_phy_control,
  68                                POWER_USB_HOST_PHY_CTRL_EN);
  69        }
  70}
  71
  72void set_usbhost_phy_ctrl(unsigned int enable)
  73{
  74        if (cpu_is_exynos5())
  75                exynos5_set_usbhost_phy_ctrl(enable);
  76}
  77
  78static void exynos5_dp_phy_control(unsigned int enable)
  79{
  80        unsigned int cfg;
  81        struct exynos5_power *power =
  82            (struct exynos5_power *)samsung_get_base_power();
  83
  84        cfg = readl(&power->dptx_phy_control);
  85        if (enable)
  86                cfg |= EXYNOS_DP_PHY_ENABLE;
  87        else
  88                cfg &= ~EXYNOS_DP_PHY_ENABLE;
  89
  90        writel(cfg, &power->dptx_phy_control);
  91}
  92
  93void set_dp_phy_ctrl(unsigned int enable)
  94{
  95        if (cpu_is_exynos5())
  96                exynos5_dp_phy_control(enable);
  97}
  98