LXR uboot/board/cogent/serial.h

   1/* Line Status Register bits */
   2#define LSR_DR          0x01    /* Data ready */
   3#define LSR_OE          0x02    /* Overrun */
   4#define LSR_PE          0x04    /* Parity error */
   5#define LSR_FE          0x08    /* Framing error */
   6#define LSR_BI          0x10    /* Break */
   7#define LSR_THRE        0x20    /* Xmit holding register empty */
   8#define LSR_TEMT        0x40    /* Xmitter empty */
   9#define LSR_ERR         0x80    /* Error */
  10
  11#define CLKRATE         3686400 /* cogent motherboard serial clk = 3.6864MHz */
  12#define DEFDIV          1       /* default to 230400 bps */
  13
  14#define br_to_div(br)   (CLKRATE / (16 * (br)))
  15#define div_to_br(div)  (CLKRATE / (16 * (div)))
  16