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27#include <common.h>
28#include <asm/processor.h>
29#include <command.h>
30#include <malloc.h>
31
32DECLARE_GLOBAL_DATA_PTR;
33
34
35
36int board_early_init_f (void)
37{
38 out32(GPIO0_OR, CONFIG_SYS_NAND0_CE);
39 out32(GPIO0_OR, CONFIG_SYS_NAND1_CE);
40
41
42
43
44
45
46
47
48
49
50
51
52
53 mtdcr(UIC0SR, 0xFFFFFFFF);
54 mtdcr(UIC0ER, 0x00000000);
55 mtdcr(UIC0CR, 0x00000000);
56 mtdcr(UIC0PR, 0xFFFFFF80);
57 mtdcr(UIC0TR, 0x10000000);
58 mtdcr(UIC0VCR, 0x00000001);
59 mtdcr(UIC0SR, 0xFFFFFFFF);
60
61
62
63
64#if 1
65 mtebc (EBC0_CFG, 0xa8400000);
66#else
67 mtebc (EBC0_CFG, 0x28400000);
68#endif
69 return 0;
70}
71
72
73
74int misc_init_f (void)
75{
76 return 0;
77}
78
79extern flash_info_t flash_info[];
80
81int misc_init_r (void)
82{
83
84 gd->bd->bi_flashstart = 0 - flash_info[0].size;
85 gd->bd->bi_flashoffset= flash_info[0].size - CONFIG_SYS_MONITOR_LEN;
86#if 0
87 volatile unsigned short *fpga_mode =
88 (unsigned short *)((ulong)CONFIG_SYS_FPGA_BASE_ADDR + CONFIG_SYS_FPGA_CTRL);
89 volatile unsigned char *duart0_mcr =
90 (unsigned char *)((ulong)DUART0_BA + 4);
91 volatile unsigned char *duart1_mcr =
92 (unsigned char *)((ulong)DUART1_BA + 4);
93
94 bd_t *bd = gd->bd;
95 char * tmp;
96 unsigned char *dst;
97 ulong len = sizeof(fpgadata);
98 int status;
99 int index;
100 int i;
101 unsigned long CPC0_CR0Reg;
102
103 dst = malloc(CONFIG_SYS_FPGA_MAX_SIZE);
104 if (gunzip (dst, CONFIG_SYS_FPGA_MAX_SIZE, (uchar *)fpgadata, &len) != 0) {
105 printf ("GUNZIP ERROR - must RESET board to recover\n");
106 do_reset (NULL, 0, 0, NULL);
107 }
108
109 status = fpga_boot(dst, len);
110 if (status != 0) {
111 printf("\nFPGA: Booting failed ");
112 switch (status) {
113 case ERROR_FPGA_PRG_INIT_LOW:
114 printf("(Timeout: INIT not low after asserting PROGRAM*)\n ");
115 break;
116 case ERROR_FPGA_PRG_INIT_HIGH:
117 printf("(Timeout: INIT not high after deasserting PROGRAM*)\n ");
118 break;
119 case ERROR_FPGA_PRG_DONE:
120 printf("(Timeout: DONE not high after programming FPGA)\n ");
121 break;
122 }
123
124
125 index = 15;
126 for (i=0; i<4; i++) {
127 len = dst[index];
128 printf("FPGA: %s\n", &(dst[index+1]));
129 index += len+3;
130 }
131 putc ('\n');
132
133 for (i=20; i>0; i--) {
134 printf("Rebooting in %2d seconds \r",i);
135 for (index=0;index<1000;index++)
136 udelay(1000);
137 }
138 putc ('\n');
139 do_reset(NULL, 0, 0, NULL);
140 }
141
142 puts("FPGA: ");
143
144
145 index = 15;
146 for (i=0; i<4; i++) {
147 len = dst[index];
148 printf("%s ", &(dst[index+1]));
149 index += len+3;
150 }
151 putc ('\n');
152
153 free(dst);
154
155
156
157
158 SET_FPGA(FPGA_PRG | FPGA_CLK);
159 udelay(1000);
160 SET_FPGA(FPGA_PRG | FPGA_CLK | FPGA_DATA);
161 udelay(1000);
162#endif
163
164#if 0
165
166
167
168 *fpga_mode |= CONFIG_SYS_FPGA_CTRL_PS2_RESET;
169
170
171
172
173 *duart0_mcr = 0x08;
174 *duart1_mcr = 0x08;
175#endif
176 return (0);
177}
178
179
180
181
182
183int checkboard (void)
184{
185 char str[64];
186 int i = getenv_f("serial#", str, sizeof(str));
187
188 puts ("Board: ");
189
190 if (i == -1) {
191 puts ("### No HW ID - assuming PPChameleonEVB");
192 } else {
193 puts(str);
194 }
195
196 putc ('\n');
197
198 return 0;
199}
200
201
202
203int testdram (void)
204{
205
206 printf ("test: 16 MB - ok\n");
207
208 return (0);
209}
210
211
212
213#ifdef CONFIG_CFB_CONSOLE
214# ifdef CONFIG_CONSOLE_EXTRA_INFO
215# include <video_fb.h>
216extern GraphicDevice smi;
217
218void video_get_info_str (int line_number, char *info)
219{
220 uint pvr = get_pvr ();
221
222
223 switch (line_number) {
224 case 1:
225 switch (pvr) {
226 case PVR_405EP_RB:
227 sprintf (info, " AMCC PowerPC 405EP Rev. B");
228 break;
229 default:
230 sprintf (info, " AMCC PowerPC 405EP Rev. <unknown>");
231 break;
232 }
233 return;
234 case 2:
235 sprintf (info, " DAVE Srl PPChameleonEVB - www.dave-tech.it");
236 return;
237 case 3:
238 sprintf (info, " %s", smi.modeIdent);
239 return;
240 }
241
242
243 *info = 0;
244 return;
245}
246# endif
247#endif
248