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24#include <common.h>
25#include <i2c.h>
26#include <asm/io.h>
27
28#include <gdsys_fpga.h>
29
30#define CH7301_I2C_ADDR 0x75
31
32#define ICS8N3QV01_I2C_ADDR 0x6E
33#define ICS8N3QV01_FREF 114285000
34#define ICS8N3QV01_FREF_LL 114285000LL
35#define ICS8N3QV01_F_DEFAULT_0 156250000LL
36#define ICS8N3QV01_F_DEFAULT_1 125000000LL
37#define ICS8N3QV01_F_DEFAULT_2 100000000LL
38#define ICS8N3QV01_F_DEFAULT_3 25175000LL
39
40#define SIL1178_MASTER_I2C_ADDRESS 0x38
41#define SIL1178_SLAVE_I2C_ADDRESS 0x39
42
43#define PIXCLK_640_480_60 25180000
44
45#define BASE_WIDTH 32
46#define BASE_HEIGHT 16
47#define BUFSIZE (BASE_WIDTH * BASE_HEIGHT)
48
49enum {
50 CH7301_CM = 0x1c,
51 CH7301_IC = 0x1d,
52 CH7301_GPIO = 0x1e,
53 CH7301_IDF = 0x1f,
54 CH7301_CD = 0x20,
55 CH7301_DC = 0x21,
56 CH7301_HPD = 0x23,
57 CH7301_TCTL = 0x31,
58 CH7301_TPCP = 0x33,
59 CH7301_TPD = 0x34,
60 CH7301_TPVT = 0x35,
61 CH7301_TPF = 0x36,
62 CH7301_TCT = 0x37,
63 CH7301_TSTP = 0x48,
64 CH7301_PM = 0x49,
65 CH7301_VID = 0x4a,
66 CH7301_DID = 0x4b,
67 CH7301_DSP = 0x56,
68};
69
70#if defined(CONFIG_SYS_ICS8N3QV01) || defined(CONFIG_SYS_SIL1178)
71static void fpga_iic_write(unsigned screen, u8 slave, u8 reg, u8 data)
72{
73 struct ihs_fpga *fpga = (struct ihs_fpga *)CONFIG_SYS_FPGA_BASE(screen);
74 struct ihs_i2c *i2c = &fpga->i2c;
75
76 while (in_le16(&fpga->extended_interrupt) & (1 << 12))
77 ;
78 out_le16(&i2c->write_mailbox_ext, reg | (data << 8));
79 out_le16(&i2c->write_mailbox, 0xc400 | (slave << 1));
80}
81
82static u8 fpga_iic_read(unsigned screen, u8 slave, u8 reg)
83{
84 struct ihs_fpga *fpga = (struct ihs_fpga *)CONFIG_SYS_FPGA_BASE(screen);
85 struct ihs_i2c *i2c = &fpga->i2c;
86 unsigned int ctr = 0;
87
88 while (in_le16(&fpga->extended_interrupt) & (1 << 12))
89 ;
90 out_le16(&fpga->extended_interrupt, 1 << 14);
91 out_le16(&i2c->write_mailbox_ext, reg);
92 out_le16(&i2c->write_mailbox, 0xc000 | (slave << 1));
93 while (!(in_le16(&fpga->extended_interrupt) & (1 << 14))) {
94 udelay(100000);
95 if (ctr++ > 5) {
96 printf("iic receive timeout\n");
97 break;
98 }
99 }
100 return in_le16(&i2c->read_mailbox_ext) >> 8;
101}
102#endif
103
104#ifdef CONFIG_SYS_MPC92469AC
105static void mpc92469ac_calc_parameters(unsigned int fout,
106 unsigned int *post_div, unsigned int *feedback_div)
107{
108 unsigned int n = *post_div;
109 unsigned int m = *feedback_div;
110 unsigned int a;
111 unsigned int b = 14745600 / 16;
112
113 if (fout < 50169600)
114 n = 8;
115 else if (fout < 100339199)
116 n = 4;
117 else if (fout < 200678399)
118 n = 2;
119 else
120 n = 1;
121
122 a = fout * n + (b / 2);
123
124 m = a / b;
125
126 *post_div = n;
127 *feedback_div = m;
128}
129
130static void mpc92469ac_set(unsigned screen, unsigned int fout)
131{
132 struct ihs_fpga *fpga = (struct ihs_fpga *)CONFIG_SYS_FPGA_BASE(screen);
133 unsigned int n;
134 unsigned int m;
135 unsigned int bitval = 0;
136 mpc92469ac_calc_parameters(fout, &n, &m);
137
138 switch (n) {
139 case 1:
140 bitval = 0x00;
141 break;
142 case 2:
143 bitval = 0x01;
144 break;
145 case 4:
146 bitval = 0x02;
147 break;
148 case 8:
149 bitval = 0x03;
150 break;
151 }
152
153 out_le16(&fpga->mpc3w_control, (bitval << 9) | m);
154}
155#endif
156
157#ifdef CONFIG_SYS_ICS8N3QV01
158
159static unsigned int ics8n3qv01_get_fout_calc(unsigned screen, unsigned index)
160{
161 unsigned long long n;
162 unsigned long long mint;
163 unsigned long long mfrac;
164 u8 reg_a, reg_b, reg_c, reg_d, reg_f;
165 unsigned long long fout_calc;
166
167 if (index > 3)
168 return 0;
169
170 reg_a = fpga_iic_read(screen, ICS8N3QV01_I2C_ADDR, 0 + index);
171 reg_b = fpga_iic_read(screen, ICS8N3QV01_I2C_ADDR, 4 + index);
172 reg_c = fpga_iic_read(screen, ICS8N3QV01_I2C_ADDR, 8 + index);
173 reg_d = fpga_iic_read(screen, ICS8N3QV01_I2C_ADDR, 12 + index);
174 reg_f = fpga_iic_read(screen, ICS8N3QV01_I2C_ADDR, 20 + index);
175
176 mint = ((reg_a >> 1) & 0x1f) | (reg_f & 0x20);
177 mfrac = ((reg_a & 0x01) << 17) | (reg_b << 9) | (reg_c << 1)
178 | (reg_d >> 7);
179 n = reg_d & 0x7f;
180
181 fout_calc = (mint * ICS8N3QV01_FREF_LL
182 + mfrac * ICS8N3QV01_FREF_LL / 262144LL
183 + ICS8N3QV01_FREF_LL / 524288LL
184 + n / 2)
185 / n
186 * 1000000
187 / (1000000 - 100);
188
189 return fout_calc;
190}
191
192
193static void ics8n3qv01_calc_parameters(unsigned int fout,
194 unsigned int *_mint, unsigned int *_mfrac,
195 unsigned int *_n)
196{
197 unsigned int n;
198 unsigned int foutiic;
199 unsigned int fvcoiic;
200 unsigned int mint;
201 unsigned long long mfrac;
202
203 n = (2215000000U + fout / 2) / fout;
204 if ((n & 1) && (n > 5))
205 n -= 1;
206
207 foutiic = fout - (fout / 10000);
208 fvcoiic = foutiic * n;
209
210 mint = fvcoiic / 114285000;
211 if ((mint < 17) || (mint > 63))
212 printf("ics8n3qv01_calc_parameters: cannot determine mint\n");
213
214 mfrac = ((unsigned long long)fvcoiic % 114285000LL) * 262144LL
215 / 114285000LL;
216
217 *_mint = mint;
218 *_mfrac = mfrac;
219 *_n = n;
220}
221
222static void ics8n3qv01_set(unsigned screen, unsigned int fout)
223{
224 unsigned int n;
225 unsigned int mint;
226 unsigned int mfrac;
227 unsigned int fout_calc;
228 unsigned long long fout_prog;
229 long long off_ppm;
230 u8 reg0, reg4, reg8, reg12, reg18, reg20;
231
232 fout_calc = ics8n3qv01_get_fout_calc(screen, 1);
233 off_ppm = (fout_calc - ICS8N3QV01_F_DEFAULT_1) * 1000000
234 / ICS8N3QV01_F_DEFAULT_1;
235 printf(" PLL is off by %lld ppm\n", off_ppm);
236 fout_prog = (unsigned long long)fout * (unsigned long long)fout_calc
237 / ICS8N3QV01_F_DEFAULT_1;
238 ics8n3qv01_calc_parameters(fout_prog, &mint, &mfrac, &n);
239
240 reg0 = fpga_iic_read(screen, ICS8N3QV01_I2C_ADDR, 0) & 0xc0;
241 reg0 |= (mint & 0x1f) << 1;
242 reg0 |= (mfrac >> 17) & 0x01;
243 fpga_iic_write(screen, ICS8N3QV01_I2C_ADDR, 0, reg0);
244
245 reg4 = mfrac >> 9;
246 fpga_iic_write(screen, ICS8N3QV01_I2C_ADDR, 4, reg4);
247
248 reg8 = mfrac >> 1;
249 fpga_iic_write(screen, ICS8N3QV01_I2C_ADDR, 8, reg8);
250
251 reg12 = mfrac << 7;
252 reg12 |= n & 0x7f;
253 fpga_iic_write(screen, ICS8N3QV01_I2C_ADDR, 12, reg12);
254
255 reg18 = fpga_iic_read(screen, ICS8N3QV01_I2C_ADDR, 18) & 0x03;
256 reg18 |= 0x20;
257 fpga_iic_write(screen, ICS8N3QV01_I2C_ADDR, 18, reg18);
258
259 reg20 = fpga_iic_read(screen, ICS8N3QV01_I2C_ADDR, 20) & 0x1f;
260 reg20 |= mint & (1 << 5);
261 fpga_iic_write(screen, ICS8N3QV01_I2C_ADDR, 20, reg20);
262}
263#endif
264
265static int osd_write_videomem(unsigned screen, unsigned offset,
266 u16 *data, size_t charcount)
267{
268 struct ihs_fpga *fpga =
269 (struct ihs_fpga *) CONFIG_SYS_FPGA_BASE(screen);
270 unsigned int k;
271
272 for (k = 0; k < charcount; ++k) {
273 if (offset + k >= BUFSIZE)
274 return -1;
275 out_le16(&fpga->videomem + offset + k, data[k]);
276 }
277
278 return charcount;
279}
280
281static int osd_print(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
282{
283 unsigned screen;
284
285 for (screen = 0; screen < CONFIG_SYS_OSD_SCREENS; ++screen) {
286 unsigned x;
287 unsigned y;
288 unsigned charcount;
289 unsigned len;
290 u8 color;
291 unsigned int k;
292 u16 buf[BUFSIZE];
293 char *text;
294 int res;
295
296 if (argc < 5) {
297 cmd_usage(cmdtp);
298 return 1;
299 }
300
301 x = simple_strtoul(argv[1], NULL, 16);
302 y = simple_strtoul(argv[2], NULL, 16);
303 color = simple_strtoul(argv[3], NULL, 16);
304 text = argv[4];
305 charcount = strlen(text);
306 len = (charcount > BUFSIZE) ? BUFSIZE : charcount;
307
308 for (k = 0; k < len; ++k)
309 buf[k] = (text[k] << 8) | color;
310
311 res = osd_write_videomem(screen, y * BASE_WIDTH + x, buf, len);
312 if (res < 0)
313 return res;
314 }
315
316 return 0;
317}
318
319int osd_probe(unsigned screen)
320{
321 struct ihs_fpga *fpga = (struct ihs_fpga *)CONFIG_SYS_FPGA_BASE(screen);
322 struct ihs_osd *osd = &fpga->osd;
323 u16 version = in_le16(&osd->version);
324 u16 features = in_le16(&osd->features);
325 unsigned width;
326 unsigned height;
327 u8 value;
328
329 width = ((features & 0x3f00) >> 8) + 1;
330 height = (features & 0x001f) + 1;
331
332 printf("OSD%d: Digital-OSD version %01d.%02d, %d" "x%d characters\n",
333 screen, version/100, version%100, width, height);
334
335#ifdef CONFIG_SYS_CH7301
336 value = i2c_reg_read(CH7301_I2C_ADDR, CH7301_DID);
337 if (value != 0x17) {
338 printf(" Probing CH7301 failed, DID %02x\n", value);
339 return -1;
340 }
341 i2c_reg_write(CH7301_I2C_ADDR, CH7301_TPCP, 0x08);
342 i2c_reg_write(CH7301_I2C_ADDR, CH7301_TPD, 0x16);
343 i2c_reg_write(CH7301_I2C_ADDR, CH7301_TPF, 0x60);
344 i2c_reg_write(CH7301_I2C_ADDR, CH7301_DC, 0x09);
345 i2c_reg_write(CH7301_I2C_ADDR, CH7301_PM, 0xc0);
346#endif
347
348#ifdef CONFIG_SYS_MPC92469AC
349 mpc92469ac_set(screen, PIXCLK_640_480_60);
350#endif
351
352#ifdef CONFIG_SYS_ICS8N3QV01
353 ics8n3qv01_set(screen, PIXCLK_640_480_60);
354#endif
355
356#ifdef CONFIG_SYS_SIL1178
357 value = fpga_iic_read(screen, SIL1178_SLAVE_I2C_ADDRESS, 0x02);
358 if (value != 0x06) {
359 printf(" Probing CH7301 SIL1178, DEV_IDL %02x\n", value);
360 return -1;
361 }
362
363 fpga_iic_write(screen, SIL1178_SLAVE_I2C_ADDRESS, 0x08, 0x36);
364 fpga_iic_write(screen, SIL1178_MASTER_I2C_ADDRESS, 0x0f, 0x44);
365 fpga_iic_write(screen, SIL1178_MASTER_I2C_ADDRESS, 0x0f, 0x4c);
366 fpga_iic_write(screen, SIL1178_MASTER_I2C_ADDRESS, 0x0e, 0x10);
367 fpga_iic_write(screen, SIL1178_MASTER_I2C_ADDRESS, 0x0a, 0x80);
368 fpga_iic_write(screen, SIL1178_MASTER_I2C_ADDRESS, 0x09, 0x30);
369 fpga_iic_write(screen, SIL1178_MASTER_I2C_ADDRESS, 0x0c, 0x89);
370 fpga_iic_write(screen, SIL1178_MASTER_I2C_ADDRESS, 0x0d, 0x60);
371 fpga_iic_write(screen, SIL1178_MASTER_I2C_ADDRESS, 0x08, 0x36);
372 fpga_iic_write(screen, SIL1178_MASTER_I2C_ADDRESS, 0x08, 0x37);
373#endif
374
375 out_le16(&fpga->videocontrol, 0x0002);
376 out_le16(&osd->control, 0x0049);
377
378 out_le16(&osd->xy_size, ((32 - 1) << 8) | (16 - 1));
379 out_le16(&osd->x_pos, 0x007f);
380 out_le16(&osd->y_pos, 0x005f);
381
382 return 0;
383}
384
385int osd_write(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
386{
387 unsigned screen;
388
389 for (screen = 0; screen < CONFIG_SYS_OSD_SCREENS; ++screen) {
390 unsigned x;
391 unsigned y;
392 unsigned k;
393 u16 buffer[BASE_WIDTH];
394 char *rp;
395 u16 *wp = buffer;
396 unsigned count = (argc > 4) ?
397 simple_strtoul(argv[4], NULL, 16) : 1;
398
399 if ((argc < 4) || (strlen(argv[3]) % 4)) {
400 cmd_usage(cmdtp);
401 return 1;
402 }
403
404 x = simple_strtoul(argv[1], NULL, 16);
405 y = simple_strtoul(argv[2], NULL, 16);
406 rp = argv[3];
407
408
409 while (*rp) {
410 char substr[5];
411
412 memcpy(substr, rp, 4);
413 substr[4] = 0;
414 *wp = simple_strtoul(substr, NULL, 16);
415
416 rp += 4;
417 wp++;
418 if (wp - buffer > BASE_WIDTH)
419 break;
420 }
421
422 for (k = 0; k < count; ++k) {
423 unsigned offset =
424 y * BASE_WIDTH + x + k * (wp - buffer);
425 osd_write_videomem(screen, offset, buffer,
426 wp - buffer);
427 }
428 }
429
430 return 0;
431}
432
433U_BOOT_CMD(
434 osdw, 5, 0, osd_write,
435 "write 16-bit hex encoded buffer to osd memory",
436 "pos_x pos_y buffer count\n"
437);
438
439U_BOOT_CMD(
440 osdp, 5, 0, osd_print,
441 "write ASCII buffer to osd memory",
442 "pos_x pos_y color text\n"
443);
444
