LXR uboot/board/matrix_vision/mvblm7/mvblm7.c

   1/*
   2 * Copyright (C) Freescale Semiconductor, Inc. 2006.
   3 *
   4 * (C) Copyright 2008
   5 * Andre Schwarz, Matrix Vision GmbH, andre.schwarz@matrix-vision.de
   6 *
   7 * See file CREDITS for list of people who contributed to this
   8 * project.
   9 *
  10 * This program is free software; you can redistribute it and/or
  11 * modify it under the terms of the GNU General Public License as
  12 * published by the Free Software Foundation; either version 2 of
  13 * the License, or (at your option) any later version.
  14 *
  15 * This program is distributed in the hope that it will be useful,
  16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
  17 * MERCHANTABILITY or FITNESS for A PARTICULAR PURPOSE.  See the
  18 * GNU General Public License for more details.
  19 *
  20 * You should have received a copy of the GNU General Public License
  21 * along with this program; if not, write to the Free Software
  22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  23 * MA 02111-1307 USA
  24 */
  25
  26#include <common.h>
  27#include <ioports.h>
  28#include <mpc83xx.h>
  29#include <asm/mpc8349_pci.h>
  30#include <pci.h>
  31#include <spi.h>
  32#include <asm/mmu.h>
  33#if defined(CONFIG_OF_LIBFDT)
  34#include <libfdt.h>
  35#endif
  36
  37#include "../common/mv_common.h"
  38#include "mvblm7.h"
  39
  40int fixed_sdram(void)
  41{
  42        volatile immap_t *im = (immap_t *)CONFIG_SYS_IMMR;
  43        u32 msize = 0;
  44        u32 ddr_size;
  45        u32 ddr_size_log2;
  46        char *s = getenv("ddr_size");
  47
  48        msize = CONFIG_SYS_DDR_SIZE;
  49        if (s) {
  50                u32 env_ddr_size = simple_strtoul(s, NULL, 10);
  51                if (env_ddr_size == 512)
  52                        msize = 512;
  53        }
  54
  55        for (ddr_size = msize << 20, ddr_size_log2 = 0;
  56             (ddr_size > 1);
  57             ddr_size = ddr_size >> 1, ddr_size_log2++) {
  58                if (ddr_size & 1)
  59                        return -1;
  60        }
  61        im->sysconf.ddrlaw[0].bar = CONFIG_SYS_DDR_SDRAM_BASE & 0xfffff000;
  62        im->sysconf.ddrlaw[0].ar = LAWAR_EN | ((ddr_size_log2 - 1) &
  63                LAWAR_SIZE);
  64
  65        im->ddr.csbnds[0].csbnds = CONFIG_SYS_DDR_CS0_BNDS;
  66        im->ddr.cs_config[0] = CONFIG_SYS_DDR_CS0_CONFIG;
  67        im->ddr.timing_cfg_0 = CONFIG_SYS_DDR_TIMING_0;
  68        im->ddr.timing_cfg_1 = CONFIG_SYS_DDR_TIMING_1;
  69        im->ddr.timing_cfg_2 = CONFIG_SYS_DDR_TIMING_2;
  70        im->ddr.timing_cfg_3 = CONFIG_SYS_DDR_TIMING_3;
  71        im->ddr.sdram_cfg = CONFIG_SYS_DDR_SDRAM_CFG;
  72        im->ddr.sdram_cfg2 = CONFIG_SYS_DDR_SDRAM_CFG2;
  73        im->ddr.sdram_mode = CONFIG_SYS_DDR_MODE;
  74        im->ddr.sdram_mode2 = CONFIG_SYS_DDR_MODE2;
  75        im->ddr.sdram_interval = CONFIG_SYS_DDR_INTERVAL;
  76        im->ddr.sdram_clk_cntl = CONFIG_SYS_DDR_SDRAM_CLK_CNTL;
  77
  78        asm("sync;isync");
  79        udelay(600);
  80
  81        im->ddr.sdram_cfg |= SDRAM_CFG_MEM_EN;
  82
  83        asm("sync;isync");
  84        udelay(500);
  85
  86        return msize;
  87}
  88
  89phys_size_t initdram(int board_type)
  90{
  91        volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR;
  92        u32 msize = 0;
  93
  94        if ((im->sysconf.immrbar & IMMRBAR_BASE_ADDR) != (u32) im)
  95                return -1;
  96
  97        im->sysconf.ddrlaw[0].bar = CONFIG_SYS_DDR_BASE & LAWBAR_BAR;
  98        msize = fixed_sdram();
  99
 100        /* return total bus RAM size(bytes) */
 101        return msize * 1024 * 1024;
 102}
 103
 104int misc_init_r(void)
 105{
 106        char *s = getenv("reset_env");
 107
 108        if (s) {
 109                mv_reset_environment();
 110        }
 111
 112        return 0;
 113}
 114
 115int checkboard(void)
 116{
 117        puts("Board: Matrix Vision mvBlueLYNX-M7\n");
 118
 119        return 0;
 120}
 121
 122#ifdef CONFIG_HARD_SPI
 123int spi_cs_is_valid(unsigned int bus, unsigned int cs)
 124{
 125        return bus == 0 && cs == 0;
 126}
 127
 128void spi_cs_activate(struct spi_slave *slave)
 129{
 130        volatile gpio83xx_t *iopd = &((immap_t *)CONFIG_SYS_IMMR)->gpio[0];
 131
 132        iopd->dat &= ~MVBLM7_MMC_CS;
 133}
 134
 135void spi_cs_deactivate(struct spi_slave *slave)
 136{
 137        volatile gpio83xx_t *iopd = &((immap_t *)CONFIG_SYS_IMMR)->gpio[0];
 138
 139        iopd->dat |= ~MVBLM7_MMC_CS;
 140}
 141#endif
 142
 143#if defined(CONFIG_OF_BOARD_SETUP)
 144void ft_board_setup(void *blob, bd_t *bd)
 145{
 146        ft_cpu_setup(blob, bd);
 147#ifdef CONFIG_PCI
 148        ft_pci_setup(blob, bd);
 149#endif
 150}
 151
 152#endif
 153