LXR uboot/board/matrix_vision/mvsmr/fpga.c

   1/*
   2 * (C) Copyright 2002
   3 * Rich Ireland, Enterasys Networks, rireland@enterasys.com.
   4 * Keith Outwater, keith_outwater@mvis.com.
   5 *
   6 * (C) Copyright 2010
   7 * Andre Schwarz, Matrix Vision GmbH, andre.schwarz@matrix-vision.de
   8 *
   9 * See file CREDITS for list of people who contributed to this
  10 * project.
  11 *
  12 * This program is free software; you can redistribute it and/or
  13 * modify it under the terms of the GNU General Public License as
  14 * published by the Free Software Foundation; either version 2 of
  15 * the License, or (at your option) any later version.
  16 *
  17 * This program is distributed in the hope that it will be useful,
  18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
  19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  20 * GNU General Public License for more details.
  21 *
  22 * You should have received a copy of the GNU General Public License
  23 * along with this program; if not, write to the Free Software
  24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  25 * MA 02111-1307 USA
  26 *
  27 */
  28
  29#include <common.h>
  30#include <spartan3.h>
  31#include <command.h>
  32#include <asm/io.h>
  33#include "fpga.h"
  34#include "mvsmr.h"
  35
  36Xilinx_Spartan3_Slave_Serial_fns fpga_fns = {
  37        fpga_pre_config_fn,
  38        fpga_pgm_fn,
  39        fpga_clk_fn,
  40        fpga_init_fn,
  41        fpga_done_fn,
  42        fpga_wr_fn,
  43        0
  44};
  45
  46Xilinx_desc spartan3 = {
  47        Xilinx_Spartan2,
  48        slave_serial,
  49        XILINX_XC3S200_SIZE,
  50        (void *) &fpga_fns,
  51        0,
  52};
  53
  54DECLARE_GLOBAL_DATA_PTR;
  55
  56int mvsmr_init_fpga(void)
  57{
  58        fpga_init();
  59        fpga_add(fpga_xilinx, &spartan3);
  60
  61        return 1;
  62}
  63
  64int fpga_init_fn(int cookie)
  65{
  66        struct mpc5xxx_gpio *gpio = (struct mpc5xxx_gpio *)MPC5XXX_GPIO;
  67
  68        if (in_be32(&gpio->simple_ival) & FPGA_CONFIG)
  69                return 0;
  70
  71        return 1;
  72}
  73
  74int fpga_done_fn(int cookie)
  75{
  76        struct mpc5xxx_gpio *gpio = (struct mpc5xxx_gpio *)MPC5XXX_GPIO;
  77        int result = 0;
  78
  79        udelay(10);
  80        if (in_be32(&gpio->simple_ival) & FPGA_DONE)
  81                result = 1;
  82
  83        return result;
  84}
  85
  86int fpga_pgm_fn(int assert, int flush, int cookie)
  87{
  88        struct mpc5xxx_gpio *gpio = (struct mpc5xxx_gpio *)MPC5XXX_GPIO;
  89
  90        if (!assert)
  91                setbits_8(&gpio->sint_dvo, FPGA_STATUS);
  92        else
  93                clrbits_8(&gpio->sint_dvo, FPGA_STATUS);
  94
  95        return assert;
  96}
  97
  98int fpga_clk_fn(int assert_clk, int flush, int cookie)
  99{
 100        struct mpc5xxx_gpio *gpio = (struct mpc5xxx_gpio *)MPC5XXX_GPIO;
 101
 102        if (assert_clk)
 103                setbits_be32(&gpio->simple_dvo, FPGA_CCLK);
 104        else
 105                clrbits_be32(&gpio->simple_dvo, FPGA_CCLK);
 106
 107        return assert_clk;
 108}
 109
 110int fpga_wr_fn(int assert_write, int flush, int cookie)
 111{
 112        struct mpc5xxx_gpio *gpio = (struct mpc5xxx_gpio *)MPC5XXX_GPIO;
 113
 114        if (assert_write)
 115                setbits_be32(&gpio->simple_dvo, FPGA_DIN);
 116        else
 117                clrbits_be32(&gpio->simple_dvo, FPGA_DIN);
 118
 119        return assert_write;
 120}
 121
 122int fpga_pre_config_fn(int cookie)
 123{
 124        struct mpc5xxx_gpio *gpio = (struct mpc5xxx_gpio *)MPC5XXX_GPIO;
 125
 126        setbits_8(&gpio->sint_dvo, FPGA_STATUS);
 127
 128        return 0;
 129}
 130