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25#include <common.h>
26#include <ioports.h>
27#include <mpc8260.h>
28#include <asm/cpm_8260.h>
29#include <configs/sacsng.h>
30
31#include "clkinit.h"
32
33DECLARE_GLOBAL_DATA_PTR;
34
35int Daq64xSampling = 0;
36
37
38void Daq_BRG_Reset(uint brg)
39{
40 volatile immap_t *immr = (immap_t *)CONFIG_SYS_IMMR;
41 volatile uint *brg_ptr;
42
43 brg_ptr = (uint *)&immr->im_brgc1;
44
45 if (brg >= 5) {
46 brg_ptr = (uint *)&immr->im_brgc5;
47 brg -= 4;
48 }
49 brg_ptr += brg;
50 *brg_ptr |= CPM_BRG_RST;
51 *brg_ptr &= ~CPM_BRG_RST;
52}
53
54void Daq_BRG_Disable(uint brg)
55{
56 volatile immap_t *immr = (immap_t *)CONFIG_SYS_IMMR;
57 volatile uint *brg_ptr;
58
59 brg_ptr = (uint *)&immr->im_brgc1;
60
61 if (brg >= 5) {
62 brg_ptr = (uint *)&immr->im_brgc5;
63 brg -= 4;
64 }
65 brg_ptr += brg;
66 *brg_ptr &= ~CPM_BRG_EN;
67}
68
69void Daq_BRG_Enable(uint brg)
70{
71 volatile immap_t *immr = (immap_t *)CONFIG_SYS_IMMR;
72 volatile uint *brg_ptr;
73
74 brg_ptr = (uint *)&immr->im_brgc1;
75 if (brg >= 5) {
76 brg_ptr = (uint *)&immr->im_brgc5;
77 brg -= 4;
78 }
79 brg_ptr += brg;
80 *brg_ptr |= CPM_BRG_EN;
81}
82
83uint Daq_BRG_Get_Div16(uint brg)
84{
85 volatile immap_t *immr = (immap_t *)CONFIG_SYS_IMMR;
86 uint *brg_ptr;
87
88 brg_ptr = (uint *)&immr->im_brgc1;
89 if (brg >= 5) {
90 brg_ptr = (uint *)&immr->im_brgc5;
91 brg -= 4;
92 }
93 brg_ptr += brg;
94
95 if (*brg_ptr & CPM_BRG_DIV16) {
96
97 return (TRUE);
98 }
99 else {
100
101 return (FALSE);
102 }
103}
104
105void Daq_BRG_Set_Div16(uint brg, uint div16)
106{
107 volatile immap_t *immr = (immap_t *)CONFIG_SYS_IMMR;
108 uint *brg_ptr;
109
110 brg_ptr = (uint *)&immr->im_brgc1;
111 if (brg >= 5) {
112 brg_ptr = (uint *)&immr->im_brgc5;
113 brg -= 4;
114 }
115 brg_ptr += brg;
116
117 if (div16) {
118
119 *brg_ptr |= CPM_BRG_DIV16;
120 }
121 else {
122
123 *brg_ptr &= ~CPM_BRG_DIV16;
124 }
125}
126
127uint Daq_BRG_Get_Count(uint brg)
128{
129 volatile immap_t *immr = (immap_t *)CONFIG_SYS_IMMR;
130 uint *brg_ptr;
131 uint brg_cnt;
132
133 brg_ptr = (uint *)&immr->im_brgc1;
134 if (brg >= 5) {
135 brg_ptr = (uint *)&immr->im_brgc5;
136 brg -= 4;
137 }
138 brg_ptr += brg;
139
140
141
142
143
144
145 brg_cnt = (*brg_ptr & CPM_BRG_CD_MASK) >> CPM_BRG_DIV16_SHIFT;
146 brg_cnt++;
147 if (*brg_ptr & CPM_BRG_DIV16) {
148 brg_cnt *= 16;
149 }
150
151 return (brg_cnt);
152}
153
154void Daq_BRG_Set_Count(uint brg, uint brg_cnt)
155{
156 volatile immap_t *immr = (immap_t *)CONFIG_SYS_IMMR;
157 uint *brg_ptr;
158
159 brg_ptr = (uint *)&immr->im_brgc1;
160 if (brg >= 5) {
161 brg_ptr = (uint *)&immr->im_brgc5;
162 brg -= 4;
163 }
164 brg_ptr += brg;
165
166
167
168
169
170 if (brg_cnt > 4096) {
171
172 *brg_ptr = (*brg_ptr & ~CPM_BRG_CD_MASK) |
173 (((brg_cnt / 16) - 1) << CPM_BRG_DIV16_SHIFT);
174 *brg_ptr |= CPM_BRG_DIV16;
175 }
176 else {
177
178 *brg_ptr = (*brg_ptr & ~CPM_BRG_CD_MASK) |
179 ((brg_cnt - 1) << CPM_BRG_DIV16_SHIFT);
180 *brg_ptr &= ~CPM_BRG_DIV16;
181 }
182}
183
184uint Daq_BRG_Get_ExtClk(uint brg)
185{
186 volatile immap_t *immr = (immap_t *)CONFIG_SYS_IMMR;
187 uint *brg_ptr;
188
189 brg_ptr = (uint *)&immr->im_brgc1;
190 if (brg >= 5) {
191 brg_ptr = (uint *)&immr->im_brgc5;
192 brg -= 4;
193 }
194 brg_ptr += brg;
195
196 return ((*brg_ptr & CPM_BRG_EXTC_MASK) >> CPM_BRG_EXTC_SHIFT);
197}
198
199char* Daq_BRG_Get_ExtClk_Description(uint brg)
200{
201 uint extc;
202
203 extc = Daq_BRG_Get_ExtClk(brg);
204
205 switch (brg + 1) {
206 case 1:
207 case 2:
208 case 5:
209 case 6: {
210 switch (extc) {
211 case 0: {
212 return ("BRG_INT");
213 }
214 case 1: {
215 return ("CLK3");
216 }
217 case 2: {
218 return ("CLK5");
219 }
220 }
221 return ("??1245??");
222 }
223 case 3:
224 case 4:
225 case 7:
226 case 8: {
227 switch (extc) {
228 case 0: {
229 return ("BRG_INT");
230 }
231 case 1: {
232 return ("CLK9");
233 }
234 case 2: {
235 return ("CLK15");
236 }
237 }
238 return ("??3478??");
239 }
240 }
241 return ("??9876??");
242}
243
244void Daq_BRG_Set_ExtClk(uint brg, uint extc)
245{
246 volatile immap_t *immr = (immap_t *)CONFIG_SYS_IMMR;
247 uint *brg_ptr;
248
249 brg_ptr = (uint *)&immr->im_brgc1;
250 if (brg >= 5) {
251 brg_ptr = (uint *)&immr->im_brgc5;
252 brg -= 4;
253 }
254 brg_ptr += brg;
255
256 *brg_ptr = (*brg_ptr & ~CPM_BRG_EXTC_MASK) |
257 ((extc << CPM_BRG_EXTC_SHIFT) & CPM_BRG_EXTC_MASK);
258}
259
260uint Daq_BRG_Rate(uint brg)
261{
262 volatile immap_t *immr = (immap_t *)CONFIG_SYS_IMMR;
263 uint *brg_ptr;
264 uint brg_cnt;
265 uint brg_freq = 0;
266
267 brg_ptr = (uint *)&immr->im_brgc1;
268 brg_ptr += brg;
269 if (brg >= 5) {
270 brg_ptr = (uint *)&immr->im_brgc5;
271 brg_ptr += (brg - 4);
272 }
273
274 brg_cnt = Daq_BRG_Get_Count(brg);
275
276 switch (Daq_BRG_Get_ExtClk(brg)) {
277 case CPM_BRG_EXTC_CLK3:
278 case CPM_BRG_EXTC_CLK5: {
279 brg_freq = brg_cnt;
280 break;
281 }
282 default: {
283 brg_freq = (uint)BRG_INT_CLK / brg_cnt;
284 }
285 }
286 return (brg_freq);
287}
288
289uint Daq_Get_SampleRate(void)
290{
291
292
293
294 return (Daq_BRG_Rate(MCLK_BRG) / (MCLK_DIVISOR * SCLK_DIVISOR));
295}
296
297void Daq_Init_Clocks(int sample_rate, int sample_64x)
298{
299 volatile ioport_t *iopa = ioport_addr((immap_t *)CONFIG_SYS_IMMR, 0 );
300 uint mclk_divisor;
301 int flag;
302
303
304 Daq64xSampling = sample_64x;
305
306
307
308
309 if (sample_rate > MAX_64x_SAMPLE_RATE) {
310 sample_rate = MAX_64x_SAMPLE_RATE;
311 }
312 if (sample_rate < MIN_SAMPLE_RATE) {
313 sample_rate = MIN_SAMPLE_RATE;
314 }
315
316
317
318
319
320
321 Daq_BRG_Set_ExtClk(MCLK_BRG, CPM_BRG_EXTC_BRGCLK);
322
323
324# ifdef RUN_SCLK_ON_BRG_INT
325 Daq_BRG_Set_ExtClk(SCLK_BRG, CPM_BRG_EXTC_BRGCLK);
326# else
327 Daq_BRG_Set_ExtClk(SCLK_BRG, CPM_BRG_EXTC_CLK9);
328# endif
329
330
331# ifdef RUN_LRCLK_ON_BRG_INT
332 Daq_BRG_Set_ExtClk(LRCLK_BRG, CPM_BRG_EXTC_BRGCLK);
333# else
334 Daq_BRG_Set_ExtClk(LRCLK_BRG, CPM_BRG_EXTC_CLK5);
335# endif
336
337
338
339
340
341
342 mclk_divisor = BRG_INT_CLK / (sample_rate * MCLK_DIVISOR * SCLK_DIVISOR);
343
344
345
346
347 flag = disable_interrupts();
348
349
350 Daq_BRG_Set_Count(MCLK_BRG, mclk_divisor);
351
352
353# ifdef RUN_SCLK_ON_BRG_INT
354 Daq_BRG_Set_Count(SCLK_BRG, mclk_divisor * MCLK_DIVISOR);
355# else
356 Daq_BRG_Set_Count(SCLK_BRG, MCLK_DIVISOR);
357# endif
358
359# ifdef RUN_LRCLK_ON_BRG_INT
360 Daq_BRG_Set_Count(LRCLK_BRG,
361 mclk_divisor * MCLK_DIVISOR * SCLK_DIVISOR);
362# else
363 Daq_BRG_Set_Count(LRCLK_BRG, SCLK_DIVISOR);
364# endif
365
366
367
368
369 if (flag) {
370 enable_interrupts();
371 }
372
373
374 iopa->pdat &= ~SLRCLK_EN_MASK;
375}
376
377void Daq_Stop_Clocks(void)
378
379{
380#ifdef TIGHTEN_UP_BRG_TIMING
381 volatile immap_t *immr = (immap_t *)CONFIG_SYS_IMMR;
382 register uint mclk_brg;
383 register uint sclk_brg;
384 register uint lrclk_brg;
385 unsigned long flag;
386#endif
387
388# ifdef TIGHTEN_UP_BRG_TIMING
389
390
391
392# if (MCLK_BRG == 0)
393 mclk_brg = (*IM_BRGC1 | CPM_BRG_RST) & ~CPM_BRG_EN;
394# endif
395# if (MCLK_BRG == 1)
396 mclk_brg = (*IM_BRGC2 | CPM_BRG_RST) & ~CPM_BRG_EN;
397# endif
398# if (MCLK_BRG == 2)
399 mclk_brg = (*IM_BRGC3 | CPM_BRG_RST) & ~CPM_BRG_EN;
400# endif
401# if (MCLK_BRG == 3)
402 mclk_brg = (*IM_BRGC4 | CPM_BRG_RST) & ~CPM_BRG_EN;
403# endif
404# if (MCLK_BRG == 4)
405 mclk_brg = (*IM_BRGC5 | CPM_BRG_RST) & ~CPM_BRG_EN;
406# endif
407# if (MCLK_BRG == 5)
408 mclk_brg = (*IM_BRGC6 | CPM_BRG_RST) & ~CPM_BRG_EN;
409# endif
410# if (MCLK_BRG == 6)
411 mclk_brg = (*IM_BRGC7 | CPM_BRG_RST) & ~CPM_BRG_EN;
412# endif
413# if (MCLK_BRG == 7)
414 mclk_brg = (*IM_BRGC8 | CPM_BRG_RST) & ~CPM_BRG_EN;
415# endif
416
417
418
419
420# if (SCLK_BRG == 0)
421 sclk_brg = (*IM_BRGC1 | CPM_BRG_RST) & ~CPM_BRG_EN;
422# endif
423# if (SCLK_BRG == 1)
424 sclk_brg = (*IM_BRGC2 | CPM_BRG_RST) & ~CPM_BRG_EN;
425# endif
426# if (SCLK_BRG == 2)
427 sclk_brg = (*IM_BRGC3 | CPM_BRG_RST) & ~CPM_BRG_EN;
428# endif
429# if (SCLK_BRG == 3)
430 sclk_brg = (*IM_BRGC4 | CPM_BRG_RST) & ~CPM_BRG_EN;
431# endif
432# if (SCLK_BRG == 4)
433 sclk_brg = (*IM_BRGC5 | CPM_BRG_RST) & ~CPM_BRG_EN;
434# endif
435# if (SCLK_BRG == 5)
436 sclk_brg = (*IM_BRGC6 | CPM_BRG_RST) & ~CPM_BRG_EN;
437# endif
438# if (SCLK_BRG == 6)
439 sclk_brg = (*IM_BRGC7 | CPM_BRG_RST) & ~CPM_BRG_EN;
440# endif
441# if (SCLK_BRG == 7)
442 sclk_brg = (*IM_BRGC8 | CPM_BRG_RST) & ~CPM_BRG_EN;
443# endif
444
445
446
447
448# if (LRCLK_BRG == 0)
449 lrclk_brg = (*IM_BRGC1 | CPM_BRG_RST) & ~CPM_BRG_EN;
450# endif
451# if (LRCLK_BRG == 1)
452 lrclk_brg = (*IM_BRGC2 | CPM_BRG_RST) & ~CPM_BRG_EN;
453# endif
454# if (LRCLK_BRG == 2)
455 lrclk_brg = (*IM_BRGC3 | CPM_BRG_RST) & ~CPM_BRG_EN;
456# endif
457# if (LRCLK_BRG == 3)
458 lrclk_brg = (*IM_BRGC4 | CPM_BRG_RST) & ~CPM_BRG_EN;
459# endif
460# if (LRCLK_BRG == 4)
461 lrclk_brg = (*IM_BRGC5 | CPM_BRG_RST) & ~CPM_BRG_EN;
462# endif
463# if (LRCLK_BRG == 5)
464 lrclk_brg = (*IM_BRGC6 | CPM_BRG_RST) & ~CPM_BRG_EN;
465# endif
466# if (LRCLK_BRG == 6)
467 lrclk_brg = (*IM_BRGC7 | CPM_BRG_RST) & ~CPM_BRG_EN;
468# endif
469# if (LRCLK_BRG == 7)
470 lrclk_brg = (*IM_BRGC8 | CPM_BRG_RST) & ~CPM_BRG_EN;
471# endif
472
473
474
475
476 flag = disable_interrupts();
477
478
479
480
481# if (MCLK_BRG == 0)
482 *IM_BRGC1 = mclk_brg;
483# endif
484# if (MCLK_BRG == 1)
485 *IM_BRGC2 = mclk_brg;
486# endif
487# if (MCLK_BRG == 2)
488 *IM_BRGC3 = mclk_brg;
489# endif
490# if (MCLK_BRG == 3)
491 *IM_BRGC4 = mclk_brg;
492# endif
493# if (MCLK_BRG == 4)
494 *IM_BRGC5 = mclk_brg;
495# endif
496# if (MCLK_BRG == 5)
497 *IM_BRGC6 = mclk_brg;
498# endif
499# if (MCLK_BRG == 6)
500 *IM_BRGC7 = mclk_brg;
501# endif
502# if (MCLK_BRG == 7)
503 *IM_BRGC8 = mclk_brg;
504# endif
505
506
507
508
509# if (SCLK_BRG == 0)
510 *IM_BRGC1 = sclk_brg;
511# endif
512# if (SCLK_BRG == 1)
513 *IM_BRGC2 = sclk_brg;
514# endif
515# if (SCLK_BRG == 2)
516 *IM_BRGC3 = sclk_brg;
517# endif
518# if (SCLK_BRG == 3)
519 *IM_BRGC4 = sclk_brg;
520# endif
521# if (SCLK_BRG == 4)
522 *IM_BRGC5 = sclk_brg;
523# endif
524# if (SCLK_BRG == 5)
525 *IM_BRGC6 = sclk_brg;
526# endif
527# if (SCLK_BRG == 6)
528 *IM_BRGC7 = sclk_brg;
529# endif
530# if (SCLK_BRG == 7)
531 *IM_BRGC8 = sclk_brg;
532# endif
533
534
535
536
537# if (LRCLK_BRG == 0)
538 *IM_BRGC1 = lrclk_brg;
539# endif
540# if (LRCLK_BRG == 1)
541 *IM_BRGC2 = lrclk_brg;
542# endif
543# if (LRCLK_BRG == 2)
544 *IM_BRGC3 = lrclk_brg;
545# endif
546# if (LRCLK_BRG == 3)
547 *IM_BRGC4 = lrclk_brg;
548# endif
549# if (LRCLK_BRG == 4)
550 *IM_BRGC5 = lrclk_brg;
551# endif
552# if (LRCLK_BRG == 5)
553 *IM_BRGC6 = lrclk_brg;
554# endif
555# if (LRCLK_BRG == 6)
556 *IM_BRGC7 = lrclk_brg;
557# endif
558# if (LRCLK_BRG == 7)
559 *IM_BRGC8 = lrclk_brg;
560# endif
561
562
563
564
565# if (MCLK_BRG == 0)
566 *IM_BRGC1 = mclk_brg & ~CPM_BRG_RST;
567# endif
568# if (MCLK_BRG == 1)
569 *IM_BRGC2 = mclk_brg & ~CPM_BRG_RST;
570# endif
571# if (MCLK_BRG == 2)
572 *IM_BRGC3 = mclk_brg & ~CPM_BRG_RST;
573# endif
574# if (MCLK_BRG == 3)
575 *IM_BRGC4 = mclk_brg & ~CPM_BRG_RST;
576# endif
577# if (MCLK_BRG == 4)
578 *IM_BRGC5 = mclk_brg & ~CPM_BRG_RST;
579# endif
580# if (MCLK_BRG == 5)
581 *IM_BRGC6 = mclk_brg & ~CPM_BRG_RST;
582# endif
583# if (MCLK_BRG == 6)
584 *IM_BRGC7 = mclk_brg & ~CPM_BRG_RST;
585# endif
586# if (MCLK_BRG == 7)
587 *IM_BRGC8 = mclk_brg & ~CPM_BRG_RST;
588# endif
589
590
591
592
593# if (SCLK_BRG == 0)
594 *IM_BRGC1 = sclk_brg & ~CPM_BRG_RST;
595# endif
596# if (SCLK_BRG == 1)
597 *IM_BRGC2 = sclk_brg & ~CPM_BRG_RST;
598# endif
599# if (SCLK_BRG == 2)
600 *IM_BRGC3 = sclk_brg & ~CPM_BRG_RST;
601# endif
602# if (SCLK_BRG == 3)
603 *IM_BRGC4 = sclk_brg & ~CPM_BRG_RST;
604# endif
605# if (SCLK_BRG == 4)
606 *IM_BRGC5 = sclk_brg & ~CPM_BRG_RST;
607# endif
608# if (SCLK_BRG == 5)
609 *IM_BRGC6 = sclk_brg & ~CPM_BRG_RST;
610# endif
611# if (SCLK_BRG == 6)
612 *IM_BRGC7 = sclk_brg & ~CPM_BRG_RST;
613# endif
614# if (SCLK_BRG == 7)
615 *IM_BRGC8 = sclk_brg & ~CPM_BRG_RST;
616# endif
617
618
619
620
621# if (LRCLK_BRG == 0)
622 *IM_BRGC1 = lrclk_brg & ~CPM_BRG_RST;
623# endif
624# if (LRCLK_BRG == 1)
625 *IM_BRGC2 = lrclk_brg & ~CPM_BRG_RST;
626# endif
627# if (LRCLK_BRG == 2)
628 *IM_BRGC3 = lrclk_brg & ~CPM_BRG_RST;
629# endif
630# if (LRCLK_BRG == 3)
631 *IM_BRGC4 = lrclk_brg & ~CPM_BRG_RST;
632# endif
633# if (LRCLK_BRG == 4)
634 *IM_BRGC5 = lrclk_brg & ~CPM_BRG_RST;
635# endif
636# if (LRCLK_BRG == 5)
637 *IM_BRGC6 = lrclk_brg & ~CPM_BRG_RST;
638# endif
639# if (LRCLK_BRG == 6)
640 *IM_BRGC7 = lrclk_brg & ~CPM_BRG_RST;
641# endif
642# if (LRCLK_BRG == 7)
643 *IM_BRGC8 = lrclk_brg & ~CPM_BRG_RST;
644# endif
645
646
647
648
649 if (flag) {
650 enable_interrupts();
651 }
652# else
653
654
655
656 Daq_BRG_Reset(MCLK_BRG);
657 Daq_BRG_Reset(SCLK_BRG);
658 Daq_BRG_Reset(LRCLK_BRG);
659# endif
660}
661
662void Daq_Start_Clocks(int sample_rate)
663
664{
665#ifdef TIGHTEN_UP_BRG_TIMING
666 volatile immap_t *immr = (immap_t *)CONFIG_SYS_IMMR;
667
668 register uint mclk_brg;
669 register uint sclk_brg;
670 register uint temp_lrclk_brg;
671 register uint real_lrclk_brg;
672 uint lrclk_brg;
673 unsigned long flags;
674 uint sclk_cnt;
675 uint delay_cnt;
676#endif
677
678# ifdef TIGHTEN_UP_BRG_TIMING
679
680
681
682# if (MCLK_BRG == 0)
683 mclk_brg = (*IM_BRGC1 & ~CPM_BRG_RST) | CPM_BRG_EN;
684# endif
685# if (MCLK_BRG == 1)
686 mclk_brg = (*IM_BRGC2 & ~CPM_BRG_RST) | CPM_BRG_EN;
687# endif
688# if (MCLK_BRG == 2)
689 mclk_brg = (*IM_BRGC3 & ~CPM_BRG_RST) | CPM_BRG_EN;
690# endif
691# if (MCLK_BRG == 3)
692 mclk_brg = (*IM_BRGC4 & ~CPM_BRG_RST) | CPM_BRG_EN;
693# endif
694# if (MCLK_BRG == 4)
695 mclk_brg = (*IM_BRGC5 & ~CPM_BRG_RST) | CPM_BRG_EN;
696# endif
697# if (MCLK_BRG == 5)
698 mclk_brg = (*IM_BRGC6 & ~CPM_BRG_RST) | CPM_BRG_EN;
699# endif
700# if (MCLK_BRG == 6)
701 mclk_brg = (*IM_BRGC7 & ~CPM_BRG_RST) | CPM_BRG_EN;
702# endif
703# if (MCLK_BRG == 7)
704 mclk_brg = (*IM_BRGC8 & ~CPM_BRG_RST) | CPM_BRG_EN;
705# endif
706
707
708
709
710# if (SCLK_BRG == 0)
711 sclk_brg = (*IM_BRGC1 & ~CPM_BRG_RST) | CPM_BRG_EN;
712# endif
713# if (SCLK_BRG == 1)
714 sclk_brg = (*IM_BRGC2 & ~CPM_BRG_RST) | CPM_BRG_EN;
715# endif
716# if (SCLK_BRG == 2)
717 sclk_brg = (*IM_BRGC3 & ~CPM_BRG_RST) | CPM_BRG_EN;
718# endif
719# if (SCLK_BRG == 3)
720 sclk_brg = (*IM_BRGC4 & ~CPM_BRG_RST) | CPM_BRG_EN;
721# endif
722# if (SCLK_BRG == 4)
723 sclk_brg = (*IM_BRGC5 & ~CPM_BRG_RST) | CPM_BRG_EN;
724# endif
725# if (SCLK_BRG == 5)
726 sclk_brg = (*IM_BRGC6 & ~CPM_BRG_RST) | CPM_BRG_EN;
727# endif
728# if (SCLK_BRG == 6)
729 sclk_brg = (*IM_BRGC7 & ~CPM_BRG_RST) | CPM_BRG_EN;
730# endif
731# if (SCLK_BRG == 7)
732 sclk_brg = (*IM_BRGC8 & ~CPM_BRG_RST) | CPM_BRG_EN;
733# endif
734
735
736
737
738# if (LRCLK_BRG == 0)
739 lrclk_brg = (*IM_BRGC1 & ~CPM_BRG_RST) | CPM_BRG_EN;
740# endif
741# if (LRCLK_BRG == 1)
742 lrclk_brg = (*IM_BRGC2 & ~CPM_BRG_RST) | CPM_BRG_EN;
743# endif
744# if (LRCLK_BRG == 2)
745 lrclk_brg = (*IM_BRGC3 & ~CPM_BRG_RST) | CPM_BRG_EN;
746# endif
747# if (LRCLK_BRG == 3)
748 lrclk_brg = (*IM_BRGC4 & ~CPM_BRG_RST) | CPM_BRG_EN;
749# endif
750# if (LRCLK_BRG == 4)
751 lrclk_brg = (*IM_BRGC5 & ~CPM_BRG_RST) | CPM_BRG_EN;
752# endif
753# if (LRCLK_BRG == 5)
754 lrclk_brg = (*IM_BRGC6 & ~CPM_BRG_RST) | CPM_BRG_EN;
755# endif
756# if (LRCLK_BRG == 6)
757 lrclk_brg = (*IM_BRGC7 & ~CPM_BRG_RST) | CPM_BRG_EN;
758# endif
759# if (LRCLK_BRG == 7)
760 lrclk_brg = (*IM_BRGC8 & ~CPM_BRG_RST) | CPM_BRG_EN;
761# endif
762
763
764 real_lrclk_brg = lrclk_brg;
765
766
767 sclk_cnt = ((sclk_brg & 0x00001FFE) >> 1) + 1;
768
769
770 delay_cnt = ((sclk_cnt / 4) - 2) * 10 + 6;
771 if (DaqSampleRate == 43402) {
772 delay_cnt++;
773 }
774
775
776 temp_lrclk_brg = sclk_brg & ~0x00001FFE;
777
778
779 temp_lrclk_brg |= ((delay_cnt + (sclk_cnt / 2) - 1) << 1) & 0x00001FFE;
780
781
782
783
784 flag = disable_interrupts();
785
786
787
788
789# if (MCLK_BRG == 0)
790 *IM_BRGC1 = mclk_brg;
791# endif
792# if (MCLK_BRG == 1)
793 *IM_BRGC2 = mclk_brg;
794# endif
795# if (MCLK_BRG == 2)
796 *IM_BRGC3 = mclk_brg;
797# endif
798# if (MCLK_BRG == 3)
799 *IM_BRGC4 = mclk_brg;
800# endif
801# if (MCLK_BRG == 4)
802 *IM_BRGC5 = mclk_brg;
803# endif
804# if (MCLK_BRG == 5)
805 *IM_BRGC6 = mclk_brg;
806# endif
807# if (MCLK_BRG == 6)
808 *IM_BRGC7 = mclk_brg;
809# endif
810# if (MCLK_BRG == 7)
811 *IM_BRGC8 = mclk_brg;
812# endif
813
814
815
816
817# if (SCLK_BRG == 0)
818 *IM_BRGC1 = sclk_brg;
819# endif
820# if (SCLK_BRG == 1)
821 *IM_BRGC2 = sclk_brg;
822# endif
823# if (SCLK_BRG == 2)
824 *IM_BRGC3 = sclk_brg;
825# endif
826# if (SCLK_BRG == 3)
827 *IM_BRGC4 = sclk_brg;
828# endif
829# if (SCLK_BRG == 4)
830 *IM_BRGC5 = sclk_brg;
831# endif
832# if (SCLK_BRG == 5)
833 *IM_BRGC6 = sclk_brg;
834# endif
835# if (SCLK_BRG == 6)
836 *IM_BRGC7 = sclk_brg;
837# endif
838# if (SCLK_BRG == 7)
839 *IM_BRGC8 = sclk_brg;
840# endif
841
842
843
844
845# if (LRCLK_BRG == 0)
846 *IM_BRGC1 = temp_lrclk_brg;
847# endif
848# if (LRCLK_BRG == 1)
849 *IM_BRGC2 = temp_lrclk_brg;
850# endif
851# if (LRCLK_BRG == 2)
852 *IM_BRGC3 = temp_lrclk_brg;
853# endif
854# if (LRCLK_BRG == 3)
855 *IM_BRGC4 = temp_lrclk_brg;
856# endif
857# if (LRCLK_BRG == 4)
858 *IM_BRGC5 = temp_lrclk_brg;
859# endif
860# if (LRCLK_BRG == 5)
861 *IM_BRGC6 = temp_lrclk_brg;
862# endif
863# if (LRCLK_BRG == 6)
864 *IM_BRGC7 = temp_lrclk_brg;
865# endif
866# if (LRCLK_BRG == 7)
867 *IM_BRGC8 = temp_lrclk_brg;
868# endif
869
870
871
872
873# if (LRCLK_BRG == 0)
874 *IM_BRGC1 = real_lrclk_brg;
875# endif
876# if (LRCLK_BRG == 1)
877 *IM_BRGC2 = real_lrclk_brg;
878# endif
879# if (LRCLK_BRG == 2)
880 *IM_BRGC3 = real_lrclk_brg;
881# endif
882# if (LRCLK_BRG == 3)
883 *IM_BRGC4 = real_lrclk_brg;
884# endif
885# if (LRCLK_BRG == 4)
886 *IM_BRGC5 = real_lrclk_brg;
887# endif
888# if (LRCLK_BRG == 5)
889 *IM_BRGC6 = real_lrclk_brg;
890# endif
891# if (LRCLK_BRG == 6)
892 *IM_BRGC7 = real_lrclk_brg;
893# endif
894# if (LRCLK_BRG == 7)
895 *IM_BRGC8 = real_lrclk_brg;
896# endif
897
898
899
900
901 if (flag) {
902 enable_interrupts();
903 }
904# else
905
906
907
908 Daq_BRG_Enable(LRCLK_BRG);
909 Daq_BRG_Enable(SCLK_BRG);
910 Daq_BRG_Enable(MCLK_BRG);
911# endif
912}
913
914void Daq_Display_Clocks(void)
915
916{
917 volatile immap_t *immr = (immap_t *)CONFIG_SYS_IMMR;
918 uint mclk_divisor;
919 uint sclk_divisor;
920
921 printf("\nBRG:\n");
922 if (immr->im_brgc4 != 0) {
923 printf("\tbrgc4\t0x%08x @ 0x%08x, %5d count, %d extc, %8s, MCLK\n",
924 immr->im_brgc4,
925 (uint)&(immr->im_brgc4),
926 Daq_BRG_Get_Count(3),
927 Daq_BRG_Get_ExtClk(3),
928 Daq_BRG_Get_ExtClk_Description(3));
929 }
930 if (immr->im_brgc8 != 0) {
931 printf("\tbrgc8\t0x%08x @ 0x%08x, %5d count, %d extc, %8s, SCLK\n",
932 immr->im_brgc8,
933 (uint)&(immr->im_brgc8),
934 Daq_BRG_Get_Count(7),
935 Daq_BRG_Get_ExtClk(7),
936 Daq_BRG_Get_ExtClk_Description(7));
937 }
938 if (immr->im_brgc6 != 0) {
939 printf("\tbrgc6\t0x%08x @ 0x%08x, %5d count, %d extc, %8s, LRCLK\n",
940 immr->im_brgc6,
941 (uint)&(immr->im_brgc6),
942 Daq_BRG_Get_Count(5),
943 Daq_BRG_Get_ExtClk(5),
944 Daq_BRG_Get_ExtClk_Description(5));
945 }
946 if (immr->im_brgc1 != 0) {
947 printf("\tbrgc1\t0x%08x @ 0x%08x, %5d count, %d extc, %8s, SMC1\n",
948 immr->im_brgc1,
949 (uint)&(immr->im_brgc1),
950 Daq_BRG_Get_Count(0),
951 Daq_BRG_Get_ExtClk(0),
952 Daq_BRG_Get_ExtClk_Description(0));
953 }
954 if (immr->im_brgc2 != 0) {
955 printf("\tbrgc2\t0x%08x @ 0x%08x, %5d count, %d extc, %8s, SMC2\n",
956 immr->im_brgc2,
957 (uint)&(immr->im_brgc2),
958 Daq_BRG_Get_Count(1),
959 Daq_BRG_Get_ExtClk(1),
960 Daq_BRG_Get_ExtClk_Description(1));
961 }
962 if (immr->im_brgc3 != 0) {
963 printf("\tbrgc3\t0x%08x @ 0x%08x, %5d count, %d extc, %8s, SCC1\n",
964 immr->im_brgc3,
965 (uint)&(immr->im_brgc3),
966 Daq_BRG_Get_Count(2),
967 Daq_BRG_Get_ExtClk(2),
968 Daq_BRG_Get_ExtClk_Description(2));
969 }
970 if (immr->im_brgc5 != 0) {
971 printf("\tbrgc5\t0x%08x @ 0x%08x, %5d count, %d extc, %8s\n",
972 immr->im_brgc5,
973 (uint)&(immr->im_brgc5),
974 Daq_BRG_Get_Count(4),
975 Daq_BRG_Get_ExtClk(4),
976 Daq_BRG_Get_ExtClk_Description(4));
977 }
978 if (immr->im_brgc7 != 0) {
979 printf("\tbrgc7\t0x%08x @ 0x%08x, %5d count, %d extc, %8s\n",
980 immr->im_brgc7,
981 (uint)&(immr->im_brgc7),
982 Daq_BRG_Get_Count(6),
983 Daq_BRG_Get_ExtClk(6),
984 Daq_BRG_Get_ExtClk_Description(6));
985 }
986
987# ifdef RUN_SCLK_ON_BRG_INT
988 mclk_divisor = Daq_BRG_Rate(MCLK_BRG) / Daq_BRG_Rate(SCLK_BRG);
989# else
990 mclk_divisor = Daq_BRG_Get_Count(SCLK_BRG);
991# endif
992# ifdef RUN_LRCLK_ON_BRG_INT
993 sclk_divisor = Daq_BRG_Rate(SCLK_BRG) / Daq_BRG_Rate(LRCLK_BRG);
994# else
995 sclk_divisor = Daq_BRG_Get_Count(LRCLK_BRG);
996# endif
997
998 printf("\nADC/DAC Clocking (%d/%d):\n", sclk_divisor, mclk_divisor);
999 printf("\tMCLK %8d Hz, or %3dx SCLK, or %3dx LRCLK\n",
1000 Daq_BRG_Rate(MCLK_BRG),
1001 mclk_divisor,
1002 mclk_divisor * sclk_divisor);
1003# ifdef RUN_SCLK_ON_BRG_INT
1004 printf("\tSCLK %8d Hz, or %3dx LRCLK\n",
1005 Daq_BRG_Rate(SCLK_BRG),
1006 sclk_divisor);
1007# else
1008 printf("\tSCLK %8d Hz, or %3dx LRCLK\n",
1009 Daq_BRG_Rate(MCLK_BRG) / mclk_divisor,
1010 sclk_divisor);
1011# endif
1012# ifdef RUN_LRCLK_ON_BRG_INT
1013 printf("\tLRCLK %8d Hz\n",
1014 Daq_BRG_Rate(LRCLK_BRG));
1015# else
1016# ifdef RUN_SCLK_ON_BRG_INT
1017 printf("\tLRCLK %8d Hz\n",
1018 Daq_BRG_Rate(SCLK_BRG) / sclk_divisor);
1019# else
1020 printf("\tLRCLK %8d Hz\n",
1021 Daq_BRG_Rate(MCLK_BRG) / (mclk_divisor * sclk_divisor));
1022# endif
1023# endif
1024 printf("\n");
1025}
1026
