LXR uboot/board/syteco/zmx25/zmx25.c

   1/*
   2 * (c) 2011 Graf-Syteco, Matthias Weisser
   3 * <weisserm@arcor.de>
   4 *
   5 * Based on tx25.c:
   6 * (C) Copyright 2009 DENX Software Engineering
   7 * Author: John Rigby <jrigby@gmail.com>
   8 *
   9 * Based on imx27lite.c:
  10 *   Copyright (C) 2008,2009 Eric Jarrige <jorasse@users.sourceforge.net>
  11 *   Copyright (C) 2009 Ilya Yanok <yanok@emcraft.com>
  12 * And:
  13 *   RedBoot tx25_misc.c Copyright (C) 2009 Red Hat
  14 *
  15 * This program is free software; you can redistribute it and/or
  16 * modify it under the terms of the GNU General Public License as
  17 * published by the Free Software Foundation; either version 2 of
  18 * the License, or (at your option) any later version.
  19 *
  20 * This program is distributed in the hope that it will be useful,
  21 * but WITHOUT ANY WARRANTY; without even the implied warranty of
  22 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  23 * GNU General Public License for more details.
  24 *
  25 * You should have received a copy of the GNU General Public License
  26 * along with this program; if not, write to the Free Software
  27 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  28 * MA 02111-1307 USA
  29 *
  30 */
  31#include <common.h>
  32#include <asm/gpio.h>
  33#include <asm/io.h>
  34#include <asm/arch/imx-regs.h>
  35#include <asm/arch/imx25-pinmux.h>
  36
  37DECLARE_GLOBAL_DATA_PTR;
  38
  39int board_init()
  40{
  41        struct iomuxc_mux_ctl *muxctl;
  42        struct iomuxc_pad_ctl *padctl;
  43        struct iomuxc_pad_input_select *inputselect;
  44        u32 gpio_mux_mode0_sion = MX25_PIN_MUX_MODE(0) | MX25_PIN_MUX_SION;
  45        u32 gpio_mux_mode1 = MX25_PIN_MUX_MODE(1);
  46        u32 gpio_mux_mode5 = MX25_PIN_MUX_MODE(5);
  47        u32 gpio_mux_mode6 = MX25_PIN_MUX_MODE(6);
  48        u32 input_select1 = MX25_PAD_INPUT_SELECT_DAISY(1);
  49        u32 input_select2 = MX25_PAD_INPUT_SELECT_DAISY(2);
  50
  51        icache_enable();
  52
  53        muxctl = (struct iomuxc_mux_ctl *)IMX_IOPADMUX_BASE;
  54        padctl = (struct iomuxc_pad_ctl *)IMX_IOPADCTL_BASE;
  55        inputselect = (struct iomuxc_pad_input_select *)IMX_IOPADINPUTSEL_BASE;
  56
  57        /* Setup of core volatage selection pin to run at 1.4V */
  58        writel(gpio_mux_mode5, &muxctl->pad_ext_armclk); /* VCORE GPIO3[15] */
  59        gpio_direction_output(IMX_GPIO_NR(3, 15), 1);
  60
  61        /* Setup of input daisy chains for SD card pins*/
  62        writel(gpio_mux_mode0_sion, &muxctl->pad_sd1_cmd);
  63        writel(gpio_mux_mode0_sion, &muxctl->pad_sd1_clk);
  64        writel(gpio_mux_mode0_sion, &muxctl->pad_sd1_data0);
  65        writel(gpio_mux_mode0_sion, &muxctl->pad_sd1_data1);
  66        writel(gpio_mux_mode0_sion, &muxctl->pad_sd1_data2);
  67        writel(gpio_mux_mode0_sion, &muxctl->pad_sd1_data3);
  68
  69        /* Setup of digital output for USB power and OC */
  70        writel(gpio_mux_mode5, &muxctl->pad_csi_d3); /* USB Power GPIO1[28] */
  71        gpio_direction_output(IMX_GPIO_NR(1, 28), 1);
  72
  73        writel(gpio_mux_mode5, &muxctl->pad_csi_d2); /* USB OC GPIO1[27] */
  74        gpio_direction_input(IMX_GPIO_NR(1, 18));
  75
  76        /* Setup of digital output control pins */
  77        writel(gpio_mux_mode5, &muxctl->pad_csi_d8); /* Ouput 1 Ctrl GPIO1[7] */
  78        writel(gpio_mux_mode5, &muxctl->pad_csi_d7); /* Ouput 2 Ctrl GPIO1[6] */
  79        writel(gpio_mux_mode5, &muxctl->pad_csi_d6); /* Ouput 1 Stat GPIO1[31]*/
  80        writel(gpio_mux_mode5, &muxctl->pad_csi_d5); /* Ouput 2 Stat GPIO1[30]*/
  81
  82        writel(0, &padctl->pad_csi_d6); /* Ouput 1 Stat pull up off */
  83        writel(0, &padctl->pad_csi_d5); /* Ouput 2 Stat pull up off */
  84
  85        /* Switch both output drivers off */
  86        gpio_direction_output(IMX_GPIO_NR(1, 7), 0);
  87        gpio_direction_output(IMX_GPIO_NR(1, 6), 0);
  88
  89        /* Setup of key input pin GPIO2[29]*/
  90        writel(gpio_mux_mode5 | MX25_PIN_MUX_SION, &muxctl->pad_kpp_row0);
  91        writel(0, &padctl->pad_kpp_row0); /* Key pull up off */
  92        gpio_direction_input(IMX_GPIO_NR(2, 29));
  93
  94        /* Setup of status LED outputs */
  95        writel(gpio_mux_mode5, &muxctl->pad_csi_d9);    /* GPIO4[21] */
  96        writel(gpio_mux_mode5, &muxctl->pad_csi_d4);    /* GPIO1[29] */
  97
  98        /* Switch both LEDs off */
  99        gpio_direction_output(IMX_GPIO_NR(4, 21), 0);
 100        gpio_direction_output(IMX_GPIO_NR(1, 29), 0);
 101
 102        /* Setup of CAN1 and CAN2 signals */
 103        writel(gpio_mux_mode6, &muxctl->pad_gpio_a);    /* CAN1 TX */
 104        writel(gpio_mux_mode6, &muxctl->pad_gpio_b);    /* CAN1 RX */
 105        writel(gpio_mux_mode6, &muxctl->pad_gpio_c);    /* CAN2 TX */
 106        writel(gpio_mux_mode6, &muxctl->pad_gpio_d);    /* CAN2 RX */
 107
 108        /* Setup of input daisy chains for CAN signals*/
 109        writel(input_select1, &inputselect->can1_ipp_ind_canrx); /* CAN1 RX */
 110        writel(input_select1, &inputselect->can2_ipp_ind_canrx); /* CAN2 RX */
 111
 112        /* Setup of I2C3 signals */
 113        writel(gpio_mux_mode1, &muxctl->pad_cspi1_ss1); /* I2C3 SDA */
 114        writel(gpio_mux_mode1, &muxctl->pad_gpio_e);    /* I2C3 SCL */
 115
 116        /* Setup of input daisy chains for I2C3 signals*/
 117        writel(input_select1, &inputselect->i2c3_ipp_sda_in);   /* I2C3 SDA */
 118        writel(input_select2, &inputselect->i2c3_ipp_scl_in);   /* I2C3 SCL */
 119
 120        gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
 121
 122        return 0;
 123}
 124
 125int board_late_init(void)
 126{
 127        const char *e;
 128
 129#ifdef CONFIG_FEC_MXC
 130        struct iomuxc_mux_ctl *muxctl;
 131        u32 gpio_mux_mode2 = MX25_PIN_MUX_MODE(2);
 132        u32 gpio_mux_mode5 = MX25_PIN_MUX_MODE(5);
 133
 134        /*
 135         * fec pin init is generic
 136         */
 137        mx25_fec_init_pins();
 138
 139        /*
 140         * Set up LAN-RESET and FEC_RX_ERR
 141         *
 142         * LAN-RESET:  GPIO3[16] is ALT 5 mode of pin U20
 143         * FEC_RX_ERR: FEC_RX_ERR is ALT 2 mode of pin R2
 144         */
 145        muxctl = (struct iomuxc_mux_ctl *)IMX_IOPADMUX_BASE;
 146
 147        writel(gpio_mux_mode5, &muxctl->pad_upll_bypclk);
 148        writel(gpio_mux_mode2, &muxctl->pad_uart2_cts);
 149
 150        /* assert PHY reset (low) */
 151        gpio_direction_output(IMX_GPIO_NR(3, 16), 0);
 152
 153        udelay(5000);
 154
 155        /* deassert PHY reset */
 156        gpio_set_value(IMX_GPIO_NR(3, 16), 1);
 157
 158        udelay(5000);
 159#endif
 160
 161        e = getenv("gs_base_board");
 162        if (e != NULL) {
 163                if (strcmp(e, "G283") == 0) {
 164                        int key = gpio_get_value(IMX_GPIO_NR(2, 29));
 165
 166                        if (key) {
 167                                /* Switch on both LEDs to inidcate boot mode */
 168                                gpio_set_value(IMX_GPIO_NR(1, 29), 0);
 169                                gpio_set_value(IMX_GPIO_NR(4, 21), 0);
 170
 171                                setenv("preboot", "run gs_slow_boot");
 172                        } else
 173                                setenv("preboot", "run gs_fast_boot");
 174                }
 175        }
 176
 177        return 0;
 178}
 179
 180int dram_init(void)
 181{
 182        /* dram_init must store complete ramsize in gd->ram_size */
 183        gd->ram_size = get_ram_size((void *)PHYS_SDRAM,
 184                                PHYS_SDRAM_SIZE);
 185        return 0;
 186}
 187