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23#include <common.h>
24#include <asm/arch/dsim.h>
25#include <asm/arch/mipi_dsim.h>
26#include <asm/arch/power.h>
27#include <asm/arch/cpu.h>
28
29#include "exynos_mipi_dsi_lowlevel.h"
30#include "exynos_mipi_dsi_common.h"
31
32void exynos_mipi_dsi_func_reset(struct mipi_dsim_device *dsim)
33{
34 unsigned int reg;
35
36 struct exynos_mipi_dsim *mipi_dsim =
37 (struct exynos_mipi_dsim *)samsung_get_base_mipi_dsim();
38
39 reg = readl(&mipi_dsim->swrst);
40
41 reg |= DSIM_FUNCRST;
42
43 writel(reg, &mipi_dsim->swrst);
44}
45
46void exynos_mipi_dsi_sw_reset(struct mipi_dsim_device *dsim)
47{
48 unsigned int reg = 0;
49
50 struct exynos_mipi_dsim *mipi_dsim =
51 (struct exynos_mipi_dsim *)samsung_get_base_mipi_dsim();
52
53 reg = readl(&mipi_dsim->swrst);
54
55 reg |= DSIM_SWRST;
56 reg |= DSIM_FUNCRST;
57
58 writel(reg, &mipi_dsim->swrst);
59}
60
61void exynos_mipi_dsi_sw_release(struct mipi_dsim_device *dsim)
62{
63 struct exynos_mipi_dsim *mipi_dsim =
64 (struct exynos_mipi_dsim *)samsung_get_base_mipi_dsim();
65 unsigned int reg = readl(&mipi_dsim->intsrc);
66
67 reg |= INTSRC_SWRST_RELEASE;
68
69 writel(reg, &mipi_dsim->intsrc);
70}
71
72void exynos_mipi_dsi_set_interrupt_mask(struct mipi_dsim_device *dsim,
73 unsigned int mode, unsigned int mask)
74{
75 struct exynos_mipi_dsim *mipi_dsim =
76 (struct exynos_mipi_dsim *)samsung_get_base_mipi_dsim();
77 unsigned int reg = readl(&mipi_dsim->intmsk);
78
79 if (mask)
80 reg |= mode;
81 else
82 reg &= ~mode;
83
84 writel(reg, &mipi_dsim->intmsk);
85}
86
87void exynos_mipi_dsi_init_fifo_pointer(struct mipi_dsim_device *dsim,
88 unsigned int cfg)
89{
90 unsigned int reg;
91 struct exynos_mipi_dsim *mipi_dsim =
92 (struct exynos_mipi_dsim *)samsung_get_base_mipi_dsim();
93
94 reg = readl(&mipi_dsim->fifoctrl);
95
96 writel(reg & ~(cfg), &mipi_dsim->fifoctrl);
97 udelay(10 * 1000);
98 reg |= cfg;
99
100 writel(reg, &mipi_dsim->fifoctrl);
101}
102
103
104
105
106void exynos_mipi_dsi_set_phy_tunning(struct mipi_dsim_device *dsim,
107 unsigned int value)
108{
109 struct exynos_mipi_dsim *mipi_dsim =
110 (struct exynos_mipi_dsim *)samsung_get_base_mipi_dsim();
111
112 writel(DSIM_AFC_CTL(value), &mipi_dsim->phyacchr);
113}
114
115void exynos_mipi_dsi_set_main_disp_resol(struct mipi_dsim_device *dsim,
116 unsigned int width_resol, unsigned int height_resol)
117{
118 unsigned int reg;
119 struct exynos_mipi_dsim *mipi_dsim =
120 (struct exynos_mipi_dsim *)samsung_get_base_mipi_dsim();
121
122
123 reg = (readl(&mipi_dsim->mdresol)) & ~(DSIM_MAIN_STAND_BY);
124 writel(reg, &mipi_dsim->mdresol);
125
126
127 reg &= ~(DSIM_MAIN_VRESOL(0x7ff) | DSIM_MAIN_HRESOL(0x7ff));
128 reg |= DSIM_MAIN_VRESOL(height_resol) | DSIM_MAIN_HRESOL(width_resol);
129
130 reg |= DSIM_MAIN_STAND_BY;
131 writel(reg, &mipi_dsim->mdresol);
132}
133
134void exynos_mipi_dsi_set_main_disp_vporch(struct mipi_dsim_device *dsim,
135 unsigned int cmd_allow, unsigned int vfront, unsigned int vback)
136{
137 unsigned int reg;
138 struct exynos_mipi_dsim *mipi_dsim =
139 (struct exynos_mipi_dsim *)samsung_get_base_mipi_dsim();
140
141 reg = (readl(&mipi_dsim->mvporch)) &
142 ~((DSIM_CMD_ALLOW_MASK) | (DSIM_STABLE_VFP_MASK) |
143 (DSIM_MAIN_VBP_MASK));
144
145 reg |= ((cmd_allow & 0xf) << DSIM_CMD_ALLOW_SHIFT) |
146 ((vfront & 0x7ff) << DSIM_STABLE_VFP_SHIFT) |
147 ((vback & 0x7ff) << DSIM_MAIN_VBP_SHIFT);
148
149 writel(reg, &mipi_dsim->mvporch);
150}
151
152void exynos_mipi_dsi_set_main_disp_hporch(struct mipi_dsim_device *dsim,
153 unsigned int front, unsigned int back)
154{
155 unsigned int reg;
156 struct exynos_mipi_dsim *mipi_dsim =
157 (struct exynos_mipi_dsim *)samsung_get_base_mipi_dsim();
158
159 reg = (readl(&mipi_dsim->mhporch)) &
160 ~((DSIM_MAIN_HFP_MASK) | (DSIM_MAIN_HBP_MASK));
161
162 reg |= (front << DSIM_MAIN_HFP_SHIFT) | (back << DSIM_MAIN_HBP_SHIFT);
163
164 writel(reg, &mipi_dsim->mhporch);
165}
166
167void exynos_mipi_dsi_set_main_disp_sync_area(struct mipi_dsim_device *dsim,
168 unsigned int vert, unsigned int hori)
169{
170 unsigned int reg;
171 struct exynos_mipi_dsim *mipi_dsim =
172 (struct exynos_mipi_dsim *)samsung_get_base_mipi_dsim();
173
174 reg = (readl(&mipi_dsim->msync)) &
175 ~((DSIM_MAIN_VSA_MASK) | (DSIM_MAIN_HSA_MASK));
176
177 reg |= ((vert & 0x3ff) << DSIM_MAIN_VSA_SHIFT) |
178 (hori << DSIM_MAIN_HSA_SHIFT);
179
180 writel(reg, &mipi_dsim->msync);
181}
182
183void exynos_mipi_dsi_set_sub_disp_resol(struct mipi_dsim_device *dsim,
184 unsigned int vert, unsigned int hori)
185{
186 unsigned int reg;
187 struct exynos_mipi_dsim *mipi_dsim =
188 (struct exynos_mipi_dsim *)samsung_get_base_mipi_dsim();
189
190 reg = (readl(&mipi_dsim->sdresol)) &
191 ~(DSIM_SUB_STANDY_MASK);
192
193 writel(reg, &mipi_dsim->sdresol);
194
195 reg &= ~(DSIM_SUB_VRESOL_MASK) | ~(DSIM_SUB_HRESOL_MASK);
196 reg |= ((vert & 0x7ff) << DSIM_SUB_VRESOL_SHIFT) |
197 ((hori & 0x7ff) << DSIM_SUB_HRESOL_SHIFT);
198 writel(reg, &mipi_dsim->sdresol);
199
200
201 reg |= (1 << DSIM_SUB_STANDY_SHIFT);
202 writel(reg, &mipi_dsim->sdresol);
203}
204
205void exynos_mipi_dsi_init_config(struct mipi_dsim_device *dsim)
206{
207 struct mipi_dsim_config *dsim_config = dsim->dsim_config;
208 struct exynos_mipi_dsim *mipi_dsim =
209 (struct exynos_mipi_dsim *)samsung_get_base_mipi_dsim();
210 unsigned int cfg = (readl(&mipi_dsim->config)) &
211 ~((1 << DSIM_EOT_PACKET_SHIFT) |
212 (0x1f << DSIM_HSA_MODE_SHIFT) |
213 (0x3 << DSIM_NUM_OF_DATALANE_SHIFT));
214
215 cfg |= (dsim_config->auto_flush << DSIM_AUTO_FLUSH_SHIFT) |
216 (dsim_config->eot_disable << DSIM_EOT_PACKET_SHIFT) |
217 (dsim_config->auto_vertical_cnt << DSIM_AUTO_MODE_SHIFT) |
218 (dsim_config->hse << DSIM_HSE_MODE_SHIFT) |
219 (dsim_config->hfp << DSIM_HFP_MODE_SHIFT) |
220 (dsim_config->hbp << DSIM_HBP_MODE_SHIFT) |
221 (dsim_config->hsa << DSIM_HSA_MODE_SHIFT) |
222 (dsim_config->e_no_data_lane << DSIM_NUM_OF_DATALANE_SHIFT);
223
224 writel(cfg, &mipi_dsim->config);
225}
226
227void exynos_mipi_dsi_display_config(struct mipi_dsim_device *dsim,
228 struct mipi_dsim_config *dsim_config)
229{
230 struct exynos_mipi_dsim *mipi_dsim =
231 (struct exynos_mipi_dsim *)samsung_get_base_mipi_dsim();
232
233 u32 reg = (readl(&mipi_dsim->config)) &
234 ~((0x3 << DSIM_BURST_MODE_SHIFT) | (1 << DSIM_VIDEO_MODE_SHIFT)
235 | (0x3 << DSIM_MAINVC_SHIFT) | (0x7 << DSIM_MAINPIX_SHIFT)
236 | (0x3 << DSIM_SUBVC_SHIFT) | (0x7 << DSIM_SUBPIX_SHIFT));
237
238 if (dsim_config->e_interface == DSIM_VIDEO)
239 reg |= (1 << DSIM_VIDEO_MODE_SHIFT);
240 else if (dsim_config->e_interface == DSIM_COMMAND)
241 reg &= ~(1 << DSIM_VIDEO_MODE_SHIFT);
242 else {
243 printf("unknown lcd type.\n");
244 return;
245 }
246
247
248 reg |= ((u8) (dsim_config->e_burst_mode) & 0x3) << DSIM_BURST_MODE_SHIFT
249 | ((u8) (dsim_config->e_virtual_ch) & 0x3) << DSIM_MAINVC_SHIFT
250 | ((u8) (dsim_config->e_pixel_format) & 0x7) << DSIM_MAINPIX_SHIFT;
251
252 writel(reg, &mipi_dsim->config);
253}
254
255void exynos_mipi_dsi_enable_lane(struct mipi_dsim_device *dsim,
256 unsigned int lane, unsigned int enable)
257{
258 unsigned int reg;
259 struct exynos_mipi_dsim *mipi_dsim =
260 (struct exynos_mipi_dsim *)samsung_get_base_mipi_dsim();
261
262 reg = readl(&mipi_dsim->config);
263
264 if (enable)
265 reg |= DSIM_LANE_ENx(lane);
266 else
267 reg &= ~DSIM_LANE_ENx(lane);
268
269 writel(reg, &mipi_dsim->config);
270}
271
272void exynos_mipi_dsi_set_data_lane_number(struct mipi_dsim_device *dsim,
273 unsigned int count)
274{
275 unsigned int cfg;
276 struct exynos_mipi_dsim *mipi_dsim =
277 (struct exynos_mipi_dsim *)samsung_get_base_mipi_dsim();
278
279
280 cfg = DSIM_NUM_OF_DATA_LANE(count);
281
282 writel(cfg, &mipi_dsim->config);
283}
284
285void exynos_mipi_dsi_enable_afc(struct mipi_dsim_device *dsim,
286 unsigned int enable, unsigned int afc_code)
287{
288 struct exynos_mipi_dsim *mipi_dsim =
289 (struct exynos_mipi_dsim *)samsung_get_base_mipi_dsim();
290 unsigned int reg = readl(&mipi_dsim->phyacchr);
291
292 reg = 0;
293
294 if (enable) {
295 reg |= DSIM_AFC_EN;
296 reg &= ~(0x7 << DSIM_AFC_CTL_SHIFT);
297 reg |= DSIM_AFC_CTL(afc_code);
298 } else
299 reg &= ~DSIM_AFC_EN;
300
301 writel(reg, &mipi_dsim->phyacchr);
302}
303
304void exynos_mipi_dsi_enable_pll_bypass(struct mipi_dsim_device *dsim,
305 unsigned int enable)
306{
307 struct exynos_mipi_dsim *mipi_dsim =
308 (struct exynos_mipi_dsim *)samsung_get_base_mipi_dsim();
309 unsigned int reg = (readl(&mipi_dsim->clkctrl)) &
310 ~(DSIM_PLL_BYPASS_EXTERNAL);
311
312 reg |= enable << DSIM_PLL_BYPASS_SHIFT;
313
314 writel(reg, &mipi_dsim->clkctrl);
315}
316
317void exynos_mipi_dsi_pll_freq_band(struct mipi_dsim_device *dsim,
318 unsigned int freq_band)
319{
320 struct exynos_mipi_dsim *mipi_dsim =
321 (struct exynos_mipi_dsim *)samsung_get_base_mipi_dsim();
322 unsigned int reg = (readl(&mipi_dsim->pllctrl)) &
323 ~(0x1f << DSIM_FREQ_BAND_SHIFT);
324
325 reg |= ((freq_band & 0x1f) << DSIM_FREQ_BAND_SHIFT);
326
327 writel(reg, &mipi_dsim->pllctrl);
328}
329
330void exynos_mipi_dsi_pll_freq(struct mipi_dsim_device *dsim,
331 unsigned int pre_divider, unsigned int main_divider,
332 unsigned int scaler)
333{
334 struct exynos_mipi_dsim *mipi_dsim =
335 (struct exynos_mipi_dsim *)samsung_get_base_mipi_dsim();
336 unsigned int reg = (readl(&mipi_dsim->pllctrl)) &
337 ~(0x7ffff << 1);
338
339 reg |= ((pre_divider & 0x3f) << DSIM_PREDIV_SHIFT) |
340 ((main_divider & 0x1ff) << DSIM_MAIN_SHIFT) |
341 ((scaler & 0x7) << DSIM_SCALER_SHIFT);
342
343 writel(reg, &mipi_dsim->pllctrl);
344}
345
346void exynos_mipi_dsi_pll_stable_time(struct mipi_dsim_device *dsim,
347 unsigned int lock_time)
348{
349 struct exynos_mipi_dsim *mipi_dsim =
350 (struct exynos_mipi_dsim *)samsung_get_base_mipi_dsim();
351
352 writel(lock_time, &mipi_dsim->plltmr);
353}
354
355void exynos_mipi_dsi_enable_pll(struct mipi_dsim_device *dsim,
356 unsigned int enable)
357{
358 struct exynos_mipi_dsim *mipi_dsim =
359 (struct exynos_mipi_dsim *)samsung_get_base_mipi_dsim();
360 unsigned int reg = (readl(&mipi_dsim->pllctrl)) &
361 ~(0x1 << DSIM_PLL_EN_SHIFT);
362
363 reg |= ((enable & 0x1) << DSIM_PLL_EN_SHIFT);
364
365 writel(reg, &mipi_dsim->pllctrl);
366}
367
368void exynos_mipi_dsi_set_byte_clock_src(struct mipi_dsim_device *dsim,
369 unsigned int src)
370{
371 struct exynos_mipi_dsim *mipi_dsim =
372 (struct exynos_mipi_dsim *)samsung_get_base_mipi_dsim();
373 unsigned int reg = (readl(&mipi_dsim->clkctrl)) &
374 ~(0x3 << DSIM_BYTE_CLK_SRC_SHIFT);
375
376 reg |= ((unsigned int) src) << DSIM_BYTE_CLK_SRC_SHIFT;
377
378 writel(reg, &mipi_dsim->clkctrl);
379}
380
381void exynos_mipi_dsi_enable_byte_clock(struct mipi_dsim_device *dsim,
382 unsigned int enable)
383{
384 struct exynos_mipi_dsim *mipi_dsim =
385 (struct exynos_mipi_dsim *)samsung_get_base_mipi_dsim();
386 unsigned int reg = (readl(&mipi_dsim->clkctrl)) &
387 ~(1 << DSIM_BYTE_CLKEN_SHIFT);
388
389 reg |= enable << DSIM_BYTE_CLKEN_SHIFT;
390
391 writel(reg, &mipi_dsim->clkctrl);
392}
393
394void exynos_mipi_dsi_set_esc_clk_prs(struct mipi_dsim_device *dsim,
395 unsigned int enable, unsigned int prs_val)
396{
397 struct exynos_mipi_dsim *mipi_dsim =
398 (struct exynos_mipi_dsim *)samsung_get_base_mipi_dsim();
399 unsigned int reg = (readl(&mipi_dsim->clkctrl)) &
400 ~((1 << DSIM_ESC_CLKEN_SHIFT) | (0xffff));
401
402 reg |= enable << DSIM_ESC_CLKEN_SHIFT;
403 if (enable)
404 reg |= prs_val;
405
406 writel(reg, &mipi_dsim->clkctrl);
407}
408
409void exynos_mipi_dsi_enable_esc_clk_on_lane(struct mipi_dsim_device *dsim,
410 unsigned int lane_sel, unsigned int enable)
411{
412 struct exynos_mipi_dsim *mipi_dsim =
413 (struct exynos_mipi_dsim *)samsung_get_base_mipi_dsim();
414 unsigned int reg = readl(&mipi_dsim->clkctrl);
415
416 if (enable)
417 reg |= DSIM_LANE_ESC_CLKEN(lane_sel);
418 else
419 reg &= ~DSIM_LANE_ESC_CLKEN(lane_sel);
420
421 writel(reg, &mipi_dsim->clkctrl);
422}
423
424void exynos_mipi_dsi_force_dphy_stop_state(struct mipi_dsim_device *dsim,
425 unsigned int enable)
426{
427 struct exynos_mipi_dsim *mipi_dsim =
428 (struct exynos_mipi_dsim *)samsung_get_base_mipi_dsim();
429 unsigned int reg = (readl(&mipi_dsim->escmode)) &
430 ~(0x1 << DSIM_FORCE_STOP_STATE_SHIFT);
431
432 reg |= ((enable & 0x1) << DSIM_FORCE_STOP_STATE_SHIFT);
433
434 writel(reg, &mipi_dsim->escmode);
435}
436
437unsigned int exynos_mipi_dsi_is_lane_state(struct mipi_dsim_device *dsim)
438{
439 struct exynos_mipi_dsim *mipi_dsim =
440 (struct exynos_mipi_dsim *)samsung_get_base_mipi_dsim();
441 unsigned int reg = readl(&mipi_dsim->status);
442
443
444
445
446
447
448
449 if ((reg & DSIM_STOP_STATE_DAT(0xf)) &&
450 ((reg & DSIM_STOP_STATE_CLK) ||
451 (reg & DSIM_TX_READY_HS_CLK)))
452 return 1;
453 else
454 return 0;
455}
456
457void exynos_mipi_dsi_set_stop_state_counter(struct mipi_dsim_device *dsim,
458 unsigned int cnt_val)
459{
460 struct exynos_mipi_dsim *mipi_dsim =
461 (struct exynos_mipi_dsim *)samsung_get_base_mipi_dsim();
462 unsigned int reg = (readl(&mipi_dsim->escmode)) &
463 ~(0x7ff << DSIM_STOP_STATE_CNT_SHIFT);
464
465 reg |= ((cnt_val & 0x7ff) << DSIM_STOP_STATE_CNT_SHIFT);
466
467 writel(reg, &mipi_dsim->escmode);
468}
469
470void exynos_mipi_dsi_set_bta_timeout(struct mipi_dsim_device *dsim,
471 unsigned int timeout)
472{
473 struct exynos_mipi_dsim *mipi_dsim =
474 (struct exynos_mipi_dsim *)samsung_get_base_mipi_dsim();
475 unsigned int reg = (readl(&mipi_dsim->timeout)) &
476 ~(0xff << DSIM_BTA_TOUT_SHIFT);
477
478 reg |= (timeout << DSIM_BTA_TOUT_SHIFT);
479
480 writel(reg, &mipi_dsim->timeout);
481}
482
483void exynos_mipi_dsi_set_lpdr_timeout(struct mipi_dsim_device *dsim,
484 unsigned int timeout)
485{
486 struct exynos_mipi_dsim *mipi_dsim =
487 (struct exynos_mipi_dsim *)samsung_get_base_mipi_dsim();
488 unsigned int reg = (readl(&mipi_dsim->timeout)) &
489 ~(0xffff << DSIM_LPDR_TOUT_SHIFT);
490
491 reg |= (timeout << DSIM_LPDR_TOUT_SHIFT);
492
493 writel(reg, &mipi_dsim->timeout);
494}
495
496void exynos_mipi_dsi_set_cpu_transfer_mode(struct mipi_dsim_device *dsim,
497 unsigned int lp)
498{
499 struct exynos_mipi_dsim *mipi_dsim =
500 (struct exynos_mipi_dsim *)samsung_get_base_mipi_dsim();
501 unsigned int reg = readl(&mipi_dsim->escmode);
502
503 reg &= ~DSIM_CMD_LPDT_LP;
504
505 if (lp)
506 reg |= DSIM_CMD_LPDT_LP;
507
508 writel(reg, &mipi_dsim->escmode);
509}
510
511void exynos_mipi_dsi_set_lcdc_transfer_mode(struct mipi_dsim_device *dsim,
512 unsigned int lp)
513{
514 struct exynos_mipi_dsim *mipi_dsim =
515 (struct exynos_mipi_dsim *)samsung_get_base_mipi_dsim();
516 unsigned int reg = readl(&mipi_dsim->escmode);
517
518 reg &= ~DSIM_TX_LPDT_LP;
519
520 if (lp)
521 reg |= DSIM_TX_LPDT_LP;
522
523 writel(reg, &mipi_dsim->escmode);
524}
525
526void exynos_mipi_dsi_enable_hs_clock(struct mipi_dsim_device *dsim,
527 unsigned int enable)
528{
529 struct exynos_mipi_dsim *mipi_dsim =
530 (struct exynos_mipi_dsim *)samsung_get_base_mipi_dsim();
531 unsigned int reg = (readl(&mipi_dsim->clkctrl)) &
532 ~(1 << DSIM_TX_REQUEST_HSCLK_SHIFT);
533
534 reg |= enable << DSIM_TX_REQUEST_HSCLK_SHIFT;
535
536 writel(reg, &mipi_dsim->clkctrl);
537}
538
539void exynos_mipi_dsi_dp_dn_swap(struct mipi_dsim_device *dsim,
540 unsigned int swap_en)
541{
542 struct exynos_mipi_dsim *mipi_dsim =
543 (struct exynos_mipi_dsim *)samsung_get_base_mipi_dsim();
544 unsigned int reg = readl(&mipi_dsim->phyacchr1);
545
546 reg &= ~(0x3 << DSIM_DPDN_SWAP_DATA_SHIFT);
547 reg |= (swap_en & 0x3) << DSIM_DPDN_SWAP_DATA_SHIFT;
548
549 writel(reg, &mipi_dsim->phyacchr1);
550}
551
552void exynos_mipi_dsi_hs_zero_ctrl(struct mipi_dsim_device *dsim,
553 unsigned int hs_zero)
554{
555 struct exynos_mipi_dsim *mipi_dsim =
556 (struct exynos_mipi_dsim *)samsung_get_base_mipi_dsim();
557 unsigned int reg = (readl(&mipi_dsim->pllctrl)) &
558 ~(0xf << DSIM_ZEROCTRL_SHIFT);
559
560 reg |= ((hs_zero & 0xf) << DSIM_ZEROCTRL_SHIFT);
561
562 writel(reg, &mipi_dsim->pllctrl);
563}
564
565void exynos_mipi_dsi_prep_ctrl(struct mipi_dsim_device *dsim, unsigned int prep)
566{
567 struct exynos_mipi_dsim *mipi_dsim =
568 (struct exynos_mipi_dsim *)samsung_get_base_mipi_dsim();
569 unsigned int reg = (readl(&mipi_dsim->pllctrl)) &
570 ~(0x7 << DSIM_PRECTRL_SHIFT);
571
572 reg |= ((prep & 0x7) << DSIM_PRECTRL_SHIFT);
573
574 writel(reg, &mipi_dsim->pllctrl);
575}
576
577void exynos_mipi_dsi_clear_interrupt(struct mipi_dsim_device *dsim)
578{
579 struct exynos_mipi_dsim *mipi_dsim =
580 (struct exynos_mipi_dsim *)samsung_get_base_mipi_dsim();
581 unsigned int reg = readl(&mipi_dsim->intsrc);
582
583 reg |= INTSRC_PLL_STABLE;
584
585 writel(reg, &mipi_dsim->intsrc);
586}
587
588void exynos_mipi_dsi_clear_all_interrupt(struct mipi_dsim_device *dsim)
589{
590 struct exynos_mipi_dsim *mipi_dsim =
591 (struct exynos_mipi_dsim *)samsung_get_base_mipi_dsim();
592
593 writel(0xffffffff, &mipi_dsim->intsrc);
594}
595
596unsigned int exynos_mipi_dsi_is_pll_stable(struct mipi_dsim_device *dsim)
597{
598 unsigned int reg;
599 struct exynos_mipi_dsim *mipi_dsim =
600 (struct exynos_mipi_dsim *)samsung_get_base_mipi_dsim();
601
602 reg = readl(&mipi_dsim->status);
603
604 return reg & DSIM_PLL_STABLE ? 1 : 0;
605}
606
607unsigned int exynos_mipi_dsi_get_fifo_state(struct mipi_dsim_device *dsim)
608{
609 struct exynos_mipi_dsim *mipi_dsim =
610 (struct exynos_mipi_dsim *)samsung_get_base_mipi_dsim();
611
612 return readl(&mipi_dsim->fifoctrl) & ~(0x1f);
613}
614
615void exynos_mipi_dsi_wr_tx_header(struct mipi_dsim_device *dsim,
616 unsigned int di, unsigned int data0, unsigned int data1)
617{
618 struct exynos_mipi_dsim *mipi_dsim =
619 (struct exynos_mipi_dsim *)samsung_get_base_mipi_dsim();
620 unsigned int reg = (DSIM_PKTHDR_DAT1(data1) | DSIM_PKTHDR_DAT0(data0) |
621 DSIM_PKTHDR_DI(di));
622
623 writel(reg, &mipi_dsim->pkthdr);
624}
625
626unsigned int _exynos_mipi_dsi_get_frame_done_status(struct mipi_dsim_device
627 *dsim)
628{
629 struct exynos_mipi_dsim *mipi_dsim =
630 (struct exynos_mipi_dsim *)samsung_get_base_mipi_dsim();
631 unsigned int reg = readl(&mipi_dsim->intsrc);
632
633 return (reg & INTSRC_FRAME_DONE) ? 1 : 0;
634}
635
636void _exynos_mipi_dsi_clear_frame_done(struct mipi_dsim_device *dsim)
637{
638 struct exynos_mipi_dsim *mipi_dsim =
639 (struct exynos_mipi_dsim *)samsung_get_base_mipi_dsim();
640 unsigned int reg = readl(&mipi_dsim->intsrc);
641
642 writel(reg | INTSRC_FRAME_DONE, &mipi_dsim->intsrc);
643}
644
645void exynos_mipi_dsi_wr_tx_data(struct mipi_dsim_device *dsim,
646 unsigned int tx_data)
647{
648 struct exynos_mipi_dsim *mipi_dsim =
649 (struct exynos_mipi_dsim *)samsung_get_base_mipi_dsim();
650
651 writel(tx_data, &mipi_dsim->payload);
652}
653
