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25
26#ifndef __CONFIG_H
27#define __CONFIG_H
28
29
30#define CONFIG_BOOKE 1
31#define CONFIG_E500 1
32#define CONFIG_MPC85xx 1
33#define CONFIG_MPC8568 1
34#define CONFIG_MPC8568MDS 1
35
36#define CONFIG_SYS_TEXT_BASE 0xfff80000
37
38#define CONFIG_SYS_SRIO
39#define CONFIG_SRIO1
40
41#define CONFIG_PCI 1
42#define CONFIG_PCI1 1
43#define CONFIG_PCIE1 1
44#define CONFIG_FSL_PCI_INIT 1
45#define CONFIG_FSL_PCIE_RESET 1
46#define CONFIG_SYS_PCI_64BIT 1
47#define CONFIG_TSEC_ENET
48#define CONFIG_QE
49#define CONFIG_ENV_OVERWRITE
50#define CONFIG_FSL_LAW 1
51
52#ifndef __ASSEMBLY__
53extern unsigned long get_clock_freq(void);
54#endif
55#define CONFIG_SYS_CLK_FREQ 66000000
56
57
58
59
60#define CONFIG_L2_CACHE
61#define CONFIG_BTB
62
63
64
65
66#define CONFIG_ENABLE_36BIT_PHYS 1
67
68
69#define CONFIG_BOARD_EARLY_INIT_F 1
70
71#define CONFIG_SYS_MEMTEST_START 0x00200000
72#define CONFIG_SYS_MEMTEST_END 0x00400000
73
74#define CONFIG_SYS_CCSRBAR 0xe0000000
75#define CONFIG_SYS_CCSRBAR_PHYS_LOW CONFIG_SYS_CCSRBAR
76
77
78#define CONFIG_FSL_DDR2
79#undef CONFIG_FSL_DDR_INTERACTIVE
80#define CONFIG_SPD_EEPROM
81#define CONFIG_DDR_SPD
82#define CONFIG_ECC_INIT_VIA_DDRCONTROLLER
83
84#define CONFIG_MEM_INIT_VALUE 0xDeadBeef
85
86#define CONFIG_SYS_DDR_SDRAM_BASE 0x00000000
87#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE
88
89#define CONFIG_NUM_DDR_CONTROLLERS 1
90#define CONFIG_DIMM_SLOTS_PER_CTLR 1
91#define CONFIG_CHIP_SELECTS_PER_CTRL (2 * CONFIG_DIMM_SLOTS_PER_CTLR)
92
93
94#define SPD_EEPROM_ADDRESS 0x51
95
96
97#ifndef CONFIG_SPD_EEPROM
98#error ("CONFIG_SPD_EEPROM is required")
99#endif
100
101#undef CONFIG_CLOCKS_IN_MHZ
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135
136#define CONFIG_SYS_BCSR_BASE 0xf8000000
137
138#define CONFIG_SYS_FLASH_BASE 0xfe000000
139
140
141#define CONFIG_SYS_BR0_PRELIM 0xfe001001
142#define CONFIG_SYS_OR0_PRELIM 0xfe006ff7
143
144
145#define CONFIG_SYS_BR1_PRELIM 0xf8000801
146#define CONFIG_SYS_OR1_PRELIM 0xffffe9f7
147
148
149#define CONFIG_SYS_MAX_FLASH_BANKS 1
150#define CONFIG_SYS_MAX_FLASH_SECT 512
151#undef CONFIG_SYS_FLASH_CHECKSUM
152#define CONFIG_SYS_FLASH_ERASE_TOUT 60000
153#define CONFIG_SYS_FLASH_WRITE_TOUT 500
154
155#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
156
157#define CONFIG_FLASH_CFI_DRIVER
158#define CONFIG_SYS_FLASH_CFI
159#define CONFIG_SYS_FLASH_EMPTY_INFO
160
161
162
163
164
165#define CONFIG_SYS_LBC_SDRAM_BASE 0xf0000000
166#define CONFIG_SYS_LBC_SDRAM_SIZE 64
167
168
169
170#define CONFIG_SYS_BR2_PRELIM 0xf0001861
171#define CONFIG_SYS_OR2_PRELIM 0xfc006901
172
173#define CONFIG_SYS_LBC_LCRR 0x00030004
174#define CONFIG_SYS_LBC_LBCR 0x00000000
175#define CONFIG_SYS_LBC_LSRT 0x20000000
176#define CONFIG_SYS_LBC_MRTPR 0x00000000
177
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182
183
184#define CONFIG_SYS_LBC_LSDMR_COMMON ( LSDMR_RFCR16 \
185 | LSDMR_PRETOACT7 \
186 | LSDMR_ACTTORW7 \
187 | LSDMR_BL8 \
188 | LSDMR_WRC4 \
189 | LSDMR_CL3 \
190 | LSDMR_RFEN \
191 )
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221
222#define CONFIG_SYS_BCSR (0xf8000000)
223
224
225#define CONFIG_SYS_BR4_PRELIM 0xf8008801
226#define CONFIG_SYS_OR4_PRELIM 0xffffe9f7
227
228
229#define CONFIG_SYS_BR5_PRELIM 0xf8010801
230#define CONFIG_SYS_OR5_PRELIM 0xffff69f7
231
232#define CONFIG_SYS_INIT_RAM_LOCK 1
233#define CONFIG_SYS_INIT_RAM_ADDR 0xe4010000
234#define CONFIG_SYS_INIT_RAM_SIZE 0x4000
235
236#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
237#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
238
239#define CONFIG_SYS_MONITOR_LEN (256 * 1024)
240#define CONFIG_SYS_MALLOC_LEN (128 * 1024)
241
242
243#define CONFIG_CONS_INDEX 1
244#define CONFIG_SYS_NS16550
245#define CONFIG_SYS_NS16550_SERIAL
246#define CONFIG_SYS_NS16550_REG_SIZE 1
247#define CONFIG_SYS_NS16550_CLK get_bus_freq(0)
248
249#define CONFIG_SYS_BAUDRATE_TABLE \
250 {300, 600, 1200, 2400, 4800, 9600, 19200, 38400,115200}
251
252#define CONFIG_SYS_NS16550_COM1 (CONFIG_SYS_CCSRBAR+0x4500)
253#define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_CCSRBAR+0x4600)
254
255
256#define CONFIG_SYS_HUSH_PARSER
257#ifdef CONFIG_SYS_HUSH_PARSER
258#endif
259
260
261#define CONFIG_OF_LIBFDT 1
262#define CONFIG_OF_BOARD_SETUP 1
263#define CONFIG_OF_STDOUT_VIA_ALIAS 1
264
265
266
267
268#define CONFIG_FSL_I2C
269#define CONFIG_HARD_I2C
270#undef CONFIG_SOFT_I2C
271#define CONFIG_I2C_MULTI_BUS
272#define CONFIG_SYS_I2C_SPEED 400000
273#define CONFIG_SYS_I2C_EEPROM_ADDR 0x52
274#define CONFIG_SYS_I2C_SLAVE 0x7F
275#define CONFIG_SYS_I2C_NOPROBES {{0,0x69}}
276#define CONFIG_SYS_I2C_OFFSET 0x3000
277#define CONFIG_SYS_I2C2_OFFSET 0x3100
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282
283#define CONFIG_SYS_PCI1_MEM_VIRT 0x80000000
284#define CONFIG_SYS_PCI1_MEM_BUS 0x80000000
285#define CONFIG_SYS_PCI1_MEM_PHYS 0x80000000
286#define CONFIG_SYS_PCI1_MEM_SIZE 0x20000000
287#define CONFIG_SYS_PCI1_IO_VIRT 0xe2000000
288#define CONFIG_SYS_PCI1_IO_BUS 0x00000000
289#define CONFIG_SYS_PCI1_IO_PHYS 0xe2000000
290#define CONFIG_SYS_PCI1_IO_SIZE 0x00800000
291
292#define CONFIG_SYS_PCIE1_NAME "Slot"
293#define CONFIG_SYS_PCIE1_MEM_VIRT 0xa0000000
294#define CONFIG_SYS_PCIE1_MEM_BUS 0xa0000000
295#define CONFIG_SYS_PCIE1_MEM_PHYS 0xa0000000
296#define CONFIG_SYS_PCIE1_MEM_SIZE 0x20000000
297#define CONFIG_SYS_PCIE1_IO_VIRT 0xe2800000
298#define CONFIG_SYS_PCIE1_IO_BUS 0x00000000
299#define CONFIG_SYS_PCIE1_IO_PHYS 0xe2800000
300#define CONFIG_SYS_PCIE1_IO_SIZE 0x00800000
301
302#define CONFIG_SYS_SRIO1_MEM_VIRT 0xC0000000
303#define CONFIG_SYS_SRIO1_MEM_BUS 0xC0000000
304#define CONFIG_SYS_SRIO1_MEM_PHYS CONFIG_SYS_SRIO1_MEM_BUS
305#define CONFIG_SYS_SRIO1_MEM_SIZE 0x20000000
306
307#ifdef CONFIG_QE
308
309
310
311#define CONFIG_UEC_ETH
312#ifndef CONFIG_TSEC_ENET
313#define CONFIG_ETHPRIME "UEC0"
314#endif
315#define CONFIG_PHY_MODE_NEED_CHANGE
316#define CONFIG_eTSEC_MDIO_BUS
317
318#ifdef CONFIG_eTSEC_MDIO_BUS
319#define CONFIG_MIIM_ADDRESS 0xE0024520
320#endif
321
322#define CONFIG_UEC_ETH1
323
324#ifdef CONFIG_UEC_ETH1
325#define CONFIG_SYS_UEC1_UCC_NUM 0
326#define CONFIG_SYS_UEC1_RX_CLK QE_CLK_NONE
327#define CONFIG_SYS_UEC1_TX_CLK QE_CLK16
328#define CONFIG_SYS_UEC1_ETH_TYPE GIGA_ETH
329#define CONFIG_SYS_UEC1_PHY_ADDR 7
330#define CONFIG_SYS_UEC1_INTERFACE_TYPE PHY_INTERFACE_MODE_RGMII_ID
331#define CONFIG_SYS_UEC1_INTERFACE_SPEED 1000
332#endif
333
334#define CONFIG_UEC_ETH2
335
336#ifdef CONFIG_UEC_ETH2
337#define CONFIG_SYS_UEC2_UCC_NUM 1
338#define CONFIG_SYS_UEC2_RX_CLK QE_CLK_NONE
339#define CONFIG_SYS_UEC2_TX_CLK QE_CLK16
340#define CONFIG_SYS_UEC2_ETH_TYPE GIGA_ETH
341#define CONFIG_SYS_UEC2_PHY_ADDR 1
342#define CONFIG_SYS_UEC2_INTERFACE_TYPE PHY_INTERFACE_MODE_RGMII_ID
343#define CONFIG_SYS_UEC2_INTERFACE_SPEED 1000
344#endif
345#endif
346
347#if defined(CONFIG_PCI)
348
349#define CONFIG_PCI_PNP
350
351#undef CONFIG_EEPRO100
352#undef CONFIG_TULIP
353
354#undef CONFIG_PCI_SCAN_SHOW
355#define CONFIG_SYS_PCI_SUBSYS_VENDORID 0x1057
356
357#endif
358
359#if defined(CONFIG_TSEC_ENET)
360
361#define CONFIG_MII 1
362#define CONFIG_TSEC1 1
363#define CONFIG_TSEC1_NAME "eTSEC0"
364#define CONFIG_TSEC2 1
365#define CONFIG_TSEC2_NAME "eTSEC1"
366
367#define TSEC1_PHY_ADDR 2
368#define TSEC2_PHY_ADDR 3
369
370#define TSEC1_PHYIDX 0
371#define TSEC2_PHYIDX 0
372
373#define TSEC1_FLAGS TSEC_GIGABIT
374#define TSEC2_FLAGS TSEC_GIGABIT
375
376
377#define CONFIG_ETHPRIME "eTSEC0"
378
379#endif
380
381
382
383
384#define CONFIG_ENV_IS_IN_FLASH 1
385#define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE + 0x40000)
386#define CONFIG_ENV_SECT_SIZE 0x40000
387#define CONFIG_ENV_SIZE 0x2000
388
389#define CONFIG_LOADS_ECHO 1
390#define CONFIG_SYS_LOADS_BAUD_CHANGE 1
391
392
393
394
395
396#define CONFIG_BOOTP_BOOTFILESIZE
397#define CONFIG_BOOTP_BOOTPATH
398#define CONFIG_BOOTP_GATEWAY
399#define CONFIG_BOOTP_HOSTNAME
400
401
402
403
404
405#include <config_cmd_default.h>
406
407#define CONFIG_CMD_PING
408#define CONFIG_CMD_I2C
409#define CONFIG_CMD_MII
410#define CONFIG_CMD_ELF
411#define CONFIG_CMD_IRQ
412#define CONFIG_CMD_SETEXPR
413#define CONFIG_CMD_REGINFO
414
415#if defined(CONFIG_PCI)
416 #define CONFIG_CMD_PCI
417#endif
418
419
420#undef CONFIG_WATCHDOG
421
422
423
424
425#define CONFIG_SYS_LONGHELP
426#define CONFIG_CMDLINE_EDITING
427#define CONFIG_AUTO_COMPLETE
428#define CONFIG_SYS_LOAD_ADDR 0x2000000
429#define CONFIG_SYS_PROMPT "=> "
430#if defined(CONFIG_CMD_KGDB)
431#define CONFIG_SYS_CBSIZE 1024
432#else
433#define CONFIG_SYS_CBSIZE 256
434#endif
435#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
436#define CONFIG_SYS_MAXARGS 16
437#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
438#define CONFIG_SYS_HZ 1000
439
440
441
442
443
444
445#define CONFIG_SYS_BOOTMAPSZ (64 << 20)
446#define CONFIG_SYS_BOOTM_LEN (64 << 20)
447
448#if defined(CONFIG_CMD_KGDB)
449#define CONFIG_KGDB_BAUDRATE 230400
450#define CONFIG_KGDB_SER_INDEX 2
451#endif
452
453
454
455
456
457
458#if defined(CONFIG_TSEC_ENET) || defined(CONFIG_UEC_ETH)
459#define CONFIG_HAS_ETH0
460#define CONFIG_ETHADDR 00:E0:0C:00:00:FD
461#define CONFIG_HAS_ETH1
462#define CONFIG_ETH1ADDR 00:E0:0C:00:01:FD
463#define CONFIG_HAS_ETH2
464#define CONFIG_ETH2ADDR 00:E0:0C:00:02:FD
465#define CONFIG_HAS_ETH3
466#define CONFIG_ETH3ADDR 00:E0:0C:00:03:FD
467#endif
468
469#define CONFIG_IPADDR 192.168.1.253
470
471#define CONFIG_HOSTNAME unknown
472#define CONFIG_ROOTPATH "/nfsroot"
473#define CONFIG_BOOTFILE "your.uImage"
474
475#define CONFIG_SERVERIP 192.168.1.1
476#define CONFIG_GATEWAYIP 192.168.1.1
477#define CONFIG_NETMASK 255.255.255.0
478
479#define CONFIG_LOADADDR 200000
480
481#define CONFIG_BOOTDELAY 10
482#undef CONFIG_BOOTARGS
483
484#define CONFIG_BAUDRATE 115200
485
486#define CONFIG_EXTRA_ENV_SETTINGS \
487 "netdev=eth0\0" \
488 "consoledev=ttyS0\0" \
489 "ramdiskaddr=600000\0" \
490 "ramdiskfile=your.ramdisk.u-boot\0" \
491 "fdtaddr=400000\0" \
492 "fdtfile=your.fdt.dtb\0" \
493 "nfsargs=setenv bootargs root=/dev/nfs rw " \
494 "nfsroot=$serverip:$rootpath " \
495 "ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname:$netdev:off " \
496 "console=$consoledev,$baudrate $othbootargs\0" \
497 "ramargs=setenv bootargs root=/dev/ram rw " \
498 "console=$consoledev,$baudrate $othbootargs\0" \
499
500
501#define CONFIG_NFSBOOTCOMMAND \
502 "run nfsargs;" \
503 "tftp $loadaddr $bootfile;" \
504 "tftp $fdtaddr $fdtfile;" \
505 "bootm $loadaddr - $fdtaddr"
506
507
508#define CONFIG_RAMBOOTCOMMAND \
509 "run ramargs;" \
510 "tftp $ramdiskaddr $ramdiskfile;" \
511 "tftp $loadaddr $bootfile;" \
512 "bootm $loadaddr $ramdiskaddr"
513
514#define CONFIG_BOOTCOMMAND CONFIG_NFSBOOTCOMMAND
515
516#endif
517