uboot/include/configs/bf533-ezkit.h
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   1/*
   2 * U-boot - Configuration file for BF533 EZKIT board
   3 */
   4
   5#ifndef __CONFIG_BF533_EZKIT_H__
   6#define __CONFIG_BF533_EZKIT_H__
   7
   8#include <asm/config-pre.h>
   9
  10
  11/*
  12 * Processor Settings
  13 */
  14#define CONFIG_BFIN_CPU             bf533-0.3
  15#define CONFIG_BFIN_BOOT_MODE       BFIN_BOOT_BYPASS
  16
  17
  18/*
  19 * Clock Settings
  20 *      CCLK = (CLKIN * VCO_MULT) / CCLK_DIV
  21 *      SCLK = (CLKIN * VCO_MULT) / SCLK_DIV
  22 */
  23/* CONFIG_CLKIN_HZ is any value in Hz                                   */
  24#define CONFIG_CLKIN_HZ                 27000000
  25/* CLKIN_HALF controls the DF bit in PLL_CTL      0 = CLKIN             */
  26/*                                                1 = CLKIN / 2         */
  27#define CONFIG_CLKIN_HALF               0
  28/* PLL_BYPASS controls the BYPASS bit in PLL_CTL  0 = do not bypass     */
  29/*                                                1 = bypass PLL        */
  30#define CONFIG_PLL_BYPASS               0
  31/* VCO_MULT controls the MSEL (multiplier) bits in PLL_CTL              */
  32/* Values can range from 0-63 (where 0 means 64)                        */
  33#define CONFIG_VCO_MULT                 22
  34/* CCLK_DIV controls the core clock divider                             */
  35/* Values can be 1, 2, 4, or 8 ONLY                                     */
  36#define CONFIG_CCLK_DIV                 1
  37/* SCLK_DIV controls the system clock divider                           */
  38/* Values can range from 1-15                                           */
  39#define CONFIG_SCLK_DIV                 5
  40
  41
  42/*
  43 * Memory Settings
  44 */
  45#define CONFIG_MEM_SIZE         32
  46/* Early EZKITs had 32megs, but later have 64megs */
  47#if (CONFIG_MEM_SIZE == 64)
  48# define CONFIG_MEM_ADD_WDTH    10
  49#else
  50# define CONFIG_MEM_ADD_WDTH    9
  51#endif
  52
  53#define CONFIG_EBIU_SDRRC_VAL   0x398
  54#define CONFIG_EBIU_SDGCTL_VAL  0x91118d
  55
  56#define CONFIG_EBIU_AMGCTL_VAL  0xFF
  57#define CONFIG_EBIU_AMBCTL0_VAL 0x7BB07BB0
  58#define CONFIG_EBIU_AMBCTL1_VAL 0xFFC27BB0
  59
  60#define CONFIG_SYS_MONITOR_LEN  (256 * 1024)
  61#define CONFIG_SYS_MALLOC_LEN   (128 * 1024)
  62
  63
  64/*
  65 * Network Settings
  66 */
  67#define ADI_CMDS_NETWORK        1
  68#define CONFIG_SMC91111 1
  69#define CONFIG_SMC91111_BASE    0x20310300
  70#define SMC91111_EEPROM_INIT() \
  71        do { \
  72                bfin_write_FIO_DIR(bfin_read_FIO_DIR() | PF1 | PF0); \
  73                bfin_write_FIO_FLAG_C(PF1); \
  74                bfin_write_FIO_FLAG_S(PF0); \
  75                SSYNC(); \
  76        } while (0)
  77#define CONFIG_HOSTNAME         bf533-ezkit
  78/* Uncomment next line to use fixed MAC address */
  79/* #define CONFIG_ETHADDR       02:80:ad:20:31:e8 */
  80
  81
  82/*
  83 * Flash Settings
  84 */
  85#define CONFIG_SYS_FLASH_BASE           0x20000000
  86#define CONFIG_SYS_MAX_FLASH_BANKS      3
  87#define CONFIG_SYS_MAX_FLASH_SECT       40
  88#define CONFIG_ENV_IS_IN_FLASH
  89#define CONFIG_ENV_ADDR         0x20030000
  90#define CONFIG_ENV_SECT_SIZE    0x10000
  91#define FLASH_TOT_SECT          40
  92
  93
  94/*
  95 * I2C Settings
  96 */
  97#define CONFIG_SOFT_I2C
  98#define CONFIG_SOFT_I2C_GPIO_SCL GPIO_PF0
  99#define CONFIG_SOFT_I2C_GPIO_SDA GPIO_PF1
 100
 101
 102/*
 103 * Misc Settings
 104 */
 105#define CONFIG_MISC_INIT_R
 106#define CONFIG_RTC_BFIN
 107#define CONFIG_UART_CONSOLE     0
 108
 109
 110/*
 111 * Pull in common ADI header for remaining command/environment setup
 112 */
 113#include <configs/bfin_adi_common.h>
 114
 115#endif
 116