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7#ifndef _PPC_IO_H
8#define _PPC_IO_H
9
10#include <linux/config.h>
11#include <asm/byteorder.h>
12
13#ifdef CONFIG_ADDR_MAP
14#include <addr_map.h>
15#endif
16
17#define SIO_CONFIG_RA 0x398
18#define SIO_CONFIG_RD 0x399
19
20#ifndef _IO_BASE
21#define _IO_BASE 0
22#endif
23
24#define readb(addr) in_8((volatile u8 *)(addr))
25#define writeb(b,addr) out_8((volatile u8 *)(addr), (b))
26#if !defined(__BIG_ENDIAN)
27#define readw(addr) (*(volatile u16 *) (addr))
28#define readl(addr) (*(volatile u32 *) (addr))
29#define writew(b,addr) ((*(volatile u16 *) (addr)) = (b))
30#define writel(b,addr) ((*(volatile u32 *) (addr)) = (b))
31#else
32#define readw(addr) in_le16((volatile u16 *)(addr))
33#define readl(addr) in_le32((volatile u32 *)(addr))
34#define writew(b,addr) out_le16((volatile u16 *)(addr),(b))
35#define writel(b,addr) out_le32((volatile u32 *)(addr),(b))
36#endif
37
38
39
40
41
42
43
44#define insb(port, buf, ns) _insb((u8 *)((port)+_IO_BASE), (buf), (ns))
45#define outsb(port, buf, ns) _outsb((u8 *)((port)+_IO_BASE), (buf), (ns))
46#define insw(port, buf, ns) _insw_ns((u16 *)((port)+_IO_BASE), (buf), (ns))
47#define outsw(port, buf, ns) _outsw_ns((u16 *)((port)+_IO_BASE), (buf), (ns))
48#define insl(port, buf, nl) _insl_ns((u32 *)((port)+_IO_BASE), (buf), (nl))
49#define outsl(port, buf, nl) _outsl_ns((u32 *)((port)+_IO_BASE), (buf), (nl))
50
51#define inb(port) in_8((u8 *)((port)+_IO_BASE))
52#define outb(val, port) out_8((u8 *)((port)+_IO_BASE), (val))
53#if !defined(__BIG_ENDIAN)
54#define inw(port) in_be16((u16 *)((port)+_IO_BASE))
55#define outw(val, port) out_be16((u16 *)((port)+_IO_BASE), (val))
56#define inl(port) in_be32((u32 *)((port)+_IO_BASE))
57#define outl(val, port) out_be32((u32 *)((port)+_IO_BASE), (val))
58#else
59#define inw(port) in_le16((u16 *)((port)+_IO_BASE))
60#define outw(val, port) out_le16((u16 *)((port)+_IO_BASE), (val))
61#define inl(port) in_le32((u32 *)((port)+_IO_BASE))
62#define outl(val, port) out_le32((u32 *)((port)+_IO_BASE), (val))
63#endif
64
65#define inb_p(port) in_8((u8 *)((port)+_IO_BASE))
66#define outb_p(val, port) out_8((u8 *)((port)+_IO_BASE), (val))
67#define inw_p(port) in_le16((u16 *)((port)+_IO_BASE))
68#define outw_p(val, port) out_le16((u16 *)((port)+_IO_BASE), (val))
69#define inl_p(port) in_le32((u32 *)((port)+_IO_BASE))
70#define outl_p(val, port) out_le32((u32 *)((port)+_IO_BASE), (val))
71
72extern void _insb(volatile u8 *port, void *buf, int ns);
73extern void _outsb(volatile u8 *port, const void *buf, int ns);
74extern void _insw(volatile u16 *port, void *buf, int ns);
75extern void _outsw(volatile u16 *port, const void *buf, int ns);
76extern void _insl(volatile u32 *port, void *buf, int nl);
77extern void _outsl(volatile u32 *port, const void *buf, int nl);
78extern void _insw_ns(volatile u16 *port, void *buf, int ns);
79extern void _outsw_ns(volatile u16 *port, const void *buf, int ns);
80extern void _insl_ns(volatile u32 *port, void *buf, int nl);
81extern void _outsl_ns(volatile u32 *port, const void *buf, int nl);
82
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85
86
87
88#define insw_ns(port, buf, ns) _insw_ns((u16 *)((port)+_IO_BASE), (buf), (ns))
89#define outsw_ns(port, buf, ns) _outsw_ns((u16 *)((port)+_IO_BASE), (buf), (ns))
90#define insl_ns(port, buf, nl) _insl_ns((u32 *)((port)+_IO_BASE), (buf), (nl))
91#define outsl_ns(port, buf, nl) _outsl_ns((u32 *)((port)+_IO_BASE), (buf), (nl))
92
93
94#define IO_SPACE_LIMIT ~0
95
96#define memset_io(a,b,c) memset((void *)(a),(b),(c))
97#define memcpy_fromio(a,b,c) memcpy((a),(void *)(b),(c))
98#define memcpy_toio(a,b,c) memcpy((void *)(a),(b),(c))
99
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102
103
104
105static inline void eieio(void)
106{
107 __asm__ __volatile__ ("eieio" : : : "memory");
108}
109
110static inline void sync(void)
111{
112 __asm__ __volatile__ ("sync" : : : "memory");
113}
114
115static inline void isync(void)
116{
117 __asm__ __volatile__ ("isync" : : : "memory");
118}
119
120
121
122
123#define iobarrier_rw() eieio()
124#define iobarrier_r() eieio()
125#define iobarrier_w() eieio()
126
127
128
129
130#define PCI_FIX_ADDR(addr) (addr)
131
132static inline unsigned char __raw_readb(const volatile void __iomem *addr)
133{
134 return *(volatile unsigned char *)PCI_FIX_ADDR(addr);
135}
136static inline unsigned short __raw_readw(const volatile void __iomem *addr)
137{
138 return *(volatile unsigned short *)PCI_FIX_ADDR(addr);
139}
140static inline unsigned int __raw_readl(const volatile void __iomem *addr)
141{
142 return *(volatile unsigned int *)PCI_FIX_ADDR(addr);
143}
144static inline void __raw_writeb(unsigned char v, volatile void __iomem *addr)
145{
146 *(volatile unsigned char *)PCI_FIX_ADDR(addr) = v;
147}
148static inline void __raw_writew(unsigned short v, volatile void __iomem *addr)
149{
150 *(volatile unsigned short *)PCI_FIX_ADDR(addr) = v;
151}
152static inline void __raw_writel(unsigned int v, volatile void __iomem *addr)
153{
154 *(volatile unsigned int *)PCI_FIX_ADDR(addr) = v;
155}
156
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161
162
163
164extern inline u8 in_8(const volatile unsigned char __iomem *addr)
165{
166 u8 ret;
167
168 __asm__ __volatile__(
169 "sync; lbz%U1%X1 %0,%1;\n"
170 "twi 0,%0,0;\n"
171 "isync" : "=r" (ret) : "m" (*addr));
172 return ret;
173}
174
175extern inline void out_8(volatile unsigned char __iomem *addr, u8 val)
176{
177 __asm__ __volatile__("sync;\n"
178 "stb%U0%X0 %1,%0;\n"
179 : "=m" (*addr)
180 : "r" (val));
181}
182
183extern inline u16 in_le16(const volatile unsigned short __iomem *addr)
184{
185 u16 ret;
186
187 __asm__ __volatile__("sync; lhbrx %0,0,%1;\n"
188 "twi 0,%0,0;\n"
189 "isync" : "=r" (ret) :
190 "r" (addr), "m" (*addr));
191 return ret;
192}
193
194extern inline u16 in_be16(const volatile unsigned short __iomem *addr)
195{
196 u16 ret;
197
198 __asm__ __volatile__("sync; lhz%U1%X1 %0,%1;\n"
199 "twi 0,%0,0;\n"
200 "isync" : "=r" (ret) : "m" (*addr));
201 return ret;
202}
203
204extern inline void out_le16(volatile unsigned short __iomem *addr, u16 val)
205{
206 __asm__ __volatile__("sync; sthbrx %1,0,%2" : "=m" (*addr) :
207 "r" (val), "r" (addr));
208}
209
210extern inline void out_be16(volatile unsigned short __iomem *addr, u16 val)
211{
212 __asm__ __volatile__("sync; sth%U0%X0 %1,%0" : "=m" (*addr) : "r" (val));
213}
214
215extern inline u32 in_le32(const volatile unsigned __iomem *addr)
216{
217 u32 ret;
218
219 __asm__ __volatile__("sync; lwbrx %0,0,%1;\n"
220 "twi 0,%0,0;\n"
221 "isync" : "=r" (ret) :
222 "r" (addr), "m" (*addr));
223 return ret;
224}
225
226extern inline u32 in_be32(const volatile unsigned __iomem *addr)
227{
228 u32 ret;
229
230 __asm__ __volatile__("sync; lwz%U1%X1 %0,%1;\n"
231 "twi 0,%0,0;\n"
232 "isync" : "=r" (ret) : "m" (*addr));
233 return ret;
234}
235
236extern inline void out_le32(volatile unsigned __iomem *addr, u32 val)
237{
238 __asm__ __volatile__("sync; stwbrx %1,0,%2" : "=m" (*addr) :
239 "r" (val), "r" (addr));
240}
241
242extern inline void out_be32(volatile unsigned __iomem *addr, u32 val)
243{
244 __asm__ __volatile__("sync; stw%U0%X0 %1,%0" : "=m" (*addr) : "r" (val));
245}
246
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252
253
254#define clrbits(type, addr, clear) \
255 out_##type((addr), in_##type(addr) & ~(clear))
256
257#define setbits(type, addr, set) \
258 out_##type((addr), in_##type(addr) | (set))
259
260#define clrsetbits(type, addr, clear, set) \
261 out_##type((addr), (in_##type(addr) & ~(clear)) | (set))
262
263#define clrbits_be32(addr, clear) clrbits(be32, addr, clear)
264#define setbits_be32(addr, set) setbits(be32, addr, set)
265#define clrsetbits_be32(addr, clear, set) clrsetbits(be32, addr, clear, set)
266
267#define clrbits_le32(addr, clear) clrbits(le32, addr, clear)
268#define setbits_le32(addr, set) setbits(le32, addr, set)
269#define clrsetbits_le32(addr, clear, set) clrsetbits(le32, addr, clear, set)
270
271#define clrbits_be16(addr, clear) clrbits(be16, addr, clear)
272#define setbits_be16(addr, set) setbits(be16, addr, set)
273#define clrsetbits_be16(addr, clear, set) clrsetbits(be16, addr, clear, set)
274
275#define clrbits_le16(addr, clear) clrbits(le16, addr, clear)
276#define setbits_le16(addr, set) setbits(le16, addr, set)
277#define clrsetbits_le16(addr, clear, set) clrsetbits(le16, addr, clear, set)
278
279#define clrbits_8(addr, clear) clrbits(8, addr, clear)
280#define setbits_8(addr, set) setbits(8, addr, set)
281#define clrsetbits_8(addr, clear, set) clrsetbits(8, addr, clear, set)
282
283
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285
286
287
288#define MAP_NOCACHE (0)
289#define MAP_WRCOMBINE (0)
290#define MAP_WRBACK (0)
291#define MAP_WRTHROUGH (0)
292
293static inline void *
294map_physmem(phys_addr_t paddr, unsigned long len, unsigned long flags)
295{
296#ifdef CONFIG_ADDR_MAP
297 return addrmap_phys_to_virt(paddr);
298#else
299 return (void *)((unsigned long)paddr);
300#endif
301}
302
303
304
305
306static inline void unmap_physmem(void *vaddr, unsigned long flags)
307{
308
309}
310
311static inline phys_addr_t virt_to_phys(void * vaddr)
312{
313#ifdef CONFIG_ADDR_MAP
314 return addrmap_virt_to_phys(vaddr);
315#else
316 return (phys_addr_t)((unsigned long)vaddr);
317#endif
318}
319
320#endif
321