1/* LEON2 header file. LEON2 is a SOC processor. 2 * 3 * (C) Copyright 2008 4 * Daniel Hellstrom, Gaisler Research, daniel@gaisler.com. 5 * 6 * This program is free software; you can redistribute it and/or 7 * modify it under the terms of the GNU General Public License as 8 * published by the Free Software Foundation; either version 2 of 9 * the License, or (at your option) any later version. 10 * 11 * This program is distributed in the hope that it will be useful, 12 * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 * GNU General Public License for more details. 15 * 16 * You should have received a copy of the GNU General Public License 17 * along with this program; if not, write to the Free Software 18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 19 * MA 02111-1307 USA 20 * 21 */ 22 23#ifndef __LEON2_H__ 24#define __LEON2_H__ 25 26#ifdef CONFIG_LEON2 27 28/* LEON 2 I/O register definitions */ 29#define LEON2_PREGS 0x80000000 30#define LEON2_MCFG1 0x00 31#define LEON2_MCFG2 0x04 32#define LEON2_ECTRL 0x08 33#define LEON2_FADDR 0x0C 34#define LEON2_MSTAT 0x10 35#define LEON2_CCTRL 0x14 36#define LEON2_PWDOWN 0x18 37#define LEON2_WPROT1 0x1C 38#define LEON2_WPROT2 0x20 39#define LEON2_LCONF 0x24 40#define LEON2_TCNT0 0x40 41#define LEON2_TRLD0 0x44 42#define LEON2_TCTRL0 0x48 43#define LEON2_TCNT1 0x50 44#define LEON2_TRLD1 0x54 45#define LEON2_TCTRL1 0x58 46#define LEON2_SCNT 0x60 47#define LEON2_SRLD 0x64 48#define LEON2_UART0 0x70 49#define LEON2_UDATA0 0x70 50#define LEON2_USTAT0 0x74 51#define LEON2_UCTRL0 0x78 52#define LEON2_USCAL0 0x7C 53#define LEON2_UART1 0x80 54#define LEON2_UDATA1 0x80 55#define LEON2_USTAT1 0x84 56#define LEON2_UCTRL1 0x88 57#define LEON2_USCAL1 0x8C 58#define LEON2_IMASK 0x90 59#define LEON2_IPEND 0x94 60#define LEON2_IFORCE 0x98 61#define LEON2_ICLEAR 0x9C 62#define LEON2_IOREG 0xA0 63#define LEON2_IODIR 0xA4 64#define LEON2_IOICONF 0xA8 65#define LEON2_IPEND2 0xB0 66#define LEON2_IMASK2 0xB4 67#define LEON2_ISTAT2 0xB8 68#define LEON2_ICLEAR2 0xBC 69 70#ifndef __ASSEMBLER__ 71/* 72 * Structure for LEON memory mapped registers. 73 * 74 * Source: Section 6.1 - On-chip registers 75 * 76 * NOTE: There is only one of these structures per CPU, its base address 77 * is 0x80000000, and the variable LEON_REG is placed there by the 78 * linkcmds file. 79 */ 80typedef struct { 81 volatile unsigned int Memory_Config_1; 82 volatile unsigned int Memory_Config_2; 83 volatile unsigned int Edac_Control; 84 volatile unsigned int Failed_Address; 85 volatile unsigned int Memory_Status; 86 volatile unsigned int Cache_Control; 87 volatile unsigned int Power_Down; 88 volatile unsigned int Write_Protection_1; 89 volatile unsigned int Write_Protection_2; 90 volatile unsigned int Leon_Configuration; 91 volatile unsigned int dummy2; 92 volatile unsigned int dummy3; 93 volatile unsigned int dummy4; 94 volatile unsigned int dummy5; 95 volatile unsigned int dummy6; 96 volatile unsigned int dummy7; 97 volatile unsigned int Timer_Counter_1; 98 volatile unsigned int Timer_Reload_1; 99 volatile unsigned int Timer_Control_1; 100 volatile unsigned int Watchdog; 101 volatile unsigned int Timer_Counter_2; 102 volatile unsigned int Timer_Reload_2; 103 volatile unsigned int Timer_Control_2; 104 volatile unsigned int dummy8; 105 volatile unsigned int Scaler_Counter; 106 volatile unsigned int Scaler_Reload; 107 volatile unsigned int dummy9; 108 volatile unsigned int dummy10; 109 volatile unsigned int UART_Channel_1; 110 volatile unsigned int UART_Status_1; 111 volatile unsigned int UART_Control_1; 112 volatile unsigned int UART_Scaler_1; 113 volatile unsigned int UART_Channel_2; 114 volatile unsigned int UART_Status_2; 115 volatile unsigned int UART_Control_2; 116 volatile unsigned int UART_Scaler_2; 117 volatile unsigned int Interrupt_Mask; 118 volatile unsigned int Interrupt_Pending; 119 volatile unsigned int Interrupt_Force; 120 volatile unsigned int Interrupt_Clear; 121 volatile unsigned int PIO_Data; 122 volatile unsigned int PIO_Direction; 123 volatile unsigned int PIO_Interrupt; 124} LEON2_regs; 125 126typedef struct { 127 volatile unsigned int UART_Channel; 128 volatile unsigned int UART_Status; 129 volatile unsigned int UART_Control; 130 volatile unsigned int UART_Scaler; 131} LEON2_Uart_regs; 132 133#endif 134 135/* 136 * The following constants are intended to be used ONLY in assembly 137 * language files. 138 * 139 * NOTE: The intended style of usage is to load the address of LEON REGS 140 * into a register and then use these as displacements from 141 * that register. 142 */ 143#define LEON_REG_MEMCFG1_OFFSET 0x00 144#define LEON_REG_MEMCFG2_OFFSET 0x04 145#define LEON_REG_EDACCTRL_OFFSET 0x08 146#define LEON_REG_FAILADDR_OFFSET 0x0C 147#define LEON_REG_MEMSTATUS_OFFSET 0x10 148#define LEON_REG_CACHECTRL_OFFSET 0x14 149#define LEON_REG_POWERDOWN_OFFSET 0x18 150#define LEON_REG_WRITEPROT1_OFFSET 0x1C 151#define LEON_REG_WRITEPROT2_OFFSET 0x20 152#define LEON_REG_LEONCONF_OFFSET 0x24 153#define LEON_REG_UNIMPLEMENTED_2_OFFSET 0x28 154#define LEON_REG_UNIMPLEMENTED_3_OFFSET 0x2C 155#define LEON_REG_UNIMPLEMENTED_4_OFFSET 0x30 156#define LEON_REG_UNIMPLEMENTED_5_OFFSET 0x34 157#define LEON_REG_UNIMPLEMENTED_6_OFFSET 0x38 158#define LEON_REG_UNIMPLEMENTED_7_OFFSET 0x3C 159#define LEON_REG_TIMERCNT1_OFFSET 0x40 160#define LEON_REG_TIMERLOAD1_OFFSET 0x44 161#define LEON_REG_TIMERCTRL1_OFFSET 0x48 162#define LEON_REG_WDOG_OFFSET 0x4C 163#define LEON_REG_TIMERCNT2_OFFSET 0x50 164#define LEON_REG_TIMERLOAD2_OFFSET 0x54 165#define LEON_REG_TIMERCTRL2_OFFSET 0x58 166#define LEON_REG_UNIMPLEMENTED_8_OFFSET 0x5C 167#define LEON_REG_SCALERCNT_OFFSET 0x60 168#define LEON_REG_SCALER_LOAD_OFFSET 0x64 169#define LEON_REG_UNIMPLEMENTED_9_OFFSET 0x68 170#define LEON_REG_UNIMPLEMENTED_10_OFFSET 0x6C 171#define LEON_REG_UARTDATA1_OFFSET 0x70 172#define LEON_REG_UARTSTATUS1_OFFSET 0x74 173#define LEON_REG_UARTCTRL1_OFFSET 0x78 174#define LEON_REG_UARTSCALER1_OFFSET 0x7C 175#define LEON_REG_UARTDATA2_OFFSET 0x80 176#define LEON_REG_UARTSTATUS2_OFFSET 0x84 177#define LEON_REG_UARTCTRL2_OFFSET 0x88 178#define LEON_REG_UARTSCALER2_OFFSET 0x8C 179#define LEON_REG_IRQMASK_OFFSET 0x90 180#define LEON_REG_IRQPEND_OFFSET 0x94 181#define LEON_REG_IRQFORCE_OFFSET 0x98 182#define LEON_REG_IRQCLEAR_OFFSET 0x9C 183#define LEON_REG_PIODATA_OFFSET 0xA0 184#define LEON_REG_PIODIR_OFFSET 0xA4 185#define LEON_REG_PIOIRQ_OFFSET 0xA8 186#define LEON_REG_SIM_RAM_SIZE_OFFSET 0xF4 187#define LEON_REG_SIM_ROM_SIZE_OFFSET 0xF8 188 189/* 190 * Interrupt Sources 191 * 192 * The interrupt source numbers directly map to the trap type and to 193 * the bits used in the Interrupt Clear, Interrupt Force, Interrupt Mask, 194 * and the Interrupt Pending Registers. 195 */ 196#define LEON_INTERRUPT_CORRECTABLE_MEMORY_ERROR 1 197#define LEON_INTERRUPT_UART_1_RX_TX 2 198#define LEON_INTERRUPT_UART_0_RX_TX 3 199#define LEON_INTERRUPT_EXTERNAL_0 4 200#define LEON_INTERRUPT_EXTERNAL_1 5 201#define LEON_INTERRUPT_EXTERNAL_2 6 202#define LEON_INTERRUPT_EXTERNAL_3 7 203#define LEON_INTERRUPT_TIMER1 8 204#define LEON_INTERRUPT_TIMER2 9 205#define LEON_INTERRUPT_EMPTY1 10 206#define LEON_INTERRUPT_EMPTY2 11 207#define LEON_INTERRUPT_OPEN_ETH 12 208#define LEON_INTERRUPT_EMPTY4 13 209#define LEON_INTERRUPT_EMPTY5 14 210#define LEON_INTERRUPT_EMPTY6 15 211 212/* Timer Bits */ 213#define LEON2_TIMER_CTRL_EN 0x1 /* Timer enable */ 214#define LEON2_TIMER_CTRL_RS 0x2 /* Timer reStart */ 215#define LEON2_TIMER_CTRL_LD 0x4 /* Timer reLoad */ 216#define LEON2_TIMER1_IRQNO 8 /* Timer 1 IRQ number */ 217#define LEON2_TIMER2_IRQNO 9 /* Timer 2 IRQ number */ 218#define LEON2_TIMER1_IE (1<<LEON2_TIMER1_IRQNO) /* Timer 1 interrupt enable */ 219#define LEON2_TIMER2_IE (1<<LEON2_TIMER2_IRQNO) /* Timer 2 interrupt enable */ 220 221/* UART bits */ 222#define LEON2_UART_CTRL_RE 1 /* UART Receiver enable */ 223#define LEON2_UART_CTRL_TE 2 /* UART Transmitter enable */ 224#define LEON2_UART_CTRL_RI 4 /* UART Receiver Interrupt enable */ 225#define LEON2_UART_CTRL_TI 8 /* UART Transmitter Interrupt enable */ 226#define LEON2_UART_CTRL_DBG (1<<11) /* Debug Bit used by GRMON */ 227 228#define LEON2_UART_STAT_DR 1 /* UART Data Ready */ 229#define LEON2_UART_STAT_TSE 2 /* UART Transmit Shift Reg empty */ 230#define LEON2_UART_STAT_THE 4 /* UART Transmit Hold Reg empty */ 231 232#else 233#error Include LEON2 header file only if LEON2 processor 234#endif 235 236#endif 237