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27#include <config.h>
28#include <common.h>
29#include <pci.h>
30#include <asm/immap.h>
31#include <asm/io.h>
32
33DECLARE_GLOBAL_DATA_PTR;
34
35int checkboard(void)
36{
37 puts("Board: ");
38 puts("Freescale FireEngine 5475 EVB\n");
39 return 0;
40};
41
42phys_size_t initdram(int board_type)
43{
44 siu_t *siu = (siu_t *) (MMAP_SIU);
45 sdram_t *sdram = (sdram_t *)(MMAP_SDRAM);
46 u32 dramsize, i;
47#ifdef CONFIG_SYS_DRAMSZ1
48 u32 temp;
49#endif
50
51 out_be32(&siu->drv, CONFIG_SYS_SDRAM_DRVSTRENGTH);
52
53 dramsize = CONFIG_SYS_DRAMSZ * 0x100000;
54 for (i = 0x13; i < 0x20; i++) {
55 if (dramsize == (1 << i))
56 break;
57 }
58 i--;
59 out_be32(&siu->cs0cfg, CONFIG_SYS_SDRAM_BASE | i);
60
61#ifdef CONFIG_SYS_DRAMSZ1
62 temp = CONFIG_SYS_DRAMSZ1 * 0x100000;
63 for (i = 0x13; i < 0x20; i++) {
64 if (temp == (1 << i))
65 break;
66 }
67 i--;
68 dramsize += temp;
69 out_be32(&siu->cs1cfg, (CONFIG_SYS_SDRAM_BASE + temp) | i);
70#endif
71
72 out_be32(&sdram->cfg1, CONFIG_SYS_SDRAM_CFG1);
73 out_be32(&sdram->cfg2, CONFIG_SYS_SDRAM_CFG2);
74
75
76 out_be32(&sdram->ctrl, CONFIG_SYS_SDRAM_CTRL | 2);
77
78
79 out_be32(&sdram->mode, CONFIG_SYS_SDRAM_EMOD);
80 out_be32(&sdram->mode, CONFIG_SYS_SDRAM_MODE | 0x04000000);
81
82 udelay(500);
83
84
85 out_be32(&sdram->ctrl, CONFIG_SYS_SDRAM_CTRL | 2);
86
87
88 out_be32(&sdram->ctrl, CONFIG_SYS_SDRAM_CTRL | 4);
89 out_be32(&sdram->ctrl, CONFIG_SYS_SDRAM_CTRL | 4);
90
91 out_be32(&sdram->mode, CONFIG_SYS_SDRAM_MODE);
92
93 out_be32(&sdram->ctrl,
94 (CONFIG_SYS_SDRAM_CTRL & ~0x80000000) | 0x10000F00);
95
96 udelay(100);
97
98 return dramsize;
99};
100
101int testdram(void)
102{
103
104 printf("DRAM test not implemented!\n");
105
106 return (0);
107}
108
109#if defined(CONFIG_PCI)
110
111
112
113static struct pci_controller hose;
114extern void pci_mcf547x_8x_init(struct pci_controller *hose);
115
116void pci_init_board(void)
117{
118 pci_mcf547x_8x_init(&hose);
119}
120#endif
121