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41
42#define OMAP_TAG_CLOCK 0x4f01
43#define OMAP_TAG_SERIAL_CONSOLE 0x4f03
44#define OMAP_TAG_USB 0x4f04
45#define OMAP_TAG_LCD 0x4f05
46#define OMAP_TAG_GPIO_SWITCH 0x4f06
47#define OMAP_TAG_UART 0x4f07
48#define OMAP_TAG_FBMEM 0x4f08
49#define OMAP_TAG_STI_CONSOLE 0x4f09
50#define OMAP_TAG_CAMERA_SENSOR 0x4f0a
51#define OMAP_TAG_PARTITION 0x4f0b
52#define OMAP_TAG_TEA5761 0x4f10
53#define OMAP_TAG_TMP105 0x4f11
54
55#define OMAP_TAG_BOOT_REASON 0x4f80
56#define OMAP_TAG_FLASH_PART_STR 0x4f81
57#define OMAP_TAG_VERSION_STR 0x4f82
58
59#define OMAP_TAG_NOKIA_BT 0x4e01
60#define OMAP_TAG_WLAN_CX3110X 0x4e02
61#define OMAP_TAG_CBUS 0x4e03
62#define OMAP_TAG_EM_ASIC_BB5 0x4e04
63
64
65struct omap_clock_config {
66
67 u8 system_clock_type;
68};
69
70struct omap_serial_console_config {
71 u8 console_uart;
72 u32 console_speed;
73};
74
75struct omap_sti_console_config {
76 unsigned enable:1;
77 u8 channel;
78};
79
80struct omap_usb_config {
81
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87
88
89 unsigned register_host:1;
90 unsigned register_dev:1;
91 u8 otg;
92
93 u8 hmc_mode;
94
95
96 u8 rwc;
97
98
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103
104
105 u8 pins[3];
106};
107
108struct omap_lcd_config {
109 char panel_name[16];
110 char ctrl_name[16];
111 s16 nreset_gpio;
112 u8 data_lines;
113};
114
115struct omap_fbmem_config {
116 u32 start;
117 u32 size;
118};
119
120struct omap_gpio_switch_config {
121 char name[12];
122 u16 gpio;
123 u8 flags:4;
124 u8 type:4;
125 unsigned int key_code:24;
126};
127
128struct omap_uart_config {
129
130 unsigned int enabled_uarts;
131};
132
133struct omap_tea5761_config {
134 u16 enable_gpio;
135};
136
137struct omap_partition_config {
138 char name[16];
139 unsigned int size;
140 unsigned int offset;
141
142 unsigned int mask_flags;
143};
144
145struct omap_flash_part_str_config {
146 char part_table[0];
147};
148
149struct omap_boot_reason_config {
150 char reason_str[12];
151};
152
153struct omap_version_config {
154 char component[12];
155 char version[12];
156};
157
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166
167struct omap_bluetooth_config {
168 u8 chip_type;
169 u8 bt_wakeup_gpio;
170 u8 host_wakeup_gpio;
171 u8 reset_gpio;
172 u8 bt_uart;
173 u8 bd_addr[6];
174 u8 bt_sysclk;
175};
176
177struct omap_wlan_cx3110x_config {
178 u8 chip_type;
179 u8 reserverd;
180 s16 power_gpio;
181 s16 irq_gpio;
182 s16 spi_cs_gpio;
183};
184
185struct omap_cbus_config {
186 s16 clk_gpio;
187 s16 dat_gpio;
188 s16 sel_gpio;
189};
190
191struct omap_em_asic_bb5_config {
192 s16 retu_irq_gpio;
193 s16 tahvo_irq_gpio;
194};
195
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204
205
206#define ATAG_BOARD 0x414f4d50
207
208struct tag_omap_header {
209 u16 tag;
210 u16 size;
211};
212
213struct tag_omap {
214 struct tag_omap_header hdr;
215 union {
216 struct omap_clock_config clock;
217 struct omap_serial_console_config serial_console;
218 struct omap_sti_console_config sti_console;
219 struct omap_usb_config usb;
220 struct omap_lcd_config lcd;
221 struct omap_fbmem_config fbmem;
222 struct omap_gpio_switch_config gpio_switch;
223 struct omap_uart_config uart;
224 struct omap_tea5761_config tea5761;
225 struct omap_partition_config partition;
226 struct omap_flash_part_str_config flash_part_str;
227 struct omap_boot_reason_config boot_reason;
228 struct omap_version_config version;
229 struct omap_bluetooth_config bluetooth;
230 struct omap_wlan_cx3110x_config wlan_cx3110x;
231 struct omap_cbus_config cbus;
232 struct omap_em_asic_bb5_config em_asic_bb5;
233 } u;
234};
235
236#define tag_omap_next(t) ((struct tag_omap *)((u8 *)(t) + \
237 (t)->hdr.size + sizeof(struct tag_omap_header)))
238
239#define OMAP_TAG_HEADER_CONFIG(config, type) \
240 .hdr.tag = config, \
241 .hdr.size = sizeof(struct type)
242
243#define OMAP_TAG_UART_CONFIG(p1) \
244 { \
245 OMAP_TAG_HEADER_CONFIG(OMAP_TAG_UART, omap_uart_config), \
246 .u.uart.enabled_uarts = p1, \
247 }
248
249#define OMAP_TAG_SERIAL_CONSOLE_CONFIG(p1, p2) \
250 { \
251 OMAP_TAG_HEADER_CONFIG(OMAP_TAG_SERIAL_CONSOLE, \
252 omap_serial_console_config), \
253 .u.serial_console.console_uart = p1, \
254 .u.serial_console.console_speed = p2, \
255 }
256
257#define OMAP_TAG_LCD_CONFIG(p1, p2, p3, p4) \
258 { \
259 OMAP_TAG_HEADER_CONFIG(OMAP_TAG_LCD, omap_lcd_config), \
260 .u.lcd.panel_name = p1, \
261 .u.lcd.ctrl_name = p2, \
262 .u.lcd.nreset_gpio = p3, \
263 .u.lcd.data_lines = p4, \
264 }
265
266#define OMAP_TAG_GPIO_SWITCH_CONFIG(p1, p2, p3, p4, p5) \
267 { \
268 OMAP_TAG_HEADER_CONFIG(OMAP_TAG_GPIO_SWITCH, \
269 omap_gpio_switch_config), \
270 .u.gpio_switch.name = p1, \
271 .u.gpio_switch.gpio = p2, \
272 .u.gpio_switch.flags = p3, \
273 .u.gpio_switch.type = p4, \
274 .u.gpio_switch.key_code = p5, \
275 }
276
277#define OMAP_TAG_WLAN_CX3110X_CONFIG(p1, p2, p3, p4, p5) \
278 { \
279 OMAP_TAG_HEADER_CONFIG(OMAP_TAG_WLAN_CX3110X, \
280 omap_wlan_cx3110x_config), \
281 .u.wlan_cx3110x.chip_type = p1, \
282 .u.wlan_cx3110x.reserverd = p2, \
283 .u.wlan_cx3110x.power_gpio = p3, \
284 .u.wlan_cx3110x.irq_gpio = p4, \
285 .u.wlan_cx3110x.spi_cs_gpio = p5, \
286 }
287
288#define OMAP_TAG_PARTITION_CONFIG(p1, p2, p3, p4) \
289 { \
290 OMAP_TAG_HEADER_CONFIG(OMAP_TAG_PARTITION, \
291 omap_partition_config), \
292 .u.partition.name = p1, \
293 .u.partition.size = p2, \
294 .u.partition.offset = p3, \
295 .u.partition.mask_flags = p4, \
296 }
297
298#define OMAP_TAG_BOOT_REASON_CONFIG(p1) \
299 { \
300 OMAP_TAG_HEADER_CONFIG(OMAP_TAG_BOOT_REASON, \
301 omap_boot_reason_config), \
302 .u.boot_reason.reason_str = p1, \
303 }
304
305#define OMAP_TAG_VERSION_STR_CONFIG(p1, p2) \
306 { \
307 OMAP_TAG_HEADER_CONFIG(OMAP_TAG_VERSION_STR, \
308 omap_version_config), \
309 .u.version.component = p1, \
310 .u.version.version = p2, \
311 }
312
