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24#include <common.h>
25#include <asm/io.h>
26#include <asm/arch/hardware.h>
27#include "designware_i2c.h"
28
29#ifdef CONFIG_I2C_MULTI_BUS
30static unsigned int bus_initialized[CONFIG_SYS_I2C_BUS_MAX];
31static unsigned int current_bus = 0;
32#endif
33
34static struct i2c_regs *i2c_regs_p =
35 (struct i2c_regs *)CONFIG_SYS_I2C_BASE;
36
37
38
39
40
41
42
43static void set_speed(int i2c_spd)
44{
45 unsigned int cntl;
46 unsigned int hcnt, lcnt;
47 unsigned int enbl;
48
49
50 enbl = readl(&i2c_regs_p->ic_enable);
51 enbl &= ~IC_ENABLE_0B;
52 writel(enbl, &i2c_regs_p->ic_enable);
53
54 cntl = (readl(&i2c_regs_p->ic_con) & (~IC_CON_SPD_MSK));
55
56 switch (i2c_spd) {
57 case IC_SPEED_MODE_MAX:
58 cntl |= IC_CON_SPD_HS;
59 hcnt = (IC_CLK * MIN_HS_SCL_HIGHTIME) / NANO_TO_MICRO;
60 writel(hcnt, &i2c_regs_p->ic_hs_scl_hcnt);
61 lcnt = (IC_CLK * MIN_HS_SCL_LOWTIME) / NANO_TO_MICRO;
62 writel(lcnt, &i2c_regs_p->ic_hs_scl_lcnt);
63 break;
64
65 case IC_SPEED_MODE_STANDARD:
66 cntl |= IC_CON_SPD_SS;
67 hcnt = (IC_CLK * MIN_SS_SCL_HIGHTIME) / NANO_TO_MICRO;
68 writel(hcnt, &i2c_regs_p->ic_ss_scl_hcnt);
69 lcnt = (IC_CLK * MIN_SS_SCL_LOWTIME) / NANO_TO_MICRO;
70 writel(lcnt, &i2c_regs_p->ic_ss_scl_lcnt);
71 break;
72
73 case IC_SPEED_MODE_FAST:
74 default:
75 cntl |= IC_CON_SPD_FS;
76 hcnt = (IC_CLK * MIN_FS_SCL_HIGHTIME) / NANO_TO_MICRO;
77 writel(hcnt, &i2c_regs_p->ic_fs_scl_hcnt);
78 lcnt = (IC_CLK * MIN_FS_SCL_LOWTIME) / NANO_TO_MICRO;
79 writel(lcnt, &i2c_regs_p->ic_fs_scl_lcnt);
80 break;
81 }
82
83 writel(cntl, &i2c_regs_p->ic_con);
84
85
86 enbl |= IC_ENABLE_0B;
87 writel(enbl, &i2c_regs_p->ic_enable);
88}
89
90
91
92
93
94
95
96int i2c_set_bus_speed(int speed)
97{
98 if (speed >= I2C_MAX_SPEED)
99 set_speed(IC_SPEED_MODE_MAX);
100 else if (speed >= I2C_FAST_SPEED)
101 set_speed(IC_SPEED_MODE_FAST);
102 else
103 set_speed(IC_SPEED_MODE_STANDARD);
104
105 return 0;
106}
107
108
109
110
111
112
113int i2c_get_bus_speed(void)
114{
115 u32 cntl;
116
117 cntl = (readl(&i2c_regs_p->ic_con) & IC_CON_SPD_MSK);
118
119 if (cntl == IC_CON_SPD_HS)
120 return I2C_MAX_SPEED;
121 else if (cntl == IC_CON_SPD_FS)
122 return I2C_FAST_SPEED;
123 else if (cntl == IC_CON_SPD_SS)
124 return I2C_STANDARD_SPEED;
125
126 return 0;
127}
128
129
130
131
132
133
134
135
136void i2c_init(int speed, int slaveadd)
137{
138 unsigned int enbl;
139
140
141 enbl = readl(&i2c_regs_p->ic_enable);
142 enbl &= ~IC_ENABLE_0B;
143 writel(enbl, &i2c_regs_p->ic_enable);
144
145 writel((IC_CON_SD | IC_CON_SPD_FS | IC_CON_MM), &i2c_regs_p->ic_con);
146 writel(IC_RX_TL, &i2c_regs_p->ic_rx_tl);
147 writel(IC_TX_TL, &i2c_regs_p->ic_tx_tl);
148 i2c_set_bus_speed(speed);
149 writel(IC_STOP_DET, &i2c_regs_p->ic_intr_mask);
150 writel(slaveadd, &i2c_regs_p->ic_sar);
151
152
153 enbl = readl(&i2c_regs_p->ic_enable);
154 enbl |= IC_ENABLE_0B;
155 writel(enbl, &i2c_regs_p->ic_enable);
156
157#ifdef CONFIG_I2C_MULTI_BUS
158 bus_initialized[current_bus] = 1;
159#endif
160}
161
162
163
164
165
166
167
168static void i2c_setaddress(unsigned int i2c_addr)
169{
170 writel(i2c_addr, &i2c_regs_p->ic_tar);
171}
172
173
174
175
176
177
178static void i2c_flush_rxfifo(void)
179{
180 while (readl(&i2c_regs_p->ic_status) & IC_STATUS_RFNE)
181 readl(&i2c_regs_p->ic_cmd_data);
182}
183
184
185
186
187
188
189static int i2c_wait_for_bb(void)
190{
191 unsigned long start_time_bb = get_timer(0);
192
193 while ((readl(&i2c_regs_p->ic_status) & IC_STATUS_MA) ||
194 !(readl(&i2c_regs_p->ic_status) & IC_STATUS_TFE)) {
195
196
197 if (get_timer(start_time_bb) > (unsigned long)(I2C_BYTE_TO_BB))
198 return 1;
199 }
200
201 return 0;
202}
203
204
205static int check_params(uint addr, int alen, uchar *buffer, int len)
206{
207 if (buffer == NULL) {
208 printf("Buffer is invalid\n");
209 return 1;
210 }
211
212 if (alen > 1) {
213 printf("addr len %d not supported\n", alen);
214 return 1;
215 }
216
217 if (addr + len > 256) {
218 printf("address out of range\n");
219 return 1;
220 }
221
222 return 0;
223}
224
225static int i2c_xfer_init(uchar chip, uint addr)
226{
227 if (i2c_wait_for_bb())
228 return 1;
229
230 i2c_setaddress(chip);
231 writel(addr, &i2c_regs_p->ic_cmd_data);
232
233 return 0;
234}
235
236static int i2c_xfer_finish(void)
237{
238 ulong start_stop_det = get_timer(0);
239
240 while (1) {
241 if ((readl(&i2c_regs_p->ic_raw_intr_stat) & IC_STOP_DET)) {
242 readl(&i2c_regs_p->ic_clr_stop_det);
243 break;
244 } else if (get_timer(start_stop_det) > I2C_STOPDET_TO) {
245 break;
246 }
247 }
248
249 if (i2c_wait_for_bb()) {
250 printf("Timed out waiting for bus\n");
251 return 1;
252 }
253
254 i2c_flush_rxfifo();
255
256
257 udelay(10000);
258
259 return 0;
260}
261
262
263
264
265
266
267
268
269
270
271
272int i2c_read(uchar chip, uint addr, int alen, uchar *buffer, int len)
273{
274 unsigned long start_time_rx;
275
276 if (check_params(addr, alen, buffer, len))
277 return 1;
278
279 if (i2c_xfer_init(chip, addr))
280 return 1;
281
282 start_time_rx = get_timer(0);
283 while (len) {
284 if (len == 1)
285 writel(IC_CMD | IC_STOP, &i2c_regs_p->ic_cmd_data);
286 else
287 writel(IC_CMD, &i2c_regs_p->ic_cmd_data);
288
289 if (readl(&i2c_regs_p->ic_status) & IC_STATUS_RFNE) {
290 *buffer++ = (uchar)readl(&i2c_regs_p->ic_cmd_data);
291 len--;
292 start_time_rx = get_timer(0);
293
294 } else if (get_timer(start_time_rx) > I2C_BYTE_TO) {
295 return 1;
296 }
297 }
298
299 return i2c_xfer_finish();
300}
301
302
303
304
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306
307
308
309
310
311
312int i2c_write(uchar chip, uint addr, int alen, uchar *buffer, int len)
313{
314 int nb = len;
315 unsigned long start_time_tx;
316
317 if (check_params(addr, alen, buffer, len))
318 return 1;
319
320 if (i2c_xfer_init(chip, addr))
321 return 1;
322
323 start_time_tx = get_timer(0);
324 while (len) {
325 if (readl(&i2c_regs_p->ic_status) & IC_STATUS_TFNF) {
326 if (--len == 0)
327 writel(*buffer | IC_STOP, &i2c_regs_p->ic_cmd_data);
328 else
329 writel(*buffer, &i2c_regs_p->ic_cmd_data);
330 buffer++;
331 start_time_tx = get_timer(0);
332
333 } else if (get_timer(start_time_tx) > (nb * I2C_BYTE_TO)) {
334 printf("Timed out. i2c write Failed\n");
335 return 1;
336 }
337 }
338
339 return i2c_xfer_finish();
340}
341
342
343
344
345int i2c_probe(uchar chip)
346{
347 u32 tmp;
348 int ret;
349
350
351
352
353 ret = i2c_read(chip, 0, 1, (uchar *)&tmp, 1);
354 if (ret)
355 i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
356
357 return ret;
358}
359
360#ifdef CONFIG_I2C_MULTI_BUS
361int i2c_set_bus_num(unsigned int bus)
362{
363 switch (bus) {
364 case 0:
365 i2c_regs_p = (void *)CONFIG_SYS_I2C_BASE;
366 break;
367#ifdef CONFIG_SYS_I2C_BASE1
368 case 1:
369 i2c_regs_p = (void *)CONFIG_SYS_I2C_BASE1;
370 break;
371#endif
372#ifdef CONFIG_SYS_I2C_BASE2
373 case 2:
374 i2c_regs_p = (void *)CONFIG_SYS_I2C_BASE2;
375 break;
376#endif
377#ifdef CONFIG_SYS_I2C_BASE3
378 case 3:
379 i2c_regs_p = (void *)CONFIG_SYS_I2C_BASE3;
380 break;
381#endif
382#ifdef CONFIG_SYS_I2C_BASE4
383 case 4:
384 i2c_regs_p = (void *)CONFIG_SYS_I2C_BASE4;
385 break;
386#endif
387#ifdef CONFIG_SYS_I2C_BASE5
388 case 5:
389 i2c_regs_p = (void *)CONFIG_SYS_I2C_BASE5;
390 break;
391#endif
392#ifdef CONFIG_SYS_I2C_BASE6
393 case 6:
394 i2c_regs_p = (void *)CONFIG_SYS_I2C_BASE6;
395 break;
396#endif
397#ifdef CONFIG_SYS_I2C_BASE7
398 case 7:
399 i2c_regs_p = (void *)CONFIG_SYS_I2C_BASE7;
400 break;
401#endif
402#ifdef CONFIG_SYS_I2C_BASE8
403 case 8:
404 i2c_regs_p = (void *)CONFIG_SYS_I2C_BASE8;
405 break;
406#endif
407#ifdef CONFIG_SYS_I2C_BASE9
408 case 9:
409 i2c_regs_p = (void *)CONFIG_SYS_I2C_BASE9;
410 break;
411#endif
412 default:
413 printf("Bad bus: %d\n", bus);
414 return -1;
415 }
416
417 current_bus = bus;
418
419 if (!bus_initialized[current_bus])
420 i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
421
422 return 0;
423}
424
425int i2c_get_bus_num(void)
426{
427 return current_bus;
428}
429#endif
430