LXR uboot/drivers/i2c/tsi108

   1/*
   2 * (C) Copyright 2004 Tundra Semiconductor Corp.
   3 * Author: Alex Bounine
   4 *
   5 * See file CREDITS for list of people who contributed to this
   6 * project.
   7 *
   8 * This program is free software; you can redistribute it and/or
   9 * modify it under the terms of the GNU General Public License as
  10 * published by the Free Software Foundation; either version 2 of
  11 * the License, or (at your option) any later version.
  12 *
  13 * This program is distributed in the hope that it will be useful,
  14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16 * GNU General Public License for more details.
  17 *
  18 * You should have received a copy of the GNU General Public License
  19 * along with this program; if not, write to the Free Software
  20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  21 * MA 02111-1307 USA
  22 *
  23 */
  24
  25#include <config.h>
  26#include <common.h>
  27
  28#include <tsi108.h>
  29
  30#if defined(CONFIG_CMD_I2C)
  31
  32#define I2C_DELAY       100000
  33#undef  DEBUG_I2C
  34
  35#ifdef DEBUG_I2C
  36#define DPRINT(x) printf (x)
  37#else
  38#define DPRINT(x)
  39#endif
  40
  41/* All functions assume that Tsi108 I2C block is the only master on the bus */
  42/* I2C read helper function */
  43
  44void i2c_init(int speed, int slaveaddr)
  45{
  46        /*
  47         * The TSI108 has a fixed I2C clock rate and doesn't support slave
  48         * operation.  This function only exists as a stub to fit into the
  49         * U-Boot I2C API.
  50         */
  51}
  52
  53static int i2c_read_byte (
  54                uint i2c_chan,  /* I2C channel number: 0 - main, 1 - SDC SPD */
  55                uchar chip_addr,/* I2C device address on the bus */
  56                uint byte_addr, /* Byte address within I2C device */
  57                uchar * buffer  /* pointer to data buffer */
  58                )
  59{
  60        u32 temp;
  61        u32 to_count = I2C_DELAY;
  62        u32 op_status = TSI108_I2C_TIMEOUT_ERR;
  63        u32 chan_offset = TSI108_I2C_OFFSET;
  64
  65        DPRINT (("I2C read_byte() %d 0x%02x 0x%02x\n",
  66                i2c_chan, chip_addr, byte_addr));
  67
  68        if (0 != i2c_chan)
  69                chan_offset = TSI108_I2C_SDRAM_OFFSET;
  70
  71        /* Check if I2C operation is in progress */
  72        temp = *(u32 *) (CONFIG_SYS_TSI108_CSR_BASE + chan_offset + I2C_CNTRL2);
  73
  74        if (0 == (temp & (I2C_CNTRL2_RD_STATUS | I2C_CNTRL2_WR_STATUS |
  75                          I2C_CNTRL2_START))) {
  76                /* Set device address and operation (read = 0) */
  77                temp = (byte_addr << 16) | ((chip_addr & 0x07) << 8) |
  78                    ((chip_addr >> 3) & 0x0F);
  79                *(u32 *) (CONFIG_SYS_TSI108_CSR_BASE + chan_offset + I2C_CNTRL1) =
  80                    temp;
  81
  82                /* Issue the read command
  83                 * (at this moment all other parameters are 0
  84                 * (size = 1 byte, lane = 0)
  85                 */
  86
  87                *(u32 *) (CONFIG_SYS_TSI108_CSR_BASE + chan_offset + I2C_CNTRL2) =
  88                    (I2C_CNTRL2_START);
  89
  90                /* Wait until operation completed */
  91                do {
  92                        /* Read I2C operation status */
  93                        temp = *(u32 *) (CONFIG_SYS_TSI108_CSR_BASE + chan_offset + I2C_CNTRL2);
  94
  95                        if (0 == (temp & (I2C_CNTRL2_RD_STATUS | I2C_CNTRL2_START))) {
  96                                if (0 == (temp &
  97                                     (I2C_CNTRL2_I2C_CFGERR |
  98                                      I2C_CNTRL2_I2C_TO_ERR))
  99                                    ) {
 100                                        op_status = TSI108_I2C_SUCCESS;
 101
 102                                        temp = *(u32 *) (CONFIG_SYS_TSI108_CSR_BASE +
 103                                                         chan_offset +
 104                                                         I2C_RD_DATA);
 105
 106                                        *buffer = (u8) (temp & 0xFF);
 107                                } else {
 108                                        /* report HW error */
 109                                        op_status = TSI108_I2C_IF_ERROR;
 110
 111                                        DPRINT (("I2C HW error reported: 0x%02x\n", temp));
 112                                }
 113
 114                                break;
 115                        }
 116                } while (to_count--);
 117        } else {
 118                op_status = TSI108_I2C_IF_BUSY;
 119
 120                DPRINT (("I2C Transaction start failed: 0x%02x\n", temp));
 121        }
 122
 123        DPRINT (("I2C read_byte() status: 0x%02x\n", op_status));
 124        return op_status;
 125}
 126
 127/*
 128 * I2C Read interface as defined in "include/i2c.h" :
 129 *   chip_addr: I2C chip address, range 0..127
 130 *                  (to read from SPD channel EEPROM use (0xD0 ... 0xD7)
 131 *              NOTE: The bit 7 in the chip_addr serves as a channel select.
 132 *              This hack is for enabling "i2c sdram" command on Tsi108 boards
 133 *              without changes to common code. Used for I2C reads only.
 134 *   byte_addr: Memory or register address within the chip
 135 *   alen:      Number of bytes to use for addr (typically 1, 2 for larger
 136 *              memories, 0 for register type devices with only one
 137 *              register)
 138 *   buffer:    Pointer to destination buffer for data to be read
 139 *   len:       How many bytes to read
 140 *
 141 *   Returns: 0 on success, not 0 on failure
 142 */
 143
 144int i2c_read (uchar chip_addr, uint byte_addr, int alen,
 145                uchar * buffer, int len)
 146{
 147        u32 op_status = TSI108_I2C_PARAM_ERR;
 148        u32 i2c_if = 0;
 149
 150        /* Hack to support second (SPD) I2C controller (SPD EEPROM read only).*/
 151        if (0xD0 == (chip_addr & ~0x07)) {
 152                i2c_if = 1;
 153                chip_addr &= 0x7F;
 154        }
 155        /* Check for valid I2C address */
 156        if (chip_addr <= 0x7F && (byte_addr + len) <= (0x01 << (alen * 8))) {
 157                while (len--) {
 158                        op_status = i2c_read_byte(i2c_if, chip_addr, byte_addr++, buffer++);
 159
 160                        if (TSI108_I2C_SUCCESS != op_status) {
 161                                DPRINT (("I2C read_byte() failed: 0x%02x (%d left)\n", op_status, len));
 162
 163                                break;
 164                        }
 165                }
 166        }
 167
 168        DPRINT (("I2C read() status: 0x%02x\n", op_status));
 169        return op_status;
 170}
 171
 172/* I2C write helper function */
 173
 174static int i2c_write_byte (uchar chip_addr,/* I2C device address on the bus */
 175                          uint byte_addr, /* Byte address within I2C device */
 176                          uchar * buffer  /*  pointer to data buffer */
 177                          )
 178{
 179        u32 temp;
 180        u32 to_count = I2C_DELAY;
 181        u32 op_status = TSI108_I2C_TIMEOUT_ERR;
 182
 183        /* Check if I2C operation is in progress */
 184        temp = *(u32 *) (CONFIG_SYS_TSI108_CSR_BASE + TSI108_I2C_OFFSET + I2C_CNTRL2);
 185
 186        if (0 == (temp & (I2C_CNTRL2_RD_STATUS | I2C_CNTRL2_WR_STATUS | I2C_CNTRL2_START))) {
 187                /* Place data into the I2C Tx Register */
 188                *(u32 *) (CONFIG_SYS_TSI108_CSR_BASE + TSI108_I2C_OFFSET +
 189                          I2C_TX_DATA) = (u32) * buffer;
 190
 191                /* Set device address and operation  */
 192                temp =
 193                    I2C_CNTRL1_I2CWRITE | (byte_addr << 16) |
 194                    ((chip_addr & 0x07) << 8) | ((chip_addr >> 3) & 0x0F);
 195                *(u32 *) (CONFIG_SYS_TSI108_CSR_BASE + TSI108_I2C_OFFSET +
 196                          I2C_CNTRL1) = temp;
 197
 198                /* Issue the write command (at this moment all other parameters
 199                 * are 0 (size = 1 byte, lane = 0)
 200                 */
 201
 202                *(u32 *) (CONFIG_SYS_TSI108_CSR_BASE + TSI108_I2C_OFFSET +
 203                          I2C_CNTRL2) = (I2C_CNTRL2_START);
 204
 205                op_status = TSI108_I2C_TIMEOUT_ERR;
 206
 207                /* Wait until operation completed */
 208                do {
 209                        /* Read I2C operation status */
 210                        temp = *(u32 *) (CONFIG_SYS_TSI108_CSR_BASE + TSI108_I2C_OFFSET + I2C_CNTRL2);
 211
 212                        if (0 == (temp & (I2C_CNTRL2_WR_STATUS | I2C_CNTRL2_START))) {
 213                                if (0 == (temp &
 214                                     (I2C_CNTRL2_I2C_CFGERR |
 215                                      I2C_CNTRL2_I2C_TO_ERR))) {
 216                                        op_status = TSI108_I2C_SUCCESS;
 217                                } else {
 218                                        /* report detected HW error */
 219                                        op_status = TSI108_I2C_IF_ERROR;
 220
 221                                        DPRINT (("I2C HW error reported: 0x%02x\n", temp));
 222                                }
 223
 224                                break;
 225                        }
 226
 227                } while (to_count--);
 228        } else {
 229                op_status = TSI108_I2C_IF_BUSY;
 230
 231                DPRINT (("I2C Transaction start failed: 0x%02x\n", temp));
 232        }
 233
 234        return op_status;
 235}
 236
 237/*
 238 * I2C Write interface as defined in "include/i2c.h" :
 239 *   chip_addr: I2C chip address, range 0..127
 240 *   byte_addr: Memory or register address within the chip
 241 *   alen:      Number of bytes to use for addr (typically 1, 2 for larger
 242 *              memories, 0 for register type devices with only one
 243 *              register)
 244 *   buffer:    Pointer to data to be written
 245 *   len:       How many bytes to write
 246 *
 247 *   Returns: 0 on success, not 0 on failure
 248 */
 249
 250int i2c_write (uchar chip_addr, uint byte_addr, int alen, uchar * buffer,
 251              int len)
 252{
 253        u32 op_status = TSI108_I2C_PARAM_ERR;
 254
 255        /* Check for valid I2C address */
 256        if (chip_addr <= 0x7F && (byte_addr + len) <= (0x01 << (alen * 8))) {
 257                while (len--) {
 258                        op_status =
 259                            i2c_write_byte (chip_addr, byte_addr++, buffer++);
 260
 261                        if (TSI108_I2C_SUCCESS != op_status) {
 262                                DPRINT (("I2C write_byte() failed: 0x%02x (%d left)\n", op_status, len));
 263
 264                                break;
 265                        }
 266                }
 267        }
 268
 269        return op_status;
 270}
 271
 272/*
 273 * I2C interface function as defined in "include/i2c.h".
 274 * Probe the given I2C chip address by reading single byte from offset 0.
 275 * Returns 0 if a chip responded, not 0 on failure.
 276 */
 277
 278int i2c_probe (uchar chip)
 279{
 280        u32 tmp;
 281
 282        /*
 283         * Try to read the first location of the chip.
 284         * The Tsi108 HW doesn't support sending just the chip address
 285         * and checkong for an <ACK> back.
 286         */
 287        return i2c_read (chip, 0, 1, (uchar *)&tmp, 1);
 288}
 289
 290#endif
 291